Lines Matching +full:revision +full:- +full:id
7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
45 struct ssb_device *ccdev = cc->dev; in ssb_chipco_set_clockmode()
51 bus = ccdev->bus; in ssb_chipco_set_clockmode()
54 if (ccdev->id.revision >= 10 && mode == SSB_CLKMODE_SLOW) in ssb_chipco_set_clockmode()
57 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_set_clockmode()
59 WARN_ON(ccdev->id.revision >= 20); in ssb_chipco_set_clockmode()
62 if (ccdev->id.revision < 6) in ssb_chipco_set_clockmode()
66 if (ccdev->id.revision >= 10) in ssb_chipco_set_clockmode()
69 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in ssb_chipco_set_clockmode()
79 if (ccdev->id.revision < 10) { in ssb_chipco_set_clockmode()
93 if (ccdev->id.revision < 10) { in ssb_chipco_set_clockmode()
121 struct ssb_bus *bus = cc->dev->bus; in chipco_pctl_get_slowclksrc()
124 if (cc->dev->id.revision < 6) { in chipco_pctl_get_slowclksrc()
125 if (bus->bustype == SSB_BUSTYPE_SSB || in chipco_pctl_get_slowclksrc()
126 bus->bustype == SSB_BUSTYPE_PCMCIA) in chipco_pctl_get_slowclksrc()
128 if (bus->bustype == SSB_BUSTYPE_PCI) { in chipco_pctl_get_slowclksrc()
129 pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT, &tmp); in chipco_pctl_get_slowclksrc()
135 if (cc->dev->id.revision < 10) { in chipco_pctl_get_slowclksrc()
158 if (cc->dev->id.revision < 6) { in chipco_pctl_clockfreqlimit()
169 } else if (cc->dev->id.revision < 10) { in chipco_pctl_clockfreqlimit()
213 struct ssb_bus *bus = cc->dev->bus; in chipco_powercontrol_init()
215 if (bus->chip_id == 0x4321) { in chipco_powercontrol_init()
216 if (bus->chip_rev == 0) in chipco_powercontrol_init()
218 else if (bus->chip_rev == 1) in chipco_powercontrol_init()
222 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in chipco_powercontrol_init()
225 if (cc->dev->id.revision >= 10) { in chipco_powercontrol_init()
241 /* https://bcm-v4.sipsolutions.net/802.11/PmuFastPwrupDelay */
244 struct ssb_bus *bus = cc->dev->bus; in pmu_fast_powerup_delay()
246 switch (bus->chip_id) { in pmu_fast_powerup_delay()
258 /* https://bcm-v4.sipsolutions.net/802.11/ClkctlFastPwrupDelay */
261 struct ssb_bus *bus = cc->dev->bus; in calc_fast_powerup_delay()
266 if (bus->bustype != SSB_BUSTYPE_PCI) in calc_fast_powerup_delay()
269 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { in calc_fast_powerup_delay()
270 cc->fast_pwrup_delay = pmu_fast_powerup_delay(cc); in calc_fast_powerup_delay()
274 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in calc_fast_powerup_delay()
279 tmp = (((pll_on_delay + 2) * 1000000) + (minfreq - 1)) / minfreq; in calc_fast_powerup_delay()
282 cc->fast_pwrup_delay = tmp; in calc_fast_powerup_delay()
287 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_alp_clock()
297 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { in ssb_chipco_watchdog_get_max_timer()
298 if (cc->dev->id.revision < 26) in ssb_chipco_watchdog_get_max_timer()
301 nb = (cc->dev->id.revision >= 37) ? 32 : 24; in ssb_chipco_watchdog_get_max_timer()
308 return (1 << nb) - 1; in ssb_chipco_watchdog_get_max_timer()
315 if (cc->dev->bus->bustype != SSB_BUSTYPE_SSB) in ssb_chipco_watchdog_timer_set_wdt()
326 if (cc->dev->bus->bustype != SSB_BUSTYPE_SSB) in ssb_chipco_watchdog_timer_set_ms()
329 ticks = ssb_chipco_watchdog_timer_set(cc, cc->ticks_per_ms * ms); in ssb_chipco_watchdog_timer_set_ms()
330 return ticks / cc->ticks_per_ms; in ssb_chipco_watchdog_timer_set_ms()
335 struct ssb_bus *bus = cc->dev->bus; in ssb_chipco_watchdog_ticks_per_ms()
337 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { in ssb_chipco_watchdog_ticks_per_ms()
341 if (cc->dev->id.revision < 18) in ssb_chipco_watchdog_ticks_per_ms()
350 if (!cc->dev) in ssb_chipcommon_init()
353 spin_lock_init(&cc->gpio_lock); in ssb_chipcommon_init()
355 if (cc->dev->id.revision >= 11) in ssb_chipcommon_init()
356 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT); in ssb_chipcommon_init()
357 dev_dbg(cc->dev->dev, "chipcommon status is 0x%x\n", cc->status); in ssb_chipcommon_init()
359 if (cc->dev->id.revision >= 20) { in ssb_chipcommon_init()
369 if (cc->dev->bus->bustype == SSB_BUSTYPE_SSB) { in ssb_chipcommon_init()
370 cc->ticks_per_ms = ssb_chipco_watchdog_ticks_per_ms(cc); in ssb_chipcommon_init()
371 cc->max_timer_ms = ssb_chipco_watchdog_get_max_timer(cc) / cc->ticks_per_ms; in ssb_chipcommon_init()
377 if (!cc->dev) in ssb_chipco_suspend()
384 if (!cc->dev) in ssb_chipco_resume()
395 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcpu()
418 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcontrol()
424 if (cc->dev->bus->chip_id != 0x5365) { in ssb_chipco_get_clockcontrol()
437 struct ssb_device *dev = cc->dev; in ssb_chipco_timing_init()
438 struct ssb_bus *bus = dev->bus; in ssb_chipco_timing_init()
443 tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT; /* Waitcount-3 = 10ns */ in ssb_chipco_timing_init()
444 tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT; /* Waitcount-1 = 40ns */ in ssb_chipco_timing_init()
445 tmp |= DIV_ROUND_UP(240, ns); /* Waitcount-0 = 240ns */ in ssb_chipco_timing_init()
449 tmp = DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_3_SHIFT; /* Waitcount-3 = 10nS */ in ssb_chipco_timing_init()
450 tmp |= DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_1_SHIFT; /* Waitcount-1 = 10nS */ in ssb_chipco_timing_init()
451 tmp |= DIV_ROUND_UP(120, ns); /* Waitcount-0 = 120nS */ in ssb_chipco_timing_init()
452 if ((bus->chip_id == 0x5365) || in ssb_chipco_timing_init()
453 (dev->id.revision < 9)) in ssb_chipco_timing_init()
455 if ((bus->chip_id == 0x5365) || in ssb_chipco_timing_init()
456 (dev->id.revision < 9) || in ssb_chipco_timing_init()
457 ((bus->chip_id == 0x5350) && (bus->chip_rev == 0))) in ssb_chipco_timing_init()
460 if (bus->chip_id == 0x5350) { in ssb_chipco_timing_init()
462 tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT; /* Waitcount-3 = 10ns */ in ssb_chipco_timing_init()
463 tmp |= DIV_ROUND_UP(20, ns) << SSB_PROG_WCNT_2_SHIFT; /* Waitcount-2 = 20ns */ in ssb_chipco_timing_init()
464 tmp |= DIV_ROUND_UP(100, ns) << SSB_PROG_WCNT_1_SHIFT; /* Waitcount-1 = 100ns */ in ssb_chipco_timing_init()
465 tmp |= DIV_ROUND_UP(120, ns); /* Waitcount-0 = 120ns */ in ssb_chipco_timing_init()
477 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) { in ssb_chipco_watchdog_timer_set()
514 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_out()
516 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_out()
526 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_outen()
528 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_outen()
538 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_control()
540 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_control()
551 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_intmask()
553 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_intmask()
563 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_polarity()
565 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_polarity()
575 if (cc->dev->id.revision < 20) in ssb_chipco_gpio_pullup()
578 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_pullup()
580 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_pullup()
590 if (cc->dev->id.revision < 20) in ssb_chipco_gpio_pulldown()
593 spin_lock_irqsave(&cc->gpio_lock, flags); in ssb_chipco_gpio_pulldown()
595 spin_unlock_irqrestore(&cc->gpio_lock, flags); in ssb_chipco_gpio_pulldown()
604 struct ssb_bus *bus = cc->dev->bus; in ssb_chipco_serial_init()
610 unsigned int ccrev = cc->dev->id.revision; in ssb_chipco_serial_init()
612 plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_serial_init()
613 irq = ssb_mips_irq(cc->dev); in ssb_chipco_serial_init()
644 /* Re-enable the UART clock. */ in ssb_chipco_serial_init()
663 if ((cc->capabilities & SSB_CHIPCO_CAP_UARTCLK) == in ssb_chipco_serial_init()
675 n = (cc->capabilities & SSB_CHIPCO_CAP_NRUART); in ssb_chipco_serial_init()
680 cc_mmio = cc->dev->bus->mmio + (cc->dev->core_index * SSB_CORE_SIZE); in ssb_chipco_serial_init()