420 static inline void stm32_spi_set_bits(struct stm32_spi *spi,  in stm32_spi_set_bits()  function
445 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_SPE);  in stm32h7_spi_get_fifo_size()
494 	stm32_spi_set_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_DSIZE);  in stm32h7_spi_get_bpw_mask()
741 		stm32_spi_set_bits(spi, STM32FX_SPI_CR2, STM32F7_SPI_CR2_FRXTH);  in stm32f7_spi_read_rx()
801 	stm32_spi_set_bits(spi, spi->cfg->regs->en.reg,  in stm32_spi_enable()
1308 	stm32_spi_set_bits(spi, STM32FX_SPI_CR2, cr2);  in stm32fx_spi_transfer_one_irq()
1355 		stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART);  in stm32h7_spi_transfer_one_irq()
1379 		stm32_spi_set_bits(spi, STM32FX_SPI_CR2, STM32FX_SPI_CR2_ERRIE);  in stm32fx_spi_transfer_one_dma_start()
1394 		stm32_spi_set_bits(spi, STM32FX_SPI_CR2, STM32F7_SPI_CR2_FRXTH);  in stm32f7_spi_transfer_one_dma_start()
1414 	stm32_spi_set_bits(spi, STM32H7_SPI_IER, ier);  in stm32h7_spi_transfer_one_dma_start()
1419 		stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART);  in stm32h7_spi_transfer_one_dma_start()
1445 		stm32_spi_set_bits(spi, spi->cfg->regs->dma_rx_en.reg,  in stm32_spi_transfer_one_dma()
1501 		stm32_spi_set_bits(spi, spi->cfg->regs->dma_tx_en.reg,  in stm32_spi_transfer_one_dma()
1534 		stm32_spi_set_bits(spi, STM32FX_SPI_CR1, STM32F4_SPI_CR1_DFF);  in stm32f4_spi_set_bpw()
1646 		stm32_spi_set_bits(spi, STM32FX_SPI_CR1,  in stm32fx_spi_set_mode()
1655 		stm32_spi_set_bits(spi, STM32FX_SPI_CR1,  in stm32fx_spi_set_mode()
1681 		stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_HDDIR);  in stm32h7_spi_set_mode()
1898 	stm32_spi_set_bits(spi, STM32FX_SPI_CR1, STM32FX_SPI_CR1_SSI |  in stm32fx_spi_config()
1943 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, cr1);  in stm32h7_spi_config()
1944 	stm32_spi_set_bits(spi, STM32H7_SPI_CFG2, cfg2);  in stm32h7_spi_config()