Lines Matching refs:STM32H7_SPI_CFG1
88 #define STM32H7_SPI_CFG1 0x08 macro
384 .dma_rx_en = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_RXDMAEN },
385 .dma_tx_en = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_TXDMAEN },
391 .br = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_MBR,
404 .dma_rx_en = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_RXDMAEN },
405 .dma_tx_en = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_TXDMAEN },
411 .br = { STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_MBR,
494 stm32_spi_set_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_DSIZE); in stm32h7_spi_get_bpw_mask()
496 cfg1 = readl_relaxed(spi->base + STM32H7_SPI_CFG1); in stm32h7_spi_get_bpw_mask()
886 stm32_spi_clr_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_TXDMAEN | in stm32h7_spi_disable()
1585 (readl_relaxed(spi->base + STM32H7_SPI_CFG1) & in stm32h7_spi_set_bpw()
1587 spi->base + STM32H7_SPI_CFG1); in stm32h7_spi_set_bpw()