Lines Matching +full:comms +full:- +full:ssc4 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
77 count = spi_st->words_remaining; in ssc_write_tx_fifo()
80 if (spi_st->tx_ptr) { in ssc_write_tx_fifo()
81 if (spi_st->bytes_per_word == 1) { in ssc_write_tx_fifo()
82 word = *spi_st->tx_ptr++; in ssc_write_tx_fifo()
84 word = *spi_st->tx_ptr++; in ssc_write_tx_fifo()
85 word = *spi_st->tx_ptr++ | (word << 8); in ssc_write_tx_fifo()
88 writel_relaxed(word, spi_st->base + SSC_TBUF); in ssc_write_tx_fifo()
98 if (spi_st->words_remaining > FIFO_SIZE) in ssc_read_rx_fifo()
101 count = spi_st->words_remaining; in ssc_read_rx_fifo()
104 word = readl_relaxed(spi_st->base + SSC_RBUF); in ssc_read_rx_fifo()
106 if (spi_st->rx_ptr) { in ssc_read_rx_fifo()
107 if (spi_st->bytes_per_word == 1) { in ssc_read_rx_fifo()
108 *spi_st->rx_ptr++ = (uint8_t)word; in ssc_read_rx_fifo()
110 *spi_st->rx_ptr++ = (word >> 8); in ssc_read_rx_fifo()
111 *spi_st->rx_ptr++ = word & 0xff; in ssc_read_rx_fifo()
115 spi_st->words_remaining -= count; in ssc_read_rx_fifo()
125 spi_st->tx_ptr = t->tx_buf; in spi_st_transfer_one()
126 spi_st->rx_ptr = t->rx_buf; in spi_st_transfer_one()
128 if (spi->bits_per_word > 8) { in spi_st_transfer_one()
130 * Anything greater than 8 bits-per-word requires 2 in spi_st_transfer_one()
131 * bytes-per-word in the RX/TX buffers in spi_st_transfer_one()
133 spi_st->bytes_per_word = 2; in spi_st_transfer_one()
134 spi_st->words_remaining = t->len / 2; in spi_st_transfer_one()
136 } else if (spi->bits_per_word == 8 && !(t->len & 0x1)) { in spi_st_transfer_one()
138 * If transfer is even-length, and 8 bits-per-word, then in spi_st_transfer_one()
139 * implement as half-length 16 bits-per-word transfer in spi_st_transfer_one()
141 spi_st->bytes_per_word = 2; in spi_st_transfer_one()
142 spi_st->words_remaining = t->len / 2; in spi_st_transfer_one()
144 /* Set SSC_CTL to 16 bits-per-word */ in spi_st_transfer_one()
145 ctl = readl_relaxed(spi_st->base + SSC_CTL); in spi_st_transfer_one()
146 writel_relaxed((ctl | 0xf), spi_st->base + SSC_CTL); in spi_st_transfer_one()
148 readl_relaxed(spi_st->base + SSC_RBUF); in spi_st_transfer_one()
151 spi_st->bytes_per_word = 1; in spi_st_transfer_one()
152 spi_st->words_remaining = t->len; in spi_st_transfer_one()
155 reinit_completion(&spi_st->done); in spi_st_transfer_one()
159 writel_relaxed(SSC_IEN_TEEN, spi_st->base + SSC_IEN); in spi_st_transfer_one()
162 wait_for_completion(&spi_st->done); in spi_st_transfer_one()
166 writel_relaxed(ctl, spi_st->base + SSC_CTL); in spi_st_transfer_one()
168 spi_finalize_current_transfer(spi->controller); in spi_st_transfer_one()
170 return t->len; in spi_st_transfer_one()
173 /* the spi->mode bits understood by this driver: */
177 struct spi_st *spi_st = spi_controller_get_devdata(spi->controller); in spi_st_setup()
179 u32 hz = spi->max_speed_hz; in spi_st_setup()
182 dev_err(&spi->dev, "max_speed_hz unspecified\n"); in spi_st_setup()
183 return -EINVAL; in spi_st_setup()
187 dev_err(&spi->dev, "no valid gpio assigned\n"); in spi_st_setup()
188 return -EINVAL; in spi_st_setup()
191 spi_st_clk = clk_get_rate(spi_st->clk); in spi_st_setup()
196 dev_err(&spi->dev, in spi_st_setup()
198 return -EINVAL; in spi_st_setup()
201 spi_st->baud = spi_st_clk / (2 * sscbrg); in spi_st_setup()
202 if (sscbrg == BIT(16)) /* 16-bit counter wraps */ in spi_st_setup()
205 writel_relaxed(sscbrg, spi_st->base + SSC_BRG); in spi_st_setup()
207 dev_dbg(&spi->dev, in spi_st_setup()
209 hz, spi_st->baud, sscbrg); in spi_st_setup()
212 var = readl_relaxed(spi_st->base + SSC_CTL); in spi_st_setup()
215 if (spi->mode & SPI_CPOL) in spi_st_setup()
220 if (spi->mode & SPI_CPHA) in spi_st_setup()
225 if ((spi->mode & SPI_LSB_FIRST) == 0) in spi_st_setup()
230 if (spi->mode & SPI_LOOP) in spi_st_setup()
236 var |= (spi->bits_per_word - 1); in spi_st_setup()
241 writel_relaxed(var, spi_st->base + SSC_CTL); in spi_st_setup()
244 readl_relaxed(spi_st->base + SSC_RBUF); in spi_st_setup()
258 if (spi_st->words_remaining) { in spi_st_irq()
262 writel_relaxed(0x0, spi_st->base + SSC_IEN); in spi_st_irq()
265 * before re-enabling interrupt in spi_st_irq()
267 readl(spi_st->base + SSC_IEN); in spi_st_irq()
268 complete(&spi_st->done); in spi_st_irq()
276 struct device_node *np = pdev->dev.of_node; in spi_st_probe()
282 host = spi_alloc_host(&pdev->dev, sizeof(*spi_st)); in spi_st_probe()
284 return -ENOMEM; in spi_st_probe()
286 host->dev.of_node = np; in spi_st_probe()
287 host->mode_bits = MODEBITS; in spi_st_probe()
288 host->setup = spi_st_setup; in spi_st_probe()
289 host->transfer_one = spi_st_transfer_one; in spi_st_probe()
290 host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); in spi_st_probe()
291 host->auto_runtime_pm = true; in spi_st_probe()
292 host->bus_num = pdev->id; in spi_st_probe()
293 host->use_gpio_descriptors = true; in spi_st_probe()
296 spi_st->clk = devm_clk_get(&pdev->dev, "ssc"); in spi_st_probe()
297 if (IS_ERR(spi_st->clk)) { in spi_st_probe()
298 dev_err(&pdev->dev, "Unable to request clock\n"); in spi_st_probe()
299 ret = PTR_ERR(spi_st->clk); in spi_st_probe()
303 ret = clk_prepare_enable(spi_st->clk); in spi_st_probe()
307 init_completion(&spi_st->done); in spi_st_probe()
310 spi_st->base = devm_platform_ioremap_resource(pdev, 0); in spi_st_probe()
311 if (IS_ERR(spi_st->base)) { in spi_st_probe()
312 ret = PTR_ERR(spi_st->base); in spi_st_probe()
316 /* Disable I2C and Reset SSC */ in spi_st_probe()
317 writel_relaxed(0x0, spi_st->base + SSC_I2C); in spi_st_probe()
318 var = readw_relaxed(spi_st->base + SSC_CTL); in spi_st_probe()
320 writel_relaxed(var, spi_st->base + SSC_CTL); in spi_st_probe()
323 var = readl_relaxed(spi_st->base + SSC_CTL); in spi_st_probe()
325 writel_relaxed(var, spi_st->base + SSC_CTL); in spi_st_probe()
328 var = readl_relaxed(spi_st->base + SSC_CTL); in spi_st_probe()
330 writel_relaxed(var, spi_st->base + SSC_CTL); in spi_st_probe()
334 dev_err(&pdev->dev, "IRQ missing or invalid\n"); in spi_st_probe()
335 ret = -EINVAL; in spi_st_probe()
339 ret = devm_request_irq(&pdev->dev, irq, spi_st_irq, 0, in spi_st_probe()
340 pdev->name, spi_st); in spi_st_probe()
342 dev_err(&pdev->dev, "Failed to request irq %d\n", irq); in spi_st_probe()
347 pm_runtime_set_active(&pdev->dev); in spi_st_probe()
348 pm_runtime_enable(&pdev->dev); in spi_st_probe()
352 ret = devm_spi_register_controller(&pdev->dev, host); in spi_st_probe()
354 dev_err(&pdev->dev, "Failed to register host\n"); in spi_st_probe()
361 pm_runtime_disable(&pdev->dev); in spi_st_probe()
363 clk_disable_unprepare(spi_st->clk); in spi_st_probe()
374 pm_runtime_disable(&pdev->dev); in spi_st_remove()
376 clk_disable_unprepare(spi_st->clk); in spi_st_remove()
378 pinctrl_pm_select_sleep_state(&pdev->dev); in spi_st_remove()
387 writel_relaxed(0, spi_st->base + SSC_IEN); in spi_st_runtime_suspend()
390 clk_disable_unprepare(spi_st->clk); in spi_st_runtime_suspend()
401 ret = clk_prepare_enable(spi_st->clk); in spi_st_runtime_resume()
440 { .compatible = "st,comms-ssc4-spi", },
447 .name = "spi-st",