Lines Matching +full:number +full:- +full:of +full:- +full:wires
1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/sprd-dma.h>
13 #include <linux/of.h>
176 * The time spent on transmission of the full FIFO data is the maximum in sprd_spi_transfer_max_timeout()
179 u32 size = t->bits_per_word * SPRD_SPI_FIFO_SIZE; in sprd_spi_transfer_max_timeout()
180 u32 bit_time_us = DIV_ROUND_UP(USEC_PER_SEC, ss->hw_speed_hz); in sprd_spi_transfer_max_timeout()
186 u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ss->word_delay; in sprd_spi_transfer_max_timeout()
188 ss->src_clk); in sprd_spi_transfer_max_timeout()
199 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_INT_RAW_STS, val, in sprd_spi_wait_for_tx_end()
202 dev_err(ss->dev, "SPI error, spi send timeout!\n"); in sprd_spi_wait_for_tx_end()
206 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_STS2, val, in sprd_spi_wait_for_tx_end()
209 dev_err(ss->dev, "SPI error, spi busy timeout!\n"); in sprd_spi_wait_for_tx_end()
213 writel_relaxed(SPRD_SPI_TX_END_INT_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_wait_for_tx_end()
224 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_INT_RAW_STS, val, in sprd_spi_wait_for_rx_end()
227 dev_err(ss->dev, "SPI error, spi rx timeout!\n"); in sprd_spi_wait_for_rx_end()
231 writel_relaxed(SPRD_SPI_RX_END_INT_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_wait_for_rx_end()
238 writel_relaxed(SPRD_SPI_SW_TX_REQ, ss->base + SPRD_SPI_CTL12); in sprd_spi_tx_req()
243 writel_relaxed(SPRD_SPI_SW_RX_REQ, ss->base + SPRD_SPI_CTL12); in sprd_spi_rx_req()
248 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL1); in sprd_spi_enter_idle()
251 writel_relaxed(val, ss->base + SPRD_SPI_CTL1); in sprd_spi_enter_idle()
256 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_set_transfer_bits()
261 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_set_transfer_bits()
266 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL8); in sprd_spi_set_tx_length()
271 writel_relaxed(val, ss->base + SPRD_SPI_CTL8); in sprd_spi_set_tx_length()
274 writel_relaxed(val, ss->base + SPRD_SPI_CTL9); in sprd_spi_set_tx_length()
279 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL10); in sprd_spi_set_rx_length()
284 writel_relaxed(val, ss->base + SPRD_SPI_CTL10); in sprd_spi_set_rx_length()
287 writel_relaxed(val, ss->base + SPRD_SPI_CTL11); in sprd_spi_set_rx_length()
292 struct spi_controller *sctlr = sdev->controller; in sprd_spi_chipselect()
296 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
300 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
303 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_chipselect()
311 /* Clear the start receive bit and reset receive data number */ in sprd_spi_write_only_receive()
312 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
314 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
317 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
319 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
322 val = readl_relaxed(ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
324 writel_relaxed(val, ss->base + SPRD_SPI_CTL4); in sprd_spi_write_only_receive()
331 u8 *tx_p = (u8 *)ss->tx_buf; in sprd_spi_write_bufs_u8()
335 writeb_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u8()
337 ss->tx_buf += i; in sprd_spi_write_bufs_u8()
343 u16 *tx_p = (u16 *)ss->tx_buf; in sprd_spi_write_bufs_u16()
347 writew_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u16()
349 ss->tx_buf += i << 1; in sprd_spi_write_bufs_u16()
355 u32 *tx_p = (u32 *)ss->tx_buf; in sprd_spi_write_bufs_u32()
359 writel_relaxed(tx_p[i], ss->base + SPRD_SPI_TXD); in sprd_spi_write_bufs_u32()
361 ss->tx_buf += i << 2; in sprd_spi_write_bufs_u32()
367 u8 *rx_p = (u8 *)ss->rx_buf; in sprd_spi_read_bufs_u8()
371 rx_p[i] = readb_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u8()
373 ss->rx_buf += i; in sprd_spi_read_bufs_u8()
379 u16 *rx_p = (u16 *)ss->rx_buf; in sprd_spi_read_bufs_u16()
383 rx_p[i] = readw_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u16()
385 ss->rx_buf += i << 1; in sprd_spi_read_bufs_u16()
391 u32 *rx_p = (u32 *)ss->rx_buf; in sprd_spi_read_bufs_u32()
395 rx_p[i] = readl_relaxed(ss->base + SPRD_SPI_TXD); in sprd_spi_read_bufs_u32()
397 ss->rx_buf += i << 2; in sprd_spi_read_bufs_u32()
403 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); in sprd_spi_txrx_bufs()
404 u32 trans_len = ss->trans_len, len; in sprd_spi_txrx_bufs()
410 if (ss->trans_mode & SPRD_SPI_TX_MODE) { in sprd_spi_txrx_bufs()
412 write_size += ss->write_bufs(ss, len); in sprd_spi_txrx_bufs()
415 * For our 3 wires mode or dual TX line mode, we need in sprd_spi_txrx_bufs()
418 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_txrx_bufs()
426 * For our 3 wires mode or dual TX line mode, we need in sprd_spi_txrx_bufs()
429 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_txrx_bufs()
432 write_size += ss->write_bufs(ss, len); in sprd_spi_txrx_bufs()
440 if (ss->trans_mode & SPRD_SPI_RX_MODE) in sprd_spi_txrx_bufs()
441 read_size += ss->read_bufs(ss, len); in sprd_spi_txrx_bufs()
443 trans_len -= len; in sprd_spi_txrx_bufs()
446 if (ss->trans_mode & SPRD_SPI_TX_MODE) in sprd_spi_txrx_bufs()
462 ss->base + SPRD_SPI_INT_CLR); in sprd_spi_irq_enable()
464 val = readl_relaxed(ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_enable()
467 ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_enable()
472 writel_relaxed(0, ss->base + SPRD_SPI_INT_EN); in sprd_spi_irq_disable()
477 u32 val = readl_relaxed(ss->base + SPRD_SPI_CTL2); in sprd_spi_dma_enable()
484 writel_relaxed(val, ss->base + SPRD_SPI_CTL2); in sprd_spi_dma_enable()
503 desc = dmaengine_prep_slave_sg(dma_chan, sg->sgl, sg->nents, dir, flags); in sprd_spi_dma_submit()
505 return -ENODEV; in sprd_spi_dma_submit()
518 struct dma_chan *dma_chan = ss->dma.dma_chan[SPRD_SPI_RX]; in sprd_spi_dma_rx_config()
520 .src_addr = ss->phy_base, in sprd_spi_dma_rx_config()
521 .src_addr_width = ss->dma.width, in sprd_spi_dma_rx_config()
522 .dst_addr_width = ss->dma.width, in sprd_spi_dma_rx_config()
523 .dst_maxburst = ss->dma.fragmens_len, in sprd_spi_dma_rx_config()
527 ret = sprd_spi_dma_submit(dma_chan, &config, &t->rx_sg, DMA_DEV_TO_MEM); in sprd_spi_dma_rx_config()
531 return ss->dma.rx_len; in sprd_spi_dma_rx_config()
536 struct dma_chan *dma_chan = ss->dma.dma_chan[SPRD_SPI_TX]; in sprd_spi_dma_tx_config()
538 .dst_addr = ss->phy_base, in sprd_spi_dma_tx_config()
539 .src_addr_width = ss->dma.width, in sprd_spi_dma_tx_config()
540 .dst_addr_width = ss->dma.width, in sprd_spi_dma_tx_config()
541 .src_maxburst = ss->dma.fragmens_len, in sprd_spi_dma_tx_config()
545 ret = sprd_spi_dma_submit(dma_chan, &config, &t->tx_sg, DMA_MEM_TO_DEV); in sprd_spi_dma_tx_config()
549 return t->len; in sprd_spi_dma_tx_config()
554 ss->dma.dma_chan[SPRD_SPI_RX] = dma_request_chan(ss->dev, "rx_chn"); in sprd_spi_dma_request()
555 if (IS_ERR_OR_NULL(ss->dma.dma_chan[SPRD_SPI_RX])) in sprd_spi_dma_request()
556 return dev_err_probe(ss->dev, PTR_ERR(ss->dma.dma_chan[SPRD_SPI_RX]), in sprd_spi_dma_request()
559 ss->dma.dma_chan[SPRD_SPI_TX] = dma_request_chan(ss->dev, "tx_chn"); in sprd_spi_dma_request()
560 if (IS_ERR_OR_NULL(ss->dma.dma_chan[SPRD_SPI_TX])) { in sprd_spi_dma_request()
561 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_RX]); in sprd_spi_dma_request()
562 return dev_err_probe(ss->dev, PTR_ERR(ss->dma.dma_chan[SPRD_SPI_TX]), in sprd_spi_dma_request()
571 if (ss->dma.dma_chan[SPRD_SPI_RX]) in sprd_spi_dma_release()
572 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_RX]); in sprd_spi_dma_release()
574 if (ss->dma.dma_chan[SPRD_SPI_TX]) in sprd_spi_dma_release()
575 dma_release_channel(ss->dma.dma_chan[SPRD_SPI_TX]); in sprd_spi_dma_release()
581 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); in sprd_spi_dma_txrx_bufs()
582 u32 trans_len = ss->trans_len; in sprd_spi_dma_txrx_bufs()
585 reinit_completion(&ss->xfer_completion); in sprd_spi_dma_txrx_bufs()
587 if (ss->trans_mode & SPRD_SPI_TX_MODE) { in sprd_spi_dma_txrx_bufs()
592 * For our 3 wires mode or dual TX line mode, we need in sprd_spi_dma_txrx_bufs()
595 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_dma_txrx_bufs()
601 * For our 3 wires mode or dual TX line mode, we need in sprd_spi_dma_txrx_bufs()
604 if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) in sprd_spi_dma_txrx_bufs()
607 write_size = ss->write_bufs(ss, trans_len); in sprd_spi_dma_txrx_bufs()
612 dev_err(ss->dev, "failed to write, ret = %d\n", ret); in sprd_spi_dma_txrx_bufs()
616 if (ss->trans_mode & SPRD_SPI_RX_MODE) { in sprd_spi_dma_txrx_bufs()
619 * integral multiple of fragment length. But when the length in sprd_spi_dma_txrx_bufs()
620 * of received data is less than fragment length, DMA can be in sprd_spi_dma_txrx_bufs()
622 * of received data. in sprd_spi_dma_txrx_bufs()
624 ss->dma.rx_len = t->len > ss->dma.fragmens_len ? in sprd_spi_dma_txrx_bufs()
625 (t->len - t->len % ss->dma.fragmens_len) : in sprd_spi_dma_txrx_bufs()
626 t->len; in sprd_spi_dma_txrx_bufs()
629 dev_err(&sdev->dev, in sprd_spi_dma_txrx_bufs()
636 wait_for_completion(&(ss->xfer_completion)); in sprd_spi_dma_txrx_bufs()
638 if (ss->trans_mode & SPRD_SPI_TX_MODE) in sprd_spi_dma_txrx_bufs()
641 ret = ss->dma.rx_len; in sprd_spi_dma_txrx_bufs()
655 * prescale = SPI source clock / (2 * SPI_freq) - 1; in sprd_spi_set_speed()
657 u32 clk_div = DIV_ROUND_UP(ss->src_clk, speed_hz << 1) - 1; in sprd_spi_set_speed()
660 ss->hw_speed_hz = (ss->src_clk >> 1) / (clk_div + 1); in sprd_spi_set_speed()
661 writel_relaxed(clk_div, ss->base + SPRD_SPI_CLKD); in sprd_spi_set_speed()
666 struct spi_delay *d = &t->word_delay; in sprd_spi_init_hw()
670 if (d->unit != SPI_DELAY_UNIT_SCK) in sprd_spi_init_hw()
671 return -EINVAL; in sprd_spi_init_hw()
673 val = readl_relaxed(ss->base + SPRD_SPI_CTL0); in sprd_spi_init_hw()
676 val |= ss->hw_mode & SPI_CPHA ? SPRD_SPI_NG_RX : SPRD_SPI_NG_TX; in sprd_spi_init_hw()
677 val |= ss->hw_mode & SPI_CPOL ? SPRD_SPI_SCK_REV : 0; in sprd_spi_init_hw()
678 writel_relaxed(val, ss->base + SPRD_SPI_CTL0); in sprd_spi_init_hw()
681 * Set the intervals of two SPI frames, and the inteval calculation in sprd_spi_init_hw()
685 word_delay = clamp_t(u16, d->value, SPRD_SPI_MIN_DELAY_CYCLE, in sprd_spi_init_hw()
687 interval = DIV_ROUND_UP(word_delay - 10, 4); in sprd_spi_init_hw()
688 ss->word_delay = interval * 4 + 10; in sprd_spi_init_hw()
689 writel_relaxed(interval, ss->base + SPRD_SPI_CTL5); in sprd_spi_init_hw()
692 writel_relaxed(1, ss->base + SPRD_SPI_FIFO_RST); in sprd_spi_init_hw()
693 writel_relaxed(0, ss->base + SPRD_SPI_FIFO_RST); in sprd_spi_init_hw()
696 val = readl_relaxed(ss->base + SPRD_SPI_CTL7); in sprd_spi_init_hw()
699 if (ss->hw_mode & SPI_3WIRE) in sprd_spi_init_hw()
704 if (ss->hw_mode & SPI_TX_DUAL) in sprd_spi_init_hw()
709 writel_relaxed(val, ss->base + SPRD_SPI_CTL7); in sprd_spi_init_hw()
717 struct sprd_spi *ss = spi_controller_get_devdata(sdev->controller); in sprd_spi_setup_transfer()
718 u8 bits_per_word = t->bits_per_word; in sprd_spi_setup_transfer()
722 ss->len = t->len; in sprd_spi_setup_transfer()
723 ss->tx_buf = t->tx_buf; in sprd_spi_setup_transfer()
724 ss->rx_buf = t->rx_buf; in sprd_spi_setup_transfer()
726 ss->hw_mode = sdev->mode; in sprd_spi_setup_transfer()
732 sprd_spi_set_speed(ss, t->speed_hz); in sprd_spi_setup_transfer()
742 ss->trans_len = t->len; in sprd_spi_setup_transfer()
743 ss->read_bufs = sprd_spi_read_bufs_u8; in sprd_spi_setup_transfer()
744 ss->write_bufs = sprd_spi_write_bufs_u8; in sprd_spi_setup_transfer()
745 ss->dma.width = DMA_SLAVE_BUSWIDTH_1_BYTE; in sprd_spi_setup_transfer()
746 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP; in sprd_spi_setup_transfer()
749 ss->trans_len = t->len >> 1; in sprd_spi_setup_transfer()
750 ss->read_bufs = sprd_spi_read_bufs_u16; in sprd_spi_setup_transfer()
751 ss->write_bufs = sprd_spi_write_bufs_u16; in sprd_spi_setup_transfer()
752 ss->dma.width = DMA_SLAVE_BUSWIDTH_2_BYTES; in sprd_spi_setup_transfer()
753 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP << 1; in sprd_spi_setup_transfer()
756 ss->trans_len = t->len >> 2; in sprd_spi_setup_transfer()
757 ss->read_bufs = sprd_spi_read_bufs_u32; in sprd_spi_setup_transfer()
758 ss->write_bufs = sprd_spi_write_bufs_u32; in sprd_spi_setup_transfer()
759 ss->dma.width = DMA_SLAVE_BUSWIDTH_4_BYTES; in sprd_spi_setup_transfer()
760 ss->dma.fragmens_len = SPRD_SPI_DMA_STEP << 2; in sprd_spi_setup_transfer()
763 return -EINVAL; in sprd_spi_setup_transfer()
767 val = readl_relaxed(ss->base + SPRD_SPI_CTL1); in sprd_spi_setup_transfer()
769 if (t->tx_buf) in sprd_spi_setup_transfer()
771 if (t->rx_buf) in sprd_spi_setup_transfer()
774 writel_relaxed(val | mode, ss->base + SPRD_SPI_CTL1); in sprd_spi_setup_transfer()
776 ss->trans_mode = mode; in sprd_spi_setup_transfer()
782 if (ss->trans_mode == SPRD_SPI_RX_MODE) in sprd_spi_setup_transfer()
783 ss->write_bufs = sprd_spi_write_only_receive; in sprd_spi_setup_transfer()
798 if (sctlr->can_dma(sctlr, sdev, t)) in sprd_spi_transfer_one()
803 if (ret == t->len) in sprd_spi_transfer_one()
806 ret = -EREMOTEIO; in sprd_spi_transfer_one()
817 u32 val = readl_relaxed(ss->base + SPRD_SPI_INT_MASK_STS); in sprd_spi_handle_irq()
820 writel_relaxed(SPRD_SPI_TX_END_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_handle_irq()
821 if (!(ss->trans_mode & SPRD_SPI_RX_MODE)) in sprd_spi_handle_irq()
822 complete(&ss->xfer_completion); in sprd_spi_handle_irq()
828 writel_relaxed(SPRD_SPI_RX_END_CLR, ss->base + SPRD_SPI_INT_CLR); in sprd_spi_handle_irq()
829 if (ss->dma.rx_len < ss->len) { in sprd_spi_handle_irq()
830 ss->rx_buf += ss->dma.rx_len; in sprd_spi_handle_irq()
831 ss->dma.rx_len += in sprd_spi_handle_irq()
832 ss->read_bufs(ss, ss->len - ss->dma.rx_len); in sprd_spi_handle_irq()
834 complete(&ss->xfer_completion); in sprd_spi_handle_irq()
846 ss->irq = platform_get_irq(pdev, 0); in sprd_spi_irq_init()
847 if (ss->irq < 0) in sprd_spi_irq_init()
848 return ss->irq; in sprd_spi_irq_init()
850 ret = devm_request_irq(&pdev->dev, ss->irq, sprd_spi_handle_irq, in sprd_spi_irq_init()
851 0, pdev->name, ss); in sprd_spi_irq_init()
853 dev_err(&pdev->dev, "failed to request spi irq %d, ret = %d\n", in sprd_spi_irq_init()
854 ss->irq, ret); in sprd_spi_irq_init()
863 clk_spi = devm_clk_get(&pdev->dev, "spi"); in sprd_spi_clk_init()
865 dev_warn(&pdev->dev, "can't get the spi clock\n"); in sprd_spi_clk_init()
869 clk_parent = devm_clk_get(&pdev->dev, "source"); in sprd_spi_clk_init()
871 dev_warn(&pdev->dev, "can't get the source clock\n"); in sprd_spi_clk_init()
875 ss->clk = devm_clk_get(&pdev->dev, "enable"); in sprd_spi_clk_init()
876 if (IS_ERR(ss->clk)) { in sprd_spi_clk_init()
877 dev_err(&pdev->dev, "can't get the enable clock\n"); in sprd_spi_clk_init()
878 return PTR_ERR(ss->clk); in sprd_spi_clk_init()
882 ss->src_clk = clk_get_rate(clk_spi); in sprd_spi_clk_init()
884 ss->src_clk = SPRD_SPI_DEFAULT_SOURCE; in sprd_spi_clk_init()
894 return ss->dma.enable && (t->len > SPRD_SPI_FIFO_SIZE); in sprd_spi_can_dma()
903 if (ret == -EPROBE_DEFER) in sprd_spi_dma_init()
906 dev_warn(&pdev->dev, in sprd_spi_dma_init()
913 ss->dma.enable = true; in sprd_spi_dma_init()
925 pdev->id = of_alias_get_id(pdev->dev.of_node, "spi"); in sprd_spi_probe()
926 sctlr = spi_alloc_host(&pdev->dev, sizeof(*ss)); in sprd_spi_probe()
928 return -ENOMEM; in sprd_spi_probe()
931 ss->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in sprd_spi_probe()
932 if (IS_ERR(ss->base)) { in sprd_spi_probe()
933 ret = PTR_ERR(ss->base); in sprd_spi_probe()
937 ss->phy_base = res->start; in sprd_spi_probe()
938 ss->dev = &pdev->dev; in sprd_spi_probe()
939 sctlr->dev.of_node = pdev->dev.of_node; in sprd_spi_probe()
940 sctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE | SPI_TX_DUAL; in sprd_spi_probe()
941 sctlr->bus_num = pdev->id; in sprd_spi_probe()
942 sctlr->set_cs = sprd_spi_chipselect; in sprd_spi_probe()
943 sctlr->transfer_one = sprd_spi_transfer_one; in sprd_spi_probe()
944 sctlr->can_dma = sprd_spi_can_dma; in sprd_spi_probe()
945 sctlr->auto_runtime_pm = true; in sprd_spi_probe()
946 sctlr->max_speed_hz = min_t(u32, ss->src_clk >> 1, in sprd_spi_probe()
949 init_completion(&ss->xfer_completion); in sprd_spi_probe()
963 ret = clk_prepare_enable(ss->clk); in sprd_spi_probe()
967 ret = pm_runtime_set_active(&pdev->dev); in sprd_spi_probe()
971 pm_runtime_set_autosuspend_delay(&pdev->dev, in sprd_spi_probe()
973 pm_runtime_use_autosuspend(&pdev->dev); in sprd_spi_probe()
974 pm_runtime_enable(&pdev->dev); in sprd_spi_probe()
975 ret = pm_runtime_get_sync(&pdev->dev); in sprd_spi_probe()
977 dev_err(&pdev->dev, "failed to resume SPI controller\n"); in sprd_spi_probe()
981 ret = devm_spi_register_controller(&pdev->dev, sctlr); in sprd_spi_probe()
985 pm_runtime_mark_last_busy(&pdev->dev); in sprd_spi_probe()
986 pm_runtime_put_autosuspend(&pdev->dev); in sprd_spi_probe()
991 pm_runtime_put_noidle(&pdev->dev); in sprd_spi_probe()
992 pm_runtime_disable(&pdev->dev); in sprd_spi_probe()
994 clk_disable_unprepare(ss->clk); in sprd_spi_probe()
1009 ret = pm_runtime_get_sync(ss->dev); in sprd_spi_remove()
1011 dev_err(ss->dev, "failed to resume SPI controller\n"); in sprd_spi_remove()
1016 if (ss->dma.enable) in sprd_spi_remove()
1018 clk_disable_unprepare(ss->clk); in sprd_spi_remove()
1020 pm_runtime_put_noidle(&pdev->dev); in sprd_spi_remove()
1021 pm_runtime_disable(&pdev->dev); in sprd_spi_remove()
1029 if (ss->dma.enable) in sprd_spi_runtime_suspend()
1032 clk_disable_unprepare(ss->clk); in sprd_spi_runtime_suspend()
1043 ret = clk_prepare_enable(ss->clk); in sprd_spi_runtime_resume()
1047 if (!ss->dma.enable) in sprd_spi_runtime_resume()
1052 clk_disable_unprepare(ss->clk); in sprd_spi_runtime_resume()
1063 { .compatible = "sprd,sc9860-spi", },
1066 MODULE_DEVICE_TABLE(of, sprd_spi_of_match);
1070 .name = "sprd-spi",