Lines Matching +full:spi +full:- +full:src +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH MSIOF SPI Controller Interface
7 * Copyright (C) 2014-2017 Glider bvba
11 #include <linux/clk.h>
14 #include <linux/dma-mapping.h>
27 #include <linux/spi/sh_msiof.h>
28 #include <linux/spi/spi.h>
46 struct clk *clk; member
87 #define SIMDR1_SYNCMD_SPI (2 << 28) /* Level mode/SPI */
89 #define SIMDR1_SYNCAC_SHIFT 25 /* Sync Polarity (1 = Active-low) */
93 #define SIMDR1_FLD_MASK GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */
102 #define SIMDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */
103 #define SIMDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */
107 #define SISCR_BRPS_MASK GENMASK(12, 8) /* Prescaler Setting (1-32) */
108 #define SISCR_BRPS(i) (((i) - 1) << 8)
129 #define SICTR_TXDIZ_HIZ (2 << 22) /* High-impedance */
199 return ioread16(p->mapbase + reg_offs); in sh_msiof_read()
201 return ioread32(p->mapbase + reg_offs); in sh_msiof_read()
211 iowrite16(value, p->mapbase + reg_offs); in sh_msiof_write()
214 iowrite32(value, p->mapbase + reg_offs); in sh_msiof_write()
230 return readl_poll_timeout_atomic(p->mapbase + SICTR, data, in sh_msiof_modify_ctr_wait()
240 complete(&p->done); in sh_msiof_spi_irq()
254 readl_poll_timeout_atomic(p->mapbase + SICTR, data, !(data & mask), 1, in sh_msiof_spi_reset_regs()
266 unsigned long parent_rate = clk_get_rate(p->clk); in sh_msiof_spi_set_clk_regs()
267 unsigned int div_pow = p->min_div_pow; in sh_msiof_spi_set_clk_regs()
268 u32 spi_hz = t->speed_hz; in sh_msiof_spi_set_clk_regs()
293 dev_err(&p->pdev->dev, in sh_msiof_spi_set_clk_regs()
294 "Requested SPI transfer rate %d is too low\n", spi_hz); in sh_msiof_spi_set_clk_regs()
299 t->effective_speed_hz = parent_rate / (brps << div_pow); in sh_msiof_spi_set_clk_regs()
303 if (!(p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_clk_regs()
310 * DTDL/SYNCDL bit : p->info->dtdl or p->info->syncdl in sh_msiof_get_delay_bit()
328 if (!p->info) in sh_msiof_spi_get_dtdl_and_syncdl()
332 if (p->info->dtdl > 200 || p->info->syncdl > 300) { in sh_msiof_spi_get_dtdl_and_syncdl()
333 dev_warn(&p->pdev->dev, "DTDL or SYNCDL is too large\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
338 if ((p->info->dtdl + p->info->syncdl) % 100) { in sh_msiof_spi_get_dtdl_and_syncdl()
339 dev_warn(&p->pdev->dev, "the sum of DTDL/SYNCDL is not good\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
343 val = sh_msiof_get_delay_bit(p->info->dtdl) << SIMDR1_DTDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
344 val |= sh_msiof_get_delay_bit(p->info->syncdl) << SIMDR1_SYNCDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
367 if (spi_controller_is_target(p->ctlr)) { in sh_msiof_spi_set_pin_regs()
374 if (p->ctlr->flags & SPI_CONTROLLER_MUST_TX) { in sh_msiof_spi_set_pin_regs()
398 if (tx_buf || (p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_mode_regs()
553 static int sh_msiof_spi_setup(struct spi_device *spi) in sh_msiof_spi_setup() argument
556 spi_controller_get_devdata(spi->controller); in sh_msiof_spi_setup()
559 if (spi_get_csgpiod(spi, 0) || spi_controller_is_target(p->ctlr)) in sh_msiof_spi_setup()
562 if (p->native_cs_inited && in sh_msiof_spi_setup()
563 (p->native_cs_high == !!(spi->mode & SPI_CS_HIGH))) in sh_msiof_spi_setup()
569 if (spi->mode & SPI_CS_HIGH) in sh_msiof_spi_setup()
573 pm_runtime_get_sync(&p->pdev->dev); in sh_msiof_spi_setup()
578 pm_runtime_put(&p->pdev->dev); in sh_msiof_spi_setup()
579 p->native_cs_high = spi->mode & SPI_CS_HIGH; in sh_msiof_spi_setup()
580 p->native_cs_inited = true; in sh_msiof_spi_setup()
588 const struct spi_device *spi = msg->spi; in sh_msiof_prepare_message() local
592 if (spi_get_csgpiod(spi, 0)) { in sh_msiof_prepare_message()
593 ss = ctlr->unused_native_cs; in sh_msiof_prepare_message()
594 cs_high = p->native_cs_high; in sh_msiof_prepare_message()
596 ss = spi_get_chipselect(spi, 0); in sh_msiof_prepare_message()
597 cs_high = !!(spi->mode & SPI_CS_HIGH); in sh_msiof_prepare_message()
599 sh_msiof_spi_set_pin_regs(p, ss, !!(spi->mode & SPI_CPOL), in sh_msiof_prepare_message()
600 !!(spi->mode & SPI_CPHA), in sh_msiof_prepare_message()
601 !!(spi->mode & SPI_3WIRE), in sh_msiof_prepare_message()
602 !!(spi->mode & SPI_LSB_FIRST), cs_high); in sh_msiof_prepare_message()
608 bool target = spi_controller_is_target(p->ctlr); in sh_msiof_spi_start()
628 bool target = spi_controller_is_target(p->ctlr); in sh_msiof_spi_stop()
648 p->target_aborted = true; in sh_msiof_target_abort()
649 complete(&p->done); in sh_msiof_target_abort()
650 complete(&p->done_txdma); in sh_msiof_target_abort()
657 if (spi_controller_is_target(p->ctlr)) { in sh_msiof_wait_for_completion()
659 p->target_aborted) { in sh_msiof_wait_for_completion()
660 dev_dbg(&p->pdev->dev, "interrupted\n"); in sh_msiof_wait_for_completion()
661 return -EINTR; in sh_msiof_wait_for_completion()
665 dev_err(&p->pdev->dev, "timeout\n"); in sh_msiof_wait_for_completion()
666 return -ETIMEDOUT; in sh_msiof_wait_for_completion()
686 words = min_t(int, words, p->tx_fifo_size); in sh_msiof_spi_txrx_once()
688 words = min_t(int, words, p->rx_fifo_size); in sh_msiof_spi_txrx_once()
691 fifo_shift = 32 - bits; in sh_msiof_spi_txrx_once()
704 reinit_completion(&p->done); in sh_msiof_spi_txrx_once()
705 p->target_aborted = false; in sh_msiof_spi_txrx_once()
709 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_spi_txrx_once()
714 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_spi_txrx_once()
727 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_spi_txrx_once()
757 desc_rx = dmaengine_prep_slave_single(p->ctlr->dma_rx, in sh_msiof_dma_once()
758 p->rx_dma_addr, len, DMA_DEV_TO_MEM, in sh_msiof_dma_once()
761 return -EAGAIN; in sh_msiof_dma_once()
763 desc_rx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
764 desc_rx->callback_param = &p->done; in sh_msiof_dma_once()
772 dma_sync_single_for_device(p->ctlr->dma_tx->device->dev, in sh_msiof_dma_once()
773 p->tx_dma_addr, len, DMA_TO_DEVICE); in sh_msiof_dma_once()
774 desc_tx = dmaengine_prep_slave_single(p->ctlr->dma_tx, in sh_msiof_dma_once()
775 p->tx_dma_addr, len, DMA_MEM_TO_DEV, in sh_msiof_dma_once()
778 ret = -EAGAIN; in sh_msiof_dma_once()
782 desc_tx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
783 desc_tx->callback_param = &p->done_txdma; in sh_msiof_dma_once()
794 /* setup msiof transfer mode registers (32-bit words) */ in sh_msiof_dma_once()
799 reinit_completion(&p->done); in sh_msiof_dma_once()
801 reinit_completion(&p->done_txdma); in sh_msiof_dma_once()
802 p->target_aborted = false; in sh_msiof_dma_once()
806 dma_async_issue_pending(p->ctlr->dma_rx); in sh_msiof_dma_once()
808 dma_async_issue_pending(p->ctlr->dma_tx); in sh_msiof_dma_once()
812 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_dma_once()
818 ret = sh_msiof_wait_for_completion(p, &p->done_txdma); in sh_msiof_dma_once()
825 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
833 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
843 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_dma_once()
848 dma_sync_single_for_cpu(p->ctlr->dma_rx->device->dev, in sh_msiof_dma_once()
849 p->rx_dma_addr, len, DMA_FROM_DEVICE); in sh_msiof_dma_once()
858 dmaengine_terminate_sync(p->ctlr->dma_tx); in sh_msiof_dma_once()
861 dmaengine_terminate_sync(p->ctlr->dma_rx); in sh_msiof_dma_once()
866 static void copy_bswap32(u32 *dst, const u32 *src, unsigned int words) in copy_bswap32() argument
868 /* src or dst can be unaligned, but not both */ in copy_bswap32()
869 if ((unsigned long)src & 3) { in copy_bswap32()
870 while (words--) { in copy_bswap32()
871 *dst++ = swab32(get_unaligned(src)); in copy_bswap32()
872 src++; in copy_bswap32()
875 while (words--) { in copy_bswap32()
876 put_unaligned(swab32(*src++), dst); in copy_bswap32()
880 while (words--) in copy_bswap32()
881 *dst++ = swab32(*src++); in copy_bswap32()
885 static void copy_wswap32(u32 *dst, const u32 *src, unsigned int words) in copy_wswap32() argument
887 /* src or dst can be unaligned, but not both */ in copy_wswap32()
888 if ((unsigned long)src & 3) { in copy_wswap32()
889 while (words--) { in copy_wswap32()
890 *dst++ = swahw32(get_unaligned(src)); in copy_wswap32()
891 src++; in copy_wswap32()
894 while (words--) { in copy_wswap32()
895 put_unaligned(swahw32(*src++), dst); in copy_wswap32()
899 while (words--) in copy_wswap32()
900 *dst++ = swahw32(*src++); in copy_wswap32()
904 static void copy_plain32(u32 *dst, const u32 *src, unsigned int words) in copy_plain32() argument
906 memcpy(dst, src, words * 4); in copy_plain32()
910 struct spi_device *spi, in sh_msiof_transfer_one() argument
917 const void *tx_buf = t->tx_buf; in sh_msiof_transfer_one()
918 void *rx_buf = t->rx_buf; in sh_msiof_transfer_one()
919 unsigned int len = t->len; in sh_msiof_transfer_one()
920 unsigned int bits = t->bits_per_word; in sh_msiof_transfer_one()
931 if (!spi_controller_is_target(p->ctlr)) in sh_msiof_transfer_one()
934 while (ctlr->dma_tx && len > 15) { in sh_msiof_transfer_one()
936 * DMA supports 32-bit words only, hence pack 8-bit and 16-bit in sh_msiof_transfer_one()
942 l = min(round_down(len, 4), p->tx_fifo_size * 4); in sh_msiof_transfer_one()
944 l = min(round_down(len, 4), p->rx_fifo_size * 4); in sh_msiof_transfer_one()
955 copy32(p->tx_dma_page, tx_buf, l / 4); in sh_msiof_transfer_one()
958 if (ret == -EAGAIN) { in sh_msiof_transfer_one()
959 dev_warn_once(&p->pdev->dev, in sh_msiof_transfer_one()
967 copy32(rx_buf, p->rx_dma_page, l / 4); in sh_msiof_transfer_one()
973 len -= l; in sh_msiof_transfer_one()
1038 words -= n; in sh_msiof_transfer_one()
1042 bits = t->bits_per_word; in sh_msiof_transfer_one()
1089 { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
1090 { .compatible = "renesas,msiof-r8a7743", .data = &rcar_gen2_data },
1091 { .compatible = "renesas,msiof-r8a7745", .data = &rcar_gen2_data },
1092 { .compatible = "renesas,msiof-r8a7790", .data = &rcar_gen2_data },
1093 { .compatible = "renesas,msiof-r8a7791", .data = &rcar_gen2_data },
1094 { .compatible = "renesas,msiof-r8a7792", .data = &rcar_gen2_data },
1095 { .compatible = "renesas,msiof-r8a7793", .data = &rcar_gen2_data },
1096 { .compatible = "renesas,msiof-r8a7794", .data = &rcar_gen2_data },
1097 { .compatible = "renesas,rcar-gen2-msiof", .data = &rcar_gen2_data },
1098 { .compatible = "renesas,msiof-r8a7795", .data = &rcar_r8a7795_data },
1099 { .compatible = "renesas,msiof-r8a7796", .data = &rcar_gen3_data },
1100 { .compatible = "renesas,rcar-gen3-msiof", .data = &rcar_gen3_data },
1101 { .compatible = "renesas,rcar-gen4-msiof", .data = &rcar_gen3_data },
1102 { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */
1111 struct device_node *np = dev->of_node; in sh_msiof_spi_parse_dt()
1118 info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_TARGET in sh_msiof_spi_parse_dt()
1122 if (info->mode == MSIOF_SPI_HOST) in sh_msiof_spi_parse_dt()
1123 of_property_read_u32(np, "num-cs", &num_cs); in sh_msiof_spi_parse_dt()
1124 of_property_read_u32(np, "renesas,tx-fifo-size", in sh_msiof_spi_parse_dt()
1125 &info->tx_fifo_override); in sh_msiof_spi_parse_dt()
1126 of_property_read_u32(np, "renesas,rx-fifo-size", in sh_msiof_spi_parse_dt()
1127 &info->rx_fifo_override); in sh_msiof_spi_parse_dt()
1128 of_property_read_u32(np, "renesas,dtdl", &info->dtdl); in sh_msiof_spi_parse_dt()
1129 of_property_read_u32(np, "renesas,syncdl", &info->syncdl); in sh_msiof_spi_parse_dt()
1131 info->num_chipselect = num_cs; in sh_msiof_spi_parse_dt()
1183 struct platform_device *pdev = p->pdev; in sh_msiof_request_dma()
1184 struct device *dev = &pdev->dev; in sh_msiof_request_dma()
1185 const struct sh_msiof_spi_info *info = p->info; in sh_msiof_request_dma()
1191 if (dev->of_node) { in sh_msiof_request_dma()
1195 } else if (info && info->dma_tx_id && info->dma_rx_id) { in sh_msiof_request_dma()
1196 dma_tx_id = info->dma_tx_id; in sh_msiof_request_dma()
1197 dma_rx_id = info->dma_rx_id; in sh_msiof_request_dma()
1208 ctlr = p->ctlr; in sh_msiof_request_dma()
1209 ctlr->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV, in sh_msiof_request_dma()
1210 dma_tx_id, res->start + SITFDR); in sh_msiof_request_dma()
1211 if (!ctlr->dma_tx) in sh_msiof_request_dma()
1212 return -ENODEV; in sh_msiof_request_dma()
1214 ctlr->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM, in sh_msiof_request_dma()
1215 dma_rx_id, res->start + SIRFDR); in sh_msiof_request_dma()
1216 if (!ctlr->dma_rx) in sh_msiof_request_dma()
1219 p->tx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1220 if (!p->tx_dma_page) in sh_msiof_request_dma()
1223 p->rx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1224 if (!p->rx_dma_page) in sh_msiof_request_dma()
1227 tx_dev = ctlr->dma_tx->device->dev; in sh_msiof_request_dma()
1228 p->tx_dma_addr = dma_map_single(tx_dev, p->tx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1230 if (dma_mapping_error(tx_dev, p->tx_dma_addr)) in sh_msiof_request_dma()
1233 rx_dev = ctlr->dma_rx->device->dev; in sh_msiof_request_dma()
1234 p->rx_dma_addr = dma_map_single(rx_dev, p->rx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1236 if (dma_mapping_error(rx_dev, p->rx_dma_addr)) in sh_msiof_request_dma()
1243 dma_unmap_single(tx_dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); in sh_msiof_request_dma()
1245 free_page((unsigned long)p->rx_dma_page); in sh_msiof_request_dma()
1247 free_page((unsigned long)p->tx_dma_page); in sh_msiof_request_dma()
1249 dma_release_channel(ctlr->dma_rx); in sh_msiof_request_dma()
1251 dma_release_channel(ctlr->dma_tx); in sh_msiof_request_dma()
1252 ctlr->dma_tx = NULL; in sh_msiof_request_dma()
1253 return -ENODEV; in sh_msiof_request_dma()
1258 struct spi_controller *ctlr = p->ctlr; in sh_msiof_release_dma()
1260 if (!ctlr->dma_tx) in sh_msiof_release_dma()
1263 dma_unmap_single(ctlr->dma_rx->device->dev, p->rx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1265 dma_unmap_single(ctlr->dma_tx->device->dev, p->tx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1267 free_page((unsigned long)p->rx_dma_page); in sh_msiof_release_dma()
1268 free_page((unsigned long)p->tx_dma_page); in sh_msiof_release_dma()
1269 dma_release_channel(ctlr->dma_rx); in sh_msiof_release_dma()
1270 dma_release_channel(ctlr->dma_tx); in sh_msiof_release_dma()
1283 chipdata = of_device_get_match_data(&pdev->dev); in sh_msiof_spi_probe()
1285 info = sh_msiof_spi_parse_dt(&pdev->dev); in sh_msiof_spi_probe()
1287 chipdata = (const void *)pdev->id_entry->driver_data; in sh_msiof_spi_probe()
1288 info = dev_get_platdata(&pdev->dev); in sh_msiof_spi_probe()
1292 dev_err(&pdev->dev, "failed to obtain device info\n"); in sh_msiof_spi_probe()
1293 return -ENXIO; in sh_msiof_spi_probe()
1296 if (chipdata->flags & SH_MSIOF_FLAG_FIXED_DTDL_200) in sh_msiof_spi_probe()
1297 info->dtdl = 200; in sh_msiof_spi_probe()
1299 if (info->mode == MSIOF_SPI_TARGET) in sh_msiof_spi_probe()
1300 ctlr = spi_alloc_target(&pdev->dev, in sh_msiof_spi_probe()
1303 ctlr = spi_alloc_host(&pdev->dev, in sh_msiof_spi_probe()
1306 return -ENOMEM; in sh_msiof_spi_probe()
1311 p->ctlr = ctlr; in sh_msiof_spi_probe()
1312 p->info = info; in sh_msiof_spi_probe()
1313 p->min_div_pow = chipdata->min_div_pow; in sh_msiof_spi_probe()
1315 init_completion(&p->done); in sh_msiof_spi_probe()
1316 init_completion(&p->done_txdma); in sh_msiof_spi_probe()
1318 p->clk = devm_clk_get(&pdev->dev, NULL); in sh_msiof_spi_probe()
1319 if (IS_ERR(p->clk)) { in sh_msiof_spi_probe()
1320 dev_err(&pdev->dev, "cannot get clock\n"); in sh_msiof_spi_probe()
1321 ret = PTR_ERR(p->clk); in sh_msiof_spi_probe()
1331 p->mapbase = devm_platform_ioremap_resource(pdev, 0); in sh_msiof_spi_probe()
1332 if (IS_ERR(p->mapbase)) { in sh_msiof_spi_probe()
1333 ret = PTR_ERR(p->mapbase); in sh_msiof_spi_probe()
1337 ret = devm_request_irq(&pdev->dev, i, sh_msiof_spi_irq, 0, in sh_msiof_spi_probe()
1338 dev_name(&pdev->dev), p); in sh_msiof_spi_probe()
1340 dev_err(&pdev->dev, "unable to request irq\n"); in sh_msiof_spi_probe()
1344 p->pdev = pdev; in sh_msiof_spi_probe()
1345 pm_runtime_enable(&pdev->dev); in sh_msiof_spi_probe()
1348 p->tx_fifo_size = chipdata->tx_fifo_size; in sh_msiof_spi_probe()
1349 p->rx_fifo_size = chipdata->rx_fifo_size; in sh_msiof_spi_probe()
1350 if (p->info->tx_fifo_override) in sh_msiof_spi_probe()
1351 p->tx_fifo_size = p->info->tx_fifo_override; in sh_msiof_spi_probe()
1352 if (p->info->rx_fifo_override) in sh_msiof_spi_probe()
1353 p->rx_fifo_size = p->info->rx_fifo_override; in sh_msiof_spi_probe()
1356 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in sh_msiof_spi_probe()
1357 ctlr->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE; in sh_msiof_spi_probe()
1358 clksrc = clk_get_rate(p->clk); in sh_msiof_spi_probe()
1359 ctlr->min_speed_hz = DIV_ROUND_UP(clksrc, 1024); in sh_msiof_spi_probe()
1360 ctlr->max_speed_hz = DIV_ROUND_UP(clksrc, 1 << p->min_div_pow); in sh_msiof_spi_probe()
1361 ctlr->flags = chipdata->ctlr_flags; in sh_msiof_spi_probe()
1362 ctlr->bus_num = pdev->id; in sh_msiof_spi_probe()
1363 ctlr->num_chipselect = p->info->num_chipselect; in sh_msiof_spi_probe()
1364 ctlr->dev.of_node = pdev->dev.of_node; in sh_msiof_spi_probe()
1365 ctlr->setup = sh_msiof_spi_setup; in sh_msiof_spi_probe()
1366 ctlr->prepare_message = sh_msiof_prepare_message; in sh_msiof_spi_probe()
1367 ctlr->target_abort = sh_msiof_target_abort; in sh_msiof_spi_probe()
1368 ctlr->bits_per_word_mask = chipdata->bits_per_word_mask; in sh_msiof_spi_probe()
1369 ctlr->auto_runtime_pm = true; in sh_msiof_spi_probe()
1370 ctlr->transfer_one = sh_msiof_transfer_one; in sh_msiof_spi_probe()
1371 ctlr->use_gpio_descriptors = true; in sh_msiof_spi_probe()
1372 ctlr->max_native_cs = MAX_SS; in sh_msiof_spi_probe()
1376 dev_warn(&pdev->dev, "DMA not available, using PIO\n"); in sh_msiof_spi_probe()
1378 ret = devm_spi_register_controller(&pdev->dev, ctlr); in sh_msiof_spi_probe()
1380 dev_err(&pdev->dev, "devm_spi_register_controller error.\n"); in sh_msiof_spi_probe()
1388 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_probe()
1399 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_remove()
1413 return spi_controller_suspend(p->ctlr); in sh_msiof_spi_suspend()
1420 return spi_controller_resume(p->ctlr); in sh_msiof_spi_resume()
1442 MODULE_DESCRIPTION("SuperH MSIOF SPI Controller Interface Driver");