Lines Matching +full:cpu +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
21 #include "spi-pxa2xx.h"
28 struct spi_message *msg = drv_data->controller->cur_msg; in pxa2xx_spi_dma_transfer_complete()
31 * It is possible that one CPU is handling ROR interrupt and other in pxa2xx_spi_dma_transfer_complete()
36 if (atomic_dec_and_test(&drv_data->dma_running)) { in pxa2xx_spi_dma_transfer_complete()
38 * If the other CPU is still handling the ROR interrupt we in pxa2xx_spi_dma_transfer_complete()
39 * might not know about the error yet. So we re-check the in pxa2xx_spi_dma_transfer_complete()
43 error = read_SSSR_bits(drv_data, drv_data->mask_sr) & SSSR_ROR; in pxa2xx_spi_dma_transfer_complete()
46 clear_SSCR1_bits(drv_data, drv_data->dma_cr1); in pxa2xx_spi_dma_transfer_complete()
47 write_SSSR_CS(drv_data, drv_data->clear_sr); in pxa2xx_spi_dma_transfer_complete()
53 pxa_ssp_disable(drv_data->ssp); in pxa2xx_spi_dma_transfer_complete()
54 msg->status = -EIO; in pxa2xx_spi_dma_transfer_complete()
57 spi_finalize_current_transfer(drv_data->controller); in pxa2xx_spi_dma_transfer_complete()
72 struct dma_slave_config cfg; in pxa2xx_spi_dma_prepare_one() local
77 switch (drv_data->n_bytes) { in pxa2xx_spi_dma_prepare_one()
89 memset(&cfg, 0, sizeof(cfg)); in pxa2xx_spi_dma_prepare_one()
90 cfg.direction = dir; in pxa2xx_spi_dma_prepare_one()
93 cfg.dst_addr = drv_data->ssp->phys_base + SSDR; in pxa2xx_spi_dma_prepare_one()
94 cfg.dst_addr_width = width; in pxa2xx_spi_dma_prepare_one()
95 cfg.dst_maxburst = drv_data->controller_info->dma_burst_size; in pxa2xx_spi_dma_prepare_one()
97 sgt = &xfer->tx_sg; in pxa2xx_spi_dma_prepare_one()
98 chan = drv_data->controller->dma_tx; in pxa2xx_spi_dma_prepare_one()
100 cfg.src_addr = drv_data->ssp->phys_base + SSDR; in pxa2xx_spi_dma_prepare_one()
101 cfg.src_addr_width = width; in pxa2xx_spi_dma_prepare_one()
102 cfg.src_maxburst = drv_data->controller_info->dma_burst_size; in pxa2xx_spi_dma_prepare_one()
104 sgt = &xfer->rx_sg; in pxa2xx_spi_dma_prepare_one()
105 chan = drv_data->controller->dma_rx; in pxa2xx_spi_dma_prepare_one()
108 ret = dmaengine_slave_config(chan, &cfg); in pxa2xx_spi_dma_prepare_one()
110 dev_warn(drv_data->ssp->dev, "DMA slave config failed\n"); in pxa2xx_spi_dma_prepare_one()
114 return dmaengine_prep_slave_sg(chan, sgt->sgl, sgt->nents, dir, in pxa2xx_spi_dma_prepare_one()
122 status = read_SSSR_bits(drv_data, drv_data->mask_sr); in pxa2xx_spi_dma_transfer()
124 dev_err(drv_data->ssp->dev, "FIFO overrun\n"); in pxa2xx_spi_dma_transfer()
126 dmaengine_terminate_async(drv_data->controller->dma_rx); in pxa2xx_spi_dma_transfer()
127 dmaengine_terminate_async(drv_data->controller->dma_tx); in pxa2xx_spi_dma_transfer()
144 dev_err(drv_data->ssp->dev, "failed to get DMA TX descriptor\n"); in pxa2xx_spi_dma_prepare()
145 err = -EBUSY; in pxa2xx_spi_dma_prepare()
151 dev_err(drv_data->ssp->dev, "failed to get DMA RX descriptor\n"); in pxa2xx_spi_dma_prepare()
152 err = -EBUSY; in pxa2xx_spi_dma_prepare()
157 rx_desc->callback = pxa2xx_spi_dma_callback; in pxa2xx_spi_dma_prepare()
158 rx_desc->callback_param = drv_data; in pxa2xx_spi_dma_prepare()
165 dmaengine_terminate_async(drv_data->controller->dma_tx); in pxa2xx_spi_dma_prepare()
172 dma_async_issue_pending(drv_data->controller->dma_rx); in pxa2xx_spi_dma_start()
173 dma_async_issue_pending(drv_data->controller->dma_tx); in pxa2xx_spi_dma_start()
175 atomic_set(&drv_data->dma_running, 1); in pxa2xx_spi_dma_start()
180 atomic_set(&drv_data->dma_running, 0); in pxa2xx_spi_dma_stop()
181 dmaengine_terminate_sync(drv_data->controller->dma_rx); in pxa2xx_spi_dma_stop()
182 dmaengine_terminate_sync(drv_data->controller->dma_tx); in pxa2xx_spi_dma_stop()
187 struct pxa2xx_spi_controller *pdata = drv_data->controller_info; in pxa2xx_spi_dma_setup()
188 struct spi_controller *controller = drv_data->controller; in pxa2xx_spi_dma_setup()
189 struct device *dev = drv_data->ssp->dev; in pxa2xx_spi_dma_setup()
195 controller->dma_tx = dma_request_slave_channel_compat(mask, in pxa2xx_spi_dma_setup()
196 pdata->dma_filter, pdata->tx_param, dev, "tx"); in pxa2xx_spi_dma_setup()
197 if (!controller->dma_tx) in pxa2xx_spi_dma_setup()
198 return -ENODEV; in pxa2xx_spi_dma_setup()
200 controller->dma_rx = dma_request_slave_channel_compat(mask, in pxa2xx_spi_dma_setup()
201 pdata->dma_filter, pdata->rx_param, dev, "rx"); in pxa2xx_spi_dma_setup()
202 if (!controller->dma_rx) { in pxa2xx_spi_dma_setup()
203 dma_release_channel(controller->dma_tx); in pxa2xx_spi_dma_setup()
204 controller->dma_tx = NULL; in pxa2xx_spi_dma_setup()
205 return -ENODEV; in pxa2xx_spi_dma_setup()
213 struct spi_controller *controller = drv_data->controller; in pxa2xx_spi_dma_release()
215 if (controller->dma_rx) { in pxa2xx_spi_dma_release()
216 dmaengine_terminate_sync(controller->dma_rx); in pxa2xx_spi_dma_release()
217 dma_release_channel(controller->dma_rx); in pxa2xx_spi_dma_release()
218 controller->dma_rx = NULL; in pxa2xx_spi_dma_release()
220 if (controller->dma_tx) { in pxa2xx_spi_dma_release()
221 dmaengine_terminate_sync(controller->dma_tx); in pxa2xx_spi_dma_release()
222 dma_release_channel(controller->dma_tx); in pxa2xx_spi_dma_release()
223 controller->dma_tx = NULL; in pxa2xx_spi_dma_release()