Lines Matching +full:npcm845 +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk.h>
30 struct clk *clk; member
37 #define DRIVER_NAME "npcm-pspi"
70 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_enable()
72 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_enable()
79 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_disable()
81 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_disable()
88 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_enable()
90 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_enable()
97 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_disable()
99 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_disable()
104 struct npcm_pspi *priv = spi_controller_get_devdata(spi->controller); in npcm_pspi_set_mode()
108 switch (spi->mode & SPI_MODE_X_MASK) { in npcm_pspi_set_mode()
123 regtemp = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_set_mode()
125 iowrite16(regtemp | mode_val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_set_mode()
132 regtemp = ioread16(NPCM_PSPI_CTL1 + priv->base); in npcm_pspi_set_transfer_size()
143 iowrite16(regtemp, NPCM_PSPI_CTL1 + priv->base); in npcm_pspi_set_transfer_size()
152 ckdiv = DIV_ROUND_CLOSEST(clk_get_rate(priv->clk), (2 * speed)) - 1; in npcm_pspi_set_baudrate()
154 regtemp = ioread16(NPCM_PSPI_CTL1 + priv->base); in npcm_pspi_set_baudrate()
156 iowrite16(regtemp | (ckdiv << 9), NPCM_PSPI_CTL1 + priv->base); in npcm_pspi_set_baudrate()
162 struct npcm_pspi *priv = spi_controller_get_devdata(spi->controller); in npcm_pspi_setup_transfer()
164 priv->tx_buf = t->tx_buf; in npcm_pspi_setup_transfer()
165 priv->rx_buf = t->rx_buf; in npcm_pspi_setup_transfer()
166 priv->tx_bytes = t->len; in npcm_pspi_setup_transfer()
167 priv->rx_bytes = t->len; in npcm_pspi_setup_transfer()
169 if (!priv->is_save_param || priv->mode != spi->mode) { in npcm_pspi_setup_transfer()
171 priv->mode = spi->mode; in npcm_pspi_setup_transfer()
176 * then implement 16 bits-per-word transfer. in npcm_pspi_setup_transfer()
178 if (priv->bits_per_word == 8 && !(t->len & 0x1)) in npcm_pspi_setup_transfer()
179 t->bits_per_word = 16; in npcm_pspi_setup_transfer()
181 if (!priv->is_save_param || priv->bits_per_word != t->bits_per_word) { in npcm_pspi_setup_transfer()
182 npcm_pspi_set_transfer_size(priv, t->bits_per_word); in npcm_pspi_setup_transfer()
183 priv->bits_per_word = t->bits_per_word; in npcm_pspi_setup_transfer()
186 if (!priv->is_save_param || priv->speed_hz != t->speed_hz) { in npcm_pspi_setup_transfer()
187 npcm_pspi_set_baudrate(priv, t->speed_hz); in npcm_pspi_setup_transfer()
188 priv->speed_hz = t->speed_hz; in npcm_pspi_setup_transfer()
191 if (!priv->is_save_param) in npcm_pspi_setup_transfer()
192 priv->is_save_param = true; in npcm_pspi_setup_transfer()
200 wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes); in npcm_pspi_send()
201 priv->tx_bytes -= wsize; in npcm_pspi_send()
203 if (!priv->tx_buf) in npcm_pspi_send()
208 val = *priv->tx_buf++; in npcm_pspi_send()
209 iowrite8(val, NPCM_PSPI_DATA + priv->base); in npcm_pspi_send()
212 val = *priv->tx_buf++; in npcm_pspi_send()
213 val = *priv->tx_buf++ | (val << 8); in npcm_pspi_send()
214 iowrite16(val, NPCM_PSPI_DATA + priv->base); in npcm_pspi_send()
227 rsize = min(bytes_per_word(priv->bits_per_word), priv->rx_bytes); in npcm_pspi_recv()
228 priv->rx_bytes -= rsize; in npcm_pspi_recv()
230 if (!priv->rx_buf) in npcm_pspi_recv()
235 *priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA); in npcm_pspi_recv()
238 val = ioread16(priv->base + NPCM_PSPI_DATA); in npcm_pspi_recv()
239 *priv->rx_buf++ = (val >> 8); in npcm_pspi_recv()
240 *priv->rx_buf++ = val & 0xff; in npcm_pspi_recv()
256 reinit_completion(&priv->xfer_done); in npcm_pspi_transfer_one()
258 status = wait_for_completion_timeout(&priv->xfer_done, in npcm_pspi_transfer_one()
263 return -ETIMEDOUT; in npcm_pspi_transfer_one()
289 reset_control_assert(priv->reset); in npcm_pspi_reset_hw()
291 reset_control_deassert(priv->reset); in npcm_pspi_reset_hw()
299 stat = ioread8(priv->base + NPCM_PSPI_STAT); in npcm_pspi_handler()
301 if (!priv->tx_buf && !priv->rx_buf) in npcm_pspi_handler()
304 if (priv->tx_buf) { in npcm_pspi_handler()
306 ioread8(NPCM_PSPI_DATA + priv->base); in npcm_pspi_handler()
307 if (priv->tx_bytes == 0) { in npcm_pspi_handler()
309 complete(&priv->xfer_done); in npcm_pspi_handler()
315 if (priv->tx_bytes) in npcm_pspi_handler()
319 if (priv->rx_buf) { in npcm_pspi_handler()
321 if (!priv->rx_bytes) in npcm_pspi_handler()
326 if (!priv->rx_bytes) { in npcm_pspi_handler()
328 complete(&priv->xfer_done); in npcm_pspi_handler()
333 if (((stat & NPCM_PSPI_STAT_BSY) == 0) && !priv->tx_buf) in npcm_pspi_handler()
334 iowrite8(0x0, NPCM_PSPI_DATA + priv->base); in npcm_pspi_handler()
348 host = spi_alloc_host(&pdev->dev, sizeof(*priv)); in npcm_pspi_probe()
350 return -ENOMEM; in npcm_pspi_probe()
355 priv->host = host; in npcm_pspi_probe()
356 priv->is_save_param = false; in npcm_pspi_probe()
358 priv->base = devm_platform_ioremap_resource(pdev, 0); in npcm_pspi_probe()
359 if (IS_ERR(priv->base)) { in npcm_pspi_probe()
360 ret = PTR_ERR(priv->base); in npcm_pspi_probe()
364 priv->clk = devm_clk_get(&pdev->dev, NULL); in npcm_pspi_probe()
365 if (IS_ERR(priv->clk)) { in npcm_pspi_probe()
366 dev_err(&pdev->dev, "failed to get clock\n"); in npcm_pspi_probe()
367 ret = PTR_ERR(priv->clk); in npcm_pspi_probe()
371 ret = clk_prepare_enable(priv->clk); in npcm_pspi_probe()
381 priv->reset = devm_reset_control_get(&pdev->dev, NULL); in npcm_pspi_probe()
382 if (IS_ERR(priv->reset)) { in npcm_pspi_probe()
383 ret = PTR_ERR(priv->reset); in npcm_pspi_probe()
387 /* reset SPI-HW block */ in npcm_pspi_probe()
390 ret = devm_request_irq(&pdev->dev, irq, npcm_pspi_handler, 0, in npcm_pspi_probe()
391 "npcm-pspi", priv); in npcm_pspi_probe()
393 dev_err(&pdev->dev, "failed to request IRQ\n"); in npcm_pspi_probe()
397 init_completion(&priv->xfer_done); in npcm_pspi_probe()
399 clk_hz = clk_get_rate(priv->clk); in npcm_pspi_probe()
401 host->max_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MIN_CLK_DIVIDER); in npcm_pspi_probe()
402 host->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER); in npcm_pspi_probe()
403 host->mode_bits = SPI_CPHA | SPI_CPOL; in npcm_pspi_probe()
404 host->dev.of_node = pdev->dev.of_node; in npcm_pspi_probe()
405 host->bus_num = -1; in npcm_pspi_probe()
406 host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); in npcm_pspi_probe()
407 host->transfer_one = npcm_pspi_transfer_one; in npcm_pspi_probe()
408 host->prepare_transfer_hardware = in npcm_pspi_probe()
410 host->unprepare_transfer_hardware = in npcm_pspi_probe()
412 host->use_gpio_descriptors = true; in npcm_pspi_probe()
417 ret = devm_spi_register_controller(&pdev->dev, host); in npcm_pspi_probe()
421 pr_info("NPCM Peripheral SPI %d probed\n", host->bus_num); in npcm_pspi_probe()
426 clk_disable_unprepare(priv->clk); in npcm_pspi_probe()
439 clk_disable_unprepare(priv->clk); in npcm_pspi_remove()
443 { .compatible = "nuvoton,npcm750-pspi", .data = NULL },
444 { .compatible = "nuvoton,npcm845-pspi", .data = NULL },