Lines Matching full:ssp
59 struct mxs_ssp ssp; member
68 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_setup_transfer() local
77 mxs_ssp_set_clk_rate(ssp, hz); in mxs_spi_setup_transfer()
80 * ssp->clk_rate. Otherwise we would set the rate every transfer in mxs_spi_setup_transfer()
91 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_setup_transfer()
97 ssp->base + HW_SSP_CTRL1(ssp)); in mxs_spi_setup_transfer()
99 writel(0x0, ssp->base + HW_SSP_CMD0); in mxs_spi_setup_transfer()
100 writel(0x0, ssp->base + HW_SSP_CMD1); in mxs_spi_setup_transfer()
128 struct mxs_ssp *ssp = &spi->ssp; in mxs_ssp_wait() local
132 reg = readl_relaxed(ssp->base + offset); in mxs_ssp_wait()
155 struct mxs_ssp *ssp = dev_id; in mxs_ssp_irq_handler() local
157 dev_err(ssp->dev, "%s[%i] CTRL1=%08x STATUS=%08x\n", in mxs_ssp_irq_handler()
159 readl(ssp->base + HW_SSP_CTRL1(ssp)), in mxs_ssp_irq_handler()
160 readl(ssp->base + HW_SSP_STATUS(ssp))); in mxs_ssp_irq_handler()
168 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_txrx_dma() local
192 ctrl0 = readl(ssp->base + HW_SSP_CTRL0); in mxs_spi_txrx_dma()
212 if (ssp->devid == IMX23_SSP) { in mxs_spi_txrx_dma()
234 ret = dma_map_sg(ssp->dev, &dma_xfer[sg_count].sg, 1, in mxs_spi_txrx_dma()
241 desc = dmaengine_prep_slave_sg(ssp->dmach, in mxs_spi_txrx_dma()
243 (ssp->devid == IMX23_SSP) ? 1 : 4, in mxs_spi_txrx_dma()
247 dev_err(ssp->dev, in mxs_spi_txrx_dma()
253 desc = dmaengine_prep_slave_sg(ssp->dmach, in mxs_spi_txrx_dma()
259 dev_err(ssp->dev, in mxs_spi_txrx_dma()
275 dma_async_issue_pending(ssp->dmach); in mxs_spi_txrx_dma()
279 dev_err(ssp->dev, "DMA transfer timeout\n"); in mxs_spi_txrx_dma()
281 dmaengine_terminate_all(ssp->dmach); in mxs_spi_txrx_dma()
290 dma_unmap_sg(ssp->dev, &dma_xfer[sg_count].sg, 1, in mxs_spi_txrx_dma()
303 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_txrx_pio() local
306 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_spi_txrx_pio()
311 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_txrx_pio()
313 if (ssp->devid == IMX23_SSP) { in mxs_spi_txrx_pio()
315 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_spi_txrx_pio()
317 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_txrx_pio()
319 writel(1, ssp->base + HW_SSP_XFER_SIZE); in mxs_spi_txrx_pio()
324 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_spi_txrx_pio()
327 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_txrx_pio()
330 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_txrx_pio()
336 writel(*buf, ssp->base + HW_SSP_DATA(ssp)); in mxs_spi_txrx_pio()
339 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_txrx_pio()
342 if (mxs_ssp_wait(spi, HW_SSP_STATUS(ssp), in mxs_spi_txrx_pio()
346 *buf = (readl(ssp->base + HW_SSP_DATA(ssp)) & 0xff); in mxs_spi_txrx_pio()
365 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_transfer_one() local
372 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_spi_transfer_one()
374 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_transfer_one()
399 ssp->base + HW_SSP_CTRL1(ssp) + in mxs_spi_transfer_one()
412 ssp->base + HW_SSP_CTRL1(ssp) + in mxs_spi_transfer_one()
428 stmp_reset_block(ssp->base); in mxs_spi_transfer_one()
445 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_runtime_suspend() local
448 clk_disable_unprepare(ssp->clk); in mxs_spi_runtime_suspend()
452 int ret2 = clk_prepare_enable(ssp->clk); in mxs_spi_runtime_suspend()
466 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_runtime_resume() local
473 ret = clk_prepare_enable(ssp->clk); in mxs_spi_runtime_resume()
533 struct mxs_ssp *ssp; in mxs_spi_probe() local
579 ssp = &spi->ssp; in mxs_spi_probe()
580 ssp->dev = &pdev->dev; in mxs_spi_probe()
581 ssp->clk = clk; in mxs_spi_probe()
582 ssp->base = base; in mxs_spi_probe()
583 ssp->devid = devid; in mxs_spi_probe()
588 dev_name(&pdev->dev), ssp); in mxs_spi_probe()
592 ssp->dmach = dma_request_chan(&pdev->dev, "rx-tx"); in mxs_spi_probe()
593 if (IS_ERR(ssp->dmach)) { in mxs_spi_probe()
594 dev_err(ssp->dev, "Failed to request DMA\n"); in mxs_spi_probe()
595 ret = PTR_ERR(ssp->dmach); in mxs_spi_probe()
599 pm_runtime_enable(ssp->dev); in mxs_spi_probe()
600 if (!pm_runtime_enabled(ssp->dev)) { in mxs_spi_probe()
601 ret = mxs_spi_runtime_resume(ssp->dev); in mxs_spi_probe()
603 dev_err(ssp->dev, "runtime resume failed\n"); in mxs_spi_probe()
608 ret = pm_runtime_resume_and_get(ssp->dev); in mxs_spi_probe()
610 dev_err(ssp->dev, "runtime_get_sync failed\n"); in mxs_spi_probe()
614 clk_set_rate(ssp->clk, clk_freq); in mxs_spi_probe()
616 ret = stmp_reset_block(ssp->base); in mxs_spi_probe()
626 pm_runtime_put(ssp->dev); in mxs_spi_probe()
631 pm_runtime_put(ssp->dev); in mxs_spi_probe()
633 pm_runtime_disable(ssp->dev); in mxs_spi_probe()
635 dma_release_channel(ssp->dmach); in mxs_spi_probe()
645 struct mxs_ssp *ssp; in mxs_spi_remove() local
649 ssp = &spi->ssp; in mxs_spi_remove()
655 dma_release_channel(ssp->dmach); in mxs_spi_remove()