Lines Matching +full:vf610 +full:- +full:dspi
1 // SPDX-License-Identifier: GPL-2.0+
6 // Freescale DSPI driver
7 // This file contains a driver for the Freescale DSPI
12 #include <linux/dma-mapping.h>
21 #include <linux/spi/spi-fsl-dspi.h>
23 #define DRIVER_NAME "fsl-dspi"
106 #define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
107 #define SPI_FRAME_EBITS(bits) SPI_CTARE_FMSZE(((bits) - 1) >> 4)
136 VF610, enumerator
140 [VF610] = {
146 /* Has A-011218 DMA erratum */
152 /* Has A-011218 DMA erratum */
163 /* Has A-011218 DMA erratum */
169 /* Has A-011218 DMA erratum */
245 void (*host_to_dev)(struct fsl_dspi *dspi, u32 *txdata);
246 void (*dev_to_host)(struct fsl_dspi *dspi, u32 rxdata);
249 static void dspi_native_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_native_host_to_dev() argument
251 switch (dspi->oper_word_size) { in dspi_native_host_to_dev()
253 *txdata = *(u8 *)dspi->tx; in dspi_native_host_to_dev()
256 *txdata = *(u16 *)dspi->tx; in dspi_native_host_to_dev()
259 *txdata = *(u32 *)dspi->tx; in dspi_native_host_to_dev()
262 dspi->tx += dspi->oper_word_size; in dspi_native_host_to_dev()
265 static void dspi_native_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_native_dev_to_host() argument
267 switch (dspi->oper_word_size) { in dspi_native_dev_to_host()
269 *(u8 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
272 *(u16 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
275 *(u32 *)dspi->rx = rxdata; in dspi_native_dev_to_host()
278 dspi->rx += dspi->oper_word_size; in dspi_native_dev_to_host()
281 static void dspi_8on32_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_8on32_host_to_dev() argument
283 *txdata = cpu_to_be32(*(u32 *)dspi->tx); in dspi_8on32_host_to_dev()
284 dspi->tx += sizeof(u32); in dspi_8on32_host_to_dev()
287 static void dspi_8on32_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_8on32_dev_to_host() argument
289 *(u32 *)dspi->rx = be32_to_cpu(rxdata); in dspi_8on32_dev_to_host()
290 dspi->rx += sizeof(u32); in dspi_8on32_dev_to_host()
293 static void dspi_8on16_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_8on16_host_to_dev() argument
295 *txdata = cpu_to_be16(*(u16 *)dspi->tx); in dspi_8on16_host_to_dev()
296 dspi->tx += sizeof(u16); in dspi_8on16_host_to_dev()
299 static void dspi_8on16_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_8on16_dev_to_host() argument
301 *(u16 *)dspi->rx = be16_to_cpu(rxdata); in dspi_8on16_dev_to_host()
302 dspi->rx += sizeof(u16); in dspi_8on16_dev_to_host()
305 static void dspi_16on32_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) in dspi_16on32_host_to_dev() argument
307 u16 hi = *(u16 *)dspi->tx; in dspi_16on32_host_to_dev()
308 u16 lo = *(u16 *)(dspi->tx + 2); in dspi_16on32_host_to_dev()
311 dspi->tx += sizeof(u32); in dspi_16on32_host_to_dev()
314 static void dspi_16on32_dev_to_host(struct fsl_dspi *dspi, u32 rxdata) in dspi_16on32_dev_to_host() argument
319 *(u16 *)dspi->rx = lo; in dspi_16on32_dev_to_host()
320 *(u16 *)(dspi->rx + 2) = hi; in dspi_16on32_dev_to_host()
321 dspi->rx += sizeof(u32); in dspi_16on32_dev_to_host()
328 static u32 dspi_pop_tx(struct fsl_dspi *dspi) in dspi_pop_tx() argument
332 if (dspi->tx) in dspi_pop_tx()
333 dspi->host_to_dev(dspi, &txdata); in dspi_pop_tx()
334 dspi->len -= dspi->oper_word_size; in dspi_pop_tx()
339 static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) in dspi_pop_tx_pushr() argument
341 u16 cmd = dspi->tx_cmd, data = dspi_pop_tx(dspi); in dspi_pop_tx_pushr()
343 if (spi_controller_is_target(dspi->ctlr)) in dspi_pop_tx_pushr()
346 if (dspi->len > 0) in dspi_pop_tx_pushr()
352 static void dspi_push_rx(struct fsl_dspi *dspi, u32 rxdata) in dspi_push_rx() argument
354 if (!dspi->rx) in dspi_push_rx()
356 dspi->dev_to_host(dspi, rxdata); in dspi_push_rx()
361 struct fsl_dspi *dspi = arg; in dspi_tx_dma_callback() local
362 struct fsl_dspi_dma *dma = dspi->dma; in dspi_tx_dma_callback()
364 complete(&dma->cmd_tx_complete); in dspi_tx_dma_callback()
369 struct fsl_dspi *dspi = arg; in dspi_rx_dma_callback() local
370 struct fsl_dspi_dma *dma = dspi->dma; in dspi_rx_dma_callback()
373 if (dspi->rx) { in dspi_rx_dma_callback()
374 for (i = 0; i < dspi->words_in_flight; i++) in dspi_rx_dma_callback()
375 dspi_push_rx(dspi, dspi->dma->rx_dma_buf[i]); in dspi_rx_dma_callback()
378 complete(&dma->cmd_rx_complete); in dspi_rx_dma_callback()
381 static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) in dspi_next_xfer_dma_submit() argument
383 struct device *dev = &dspi->pdev->dev; in dspi_next_xfer_dma_submit()
384 struct fsl_dspi_dma *dma = dspi->dma; in dspi_next_xfer_dma_submit()
388 for (i = 0; i < dspi->words_in_flight; i++) in dspi_next_xfer_dma_submit()
389 dspi->dma->tx_dma_buf[i] = dspi_pop_tx_pushr(dspi); in dspi_next_xfer_dma_submit()
391 dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx, in dspi_next_xfer_dma_submit()
392 dma->tx_dma_phys, in dspi_next_xfer_dma_submit()
393 dspi->words_in_flight * in dspi_next_xfer_dma_submit()
397 if (!dma->tx_desc) { in dspi_next_xfer_dma_submit()
399 return -EIO; in dspi_next_xfer_dma_submit()
402 dma->tx_desc->callback = dspi_tx_dma_callback; in dspi_next_xfer_dma_submit()
403 dma->tx_desc->callback_param = dspi; in dspi_next_xfer_dma_submit()
404 if (dma_submit_error(dmaengine_submit(dma->tx_desc))) { in dspi_next_xfer_dma_submit()
406 return -EINVAL; in dspi_next_xfer_dma_submit()
409 dma->rx_desc = dmaengine_prep_slave_single(dma->chan_rx, in dspi_next_xfer_dma_submit()
410 dma->rx_dma_phys, in dspi_next_xfer_dma_submit()
411 dspi->words_in_flight * in dspi_next_xfer_dma_submit()
415 if (!dma->rx_desc) { in dspi_next_xfer_dma_submit()
417 return -EIO; in dspi_next_xfer_dma_submit()
420 dma->rx_desc->callback = dspi_rx_dma_callback; in dspi_next_xfer_dma_submit()
421 dma->rx_desc->callback_param = dspi; in dspi_next_xfer_dma_submit()
422 if (dma_submit_error(dmaengine_submit(dma->rx_desc))) { in dspi_next_xfer_dma_submit()
424 return -EINVAL; in dspi_next_xfer_dma_submit()
427 reinit_completion(&dspi->dma->cmd_rx_complete); in dspi_next_xfer_dma_submit()
428 reinit_completion(&dspi->dma->cmd_tx_complete); in dspi_next_xfer_dma_submit()
430 dma_async_issue_pending(dma->chan_rx); in dspi_next_xfer_dma_submit()
431 dma_async_issue_pending(dma->chan_tx); in dspi_next_xfer_dma_submit()
433 if (spi_controller_is_target(dspi->ctlr)) { in dspi_next_xfer_dma_submit()
434 wait_for_completion_interruptible(&dspi->dma->cmd_rx_complete); in dspi_next_xfer_dma_submit()
438 time_left = wait_for_completion_timeout(&dspi->dma->cmd_tx_complete, in dspi_next_xfer_dma_submit()
442 dmaengine_terminate_all(dma->chan_tx); in dspi_next_xfer_dma_submit()
443 dmaengine_terminate_all(dma->chan_rx); in dspi_next_xfer_dma_submit()
444 return -ETIMEDOUT; in dspi_next_xfer_dma_submit()
447 time_left = wait_for_completion_timeout(&dspi->dma->cmd_rx_complete, in dspi_next_xfer_dma_submit()
451 dmaengine_terminate_all(dma->chan_tx); in dspi_next_xfer_dma_submit()
452 dmaengine_terminate_all(dma->chan_rx); in dspi_next_xfer_dma_submit()
453 return -ETIMEDOUT; in dspi_next_xfer_dma_submit()
459 static void dspi_setup_accel(struct fsl_dspi *dspi);
461 static int dspi_dma_xfer(struct fsl_dspi *dspi) in dspi_dma_xfer() argument
463 struct spi_message *message = dspi->cur_msg; in dspi_dma_xfer()
464 struct device *dev = &dspi->pdev->dev; in dspi_dma_xfer()
468 * dspi->len gets decremented by dspi_pop_tx_pushr in in dspi_dma_xfer()
471 while (dspi->len) { in dspi_dma_xfer()
472 /* Figure out operational bits-per-word for this chunk */ in dspi_dma_xfer()
473 dspi_setup_accel(dspi); in dspi_dma_xfer()
475 dspi->words_in_flight = dspi->len / dspi->oper_word_size; in dspi_dma_xfer()
476 if (dspi->words_in_flight > dspi->devtype_data->fifo_size) in dspi_dma_xfer()
477 dspi->words_in_flight = dspi->devtype_data->fifo_size; in dspi_dma_xfer()
479 message->actual_length += dspi->words_in_flight * in dspi_dma_xfer()
480 dspi->oper_word_size; in dspi_dma_xfer()
482 ret = dspi_next_xfer_dma_submit(dspi); in dspi_dma_xfer()
492 static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) in dspi_request_dma() argument
494 int dma_bufsize = dspi->devtype_data->fifo_size * 2; in dspi_request_dma()
495 struct device *dev = &dspi->pdev->dev; in dspi_request_dma()
502 return -ENOMEM; in dspi_request_dma()
504 dma->chan_rx = dma_request_chan(dev, "rx"); in dspi_request_dma()
505 if (IS_ERR(dma->chan_rx)) in dspi_request_dma()
506 return dev_err_probe(dev, PTR_ERR(dma->chan_rx), "rx dma channel not available\n"); in dspi_request_dma()
508 dma->chan_tx = dma_request_chan(dev, "tx"); in dspi_request_dma()
509 if (IS_ERR(dma->chan_tx)) { in dspi_request_dma()
510 ret = dev_err_probe(dev, PTR_ERR(dma->chan_tx), "tx dma channel not available\n"); in dspi_request_dma()
514 dma->tx_dma_buf = dma_alloc_coherent(dma->chan_tx->device->dev, in dspi_request_dma()
515 dma_bufsize, &dma->tx_dma_phys, in dspi_request_dma()
517 if (!dma->tx_dma_buf) { in dspi_request_dma()
518 ret = -ENOMEM; in dspi_request_dma()
522 dma->rx_dma_buf = dma_alloc_coherent(dma->chan_rx->device->dev, in dspi_request_dma()
523 dma_bufsize, &dma->rx_dma_phys, in dspi_request_dma()
525 if (!dma->rx_dma_buf) { in dspi_request_dma()
526 ret = -ENOMEM; in dspi_request_dma()
539 ret = dmaengine_slave_config(dma->chan_rx, &cfg); in dspi_request_dma()
546 ret = dmaengine_slave_config(dma->chan_tx, &cfg); in dspi_request_dma()
552 dspi->dma = dma; in dspi_request_dma()
553 init_completion(&dma->cmd_tx_complete); in dspi_request_dma()
554 init_completion(&dma->cmd_rx_complete); in dspi_request_dma()
559 dma_free_coherent(dma->chan_rx->device->dev, in dspi_request_dma()
560 dma_bufsize, dma->rx_dma_buf, dma->rx_dma_phys); in dspi_request_dma()
562 dma_free_coherent(dma->chan_tx->device->dev, in dspi_request_dma()
563 dma_bufsize, dma->tx_dma_buf, dma->tx_dma_phys); in dspi_request_dma()
565 dma_release_channel(dma->chan_tx); in dspi_request_dma()
567 dma_release_channel(dma->chan_rx); in dspi_request_dma()
570 dspi->dma = NULL; in dspi_request_dma()
575 static void dspi_release_dma(struct fsl_dspi *dspi) in dspi_release_dma() argument
577 int dma_bufsize = dspi->devtype_data->fifo_size * 2; in dspi_release_dma()
578 struct fsl_dspi_dma *dma = dspi->dma; in dspi_release_dma()
583 if (dma->chan_tx) { in dspi_release_dma()
584 dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize, in dspi_release_dma()
585 dma->tx_dma_buf, dma->tx_dma_phys); in dspi_release_dma()
586 dma_release_channel(dma->chan_tx); in dspi_release_dma()
589 if (dma->chan_rx) { in dspi_release_dma()
590 dma_free_coherent(dma->chan_rx->device->dev, dma_bufsize, in dspi_release_dma()
591 dma->rx_dma_buf, dma->rx_dma_phys); in dspi_release_dma()
592 dma_release_channel(dma->chan_rx); in dspi_release_dma()
599 /* Valid baud rate pre-scaler values */ in hz_to_spi_baud()
628 *pbr = ARRAY_SIZE(pbr_tbl) - 1; in hz_to_spi_baud()
629 *br = ARRAY_SIZE(brs) - 1; in hz_to_spi_baud()
662 *psc = ARRAY_SIZE(pscale_tbl) - 1; in ns_delay_scale()
667 static void dspi_pushr_cmd_write(struct fsl_dspi *dspi, u16 cmd) in dspi_pushr_cmd_write() argument
672 * dspi_pop_tx (the function that decrements dspi->len) _after_ in dspi_pushr_cmd_write()
679 if (dspi->len > dspi->oper_word_size) in dspi_pushr_cmd_write()
681 regmap_write(dspi->regmap_pushr, dspi->pushr_cmd, cmd); in dspi_pushr_cmd_write()
684 static void dspi_pushr_txdata_write(struct fsl_dspi *dspi, u16 txdata) in dspi_pushr_txdata_write() argument
686 regmap_write(dspi->regmap_pushr, dspi->pushr_tx, txdata); in dspi_pushr_txdata_write()
689 static void dspi_xspi_fifo_write(struct fsl_dspi *dspi, int num_words) in dspi_xspi_fifo_write() argument
691 int num_bytes = num_words * dspi->oper_word_size; in dspi_xspi_fifo_write()
692 u16 tx_cmd = dspi->tx_cmd; in dspi_xspi_fifo_write()
695 * If the PCS needs to de-assert (i.e. we're at the end of the buffer in dspi_xspi_fifo_write()
702 if (!(dspi->tx_cmd & SPI_PUSHR_CMD_CONT) && num_bytes == dspi->len) in dspi_xspi_fifo_write()
706 regmap_write(dspi->regmap, SPI_CTARE(0), in dspi_xspi_fifo_write()
707 SPI_FRAME_EBITS(dspi->oper_bits_per_word) | in dspi_xspi_fifo_write()
714 dspi_pushr_cmd_write(dspi, tx_cmd); in dspi_xspi_fifo_write()
717 while (num_words--) { in dspi_xspi_fifo_write()
718 u32 data = dspi_pop_tx(dspi); in dspi_xspi_fifo_write()
720 dspi_pushr_txdata_write(dspi, data & 0xFFFF); in dspi_xspi_fifo_write()
721 if (dspi->oper_bits_per_word > 16) in dspi_xspi_fifo_write()
722 dspi_pushr_txdata_write(dspi, data >> 16); in dspi_xspi_fifo_write()
726 static u32 dspi_popr_read(struct fsl_dspi *dspi) in dspi_popr_read() argument
730 regmap_read(dspi->regmap, SPI_POPR, &rxdata); in dspi_popr_read()
734 static void dspi_fifo_read(struct fsl_dspi *dspi) in dspi_fifo_read() argument
736 int num_fifo_entries = dspi->words_in_flight; in dspi_fifo_read()
739 while (num_fifo_entries--) in dspi_fifo_read()
740 dspi_push_rx(dspi, dspi_popr_read(dspi)); in dspi_fifo_read()
743 static void dspi_setup_accel(struct fsl_dspi *dspi) in dspi_setup_accel() argument
745 struct spi_transfer *xfer = dspi->cur_transfer; in dspi_setup_accel()
746 bool odd = !!(dspi->len & 1); in dspi_setup_accel()
749 if (xfer->bits_per_word % 8) in dspi_setup_accel()
752 if (!odd && dspi->len <= dspi->devtype_data->fifo_size * 2) { in dspi_setup_accel()
753 dspi->oper_bits_per_word = 16; in dspi_setup_accel()
754 } else if (odd && dspi->len <= dspi->devtype_data->fifo_size) { in dspi_setup_accel()
755 dspi->oper_bits_per_word = 8; in dspi_setup_accel()
758 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_setup_accel()
759 dspi->oper_bits_per_word = 32; in dspi_setup_accel()
761 dspi->oper_bits_per_word = 16; in dspi_setup_accel()
768 if (dspi->len >= DIV_ROUND_UP(dspi->oper_bits_per_word, 8)) in dspi_setup_accel()
771 dspi->oper_bits_per_word /= 2; in dspi_setup_accel()
772 } while (dspi->oper_bits_per_word > 8); in dspi_setup_accel()
775 if (xfer->bits_per_word == 8 && dspi->oper_bits_per_word == 32) { in dspi_setup_accel()
776 dspi->dev_to_host = dspi_8on32_dev_to_host; in dspi_setup_accel()
777 dspi->host_to_dev = dspi_8on32_host_to_dev; in dspi_setup_accel()
778 } else if (xfer->bits_per_word == 8 && dspi->oper_bits_per_word == 16) { in dspi_setup_accel()
779 dspi->dev_to_host = dspi_8on16_dev_to_host; in dspi_setup_accel()
780 dspi->host_to_dev = dspi_8on16_host_to_dev; in dspi_setup_accel()
781 } else if (xfer->bits_per_word == 16 && dspi->oper_bits_per_word == 32) { in dspi_setup_accel()
782 dspi->dev_to_host = dspi_16on32_dev_to_host; in dspi_setup_accel()
783 dspi->host_to_dev = dspi_16on32_host_to_dev; in dspi_setup_accel()
786 dspi->dev_to_host = dspi_native_dev_to_host; in dspi_setup_accel()
787 dspi->host_to_dev = dspi_native_host_to_dev; in dspi_setup_accel()
788 dspi->oper_bits_per_word = xfer->bits_per_word; in dspi_setup_accel()
791 dspi->oper_word_size = DIV_ROUND_UP(dspi->oper_bits_per_word, 8); in dspi_setup_accel()
798 regmap_write(dspi->regmap, SPI_CTAR(0), in dspi_setup_accel()
799 dspi->cur_chip->ctar_val | in dspi_setup_accel()
800 SPI_FRAME_BITS(dspi->oper_bits_per_word)); in dspi_setup_accel()
803 static void dspi_fifo_write(struct fsl_dspi *dspi) in dspi_fifo_write() argument
805 int num_fifo_entries = dspi->devtype_data->fifo_size; in dspi_fifo_write()
806 struct spi_transfer *xfer = dspi->cur_transfer; in dspi_fifo_write()
807 struct spi_message *msg = dspi->cur_msg; in dspi_fifo_write()
810 dspi_setup_accel(dspi); in dspi_fifo_write()
812 /* In XSPI mode each 32-bit word occupies 2 TX FIFO entries */ in dspi_fifo_write()
813 if (dspi->oper_word_size == 4) in dspi_fifo_write()
817 * Integer division intentionally trims off odd (or non-multiple of 4) in dspi_fifo_write()
821 num_words = dspi->len / dspi->oper_word_size; in dspi_fifo_write()
826 num_bytes = num_words * dspi->oper_word_size; in dspi_fifo_write()
827 msg->actual_length += num_bytes; in dspi_fifo_write()
828 dspi->progress += num_bytes / DIV_ROUND_UP(xfer->bits_per_word, 8); in dspi_fifo_write()
834 dspi->words_in_flight = num_words; in dspi_fifo_write()
836 spi_take_timestamp_pre(dspi->ctlr, xfer, dspi->progress, !dspi->irq); in dspi_fifo_write()
838 dspi_xspi_fifo_write(dspi, num_words); in dspi_fifo_write()
841 * interrupt, so we must never use dspi->words_in_flight again since it in dspi_fifo_write()
845 spi_take_timestamp_post(dspi->ctlr, dspi->cur_transfer, in dspi_fifo_write()
846 dspi->progress, !dspi->irq); in dspi_fifo_write()
849 static int dspi_rxtx(struct fsl_dspi *dspi) in dspi_rxtx() argument
851 dspi_fifo_read(dspi); in dspi_rxtx()
853 if (!dspi->len) in dspi_rxtx()
857 dspi_fifo_write(dspi); in dspi_rxtx()
859 return -EINPROGRESS; in dspi_rxtx()
862 static int dspi_poll(struct fsl_dspi *dspi) in dspi_poll() argument
868 regmap_read(dspi->regmap, SPI_SR, &spi_sr); in dspi_poll()
869 regmap_write(dspi->regmap, SPI_SR, spi_sr); in dspi_poll()
873 } while (--tries); in dspi_poll()
876 return -ETIMEDOUT; in dspi_poll()
878 return dspi_rxtx(dspi); in dspi_poll()
883 struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id; in dspi_interrupt() local
886 regmap_read(dspi->regmap, SPI_SR, &spi_sr); in dspi_interrupt()
887 regmap_write(dspi->regmap, SPI_SR, spi_sr); in dspi_interrupt()
892 if (dspi_rxtx(dspi) == 0) in dspi_interrupt()
893 complete(&dspi->xfer_done); in dspi_interrupt()
919 struct fsl_dspi *dspi = spi_controller_get_devdata(ctlr); in dspi_transfer_one_message() local
920 struct spi_device *spi = message->spi; in dspi_transfer_one_message()
925 message->actual_length = 0; in dspi_transfer_one_message()
927 list_for_each_entry(transfer, &message->transfers, transfer_list) { in dspi_transfer_one_message()
928 dspi->cur_transfer = transfer; in dspi_transfer_one_message()
929 dspi->cur_msg = message; in dspi_transfer_one_message()
930 dspi->cur_chip = spi_get_ctldata(spi); in dspi_transfer_one_message()
935 dspi->tx_cmd = SPI_PUSHR_CMD_CTAS(0); in dspi_transfer_one_message()
937 dspi->tx_cmd |= SPI_PUSHR_CMD_PCS(spi_get_chipselect(spi, 0)); in dspi_transfer_one_message()
939 if (list_is_last(&dspi->cur_transfer->transfer_list, in dspi_transfer_one_message()
940 &dspi->cur_msg->transfers)) { in dspi_transfer_one_message()
944 if (transfer->cs_change) in dspi_transfer_one_message()
945 dspi->tx_cmd |= SPI_PUSHR_CMD_CONT; in dspi_transfer_one_message()
948 * when cs_change is not set, and de-activate PCS in dspi_transfer_one_message()
952 if (!transfer->cs_change) in dspi_transfer_one_message()
953 dspi->tx_cmd |= SPI_PUSHR_CMD_CONT; in dspi_transfer_one_message()
956 dspi->tx = transfer->tx_buf; in dspi_transfer_one_message()
957 dspi->rx = transfer->rx_buf; in dspi_transfer_one_message()
958 dspi->len = transfer->len; in dspi_transfer_one_message()
959 dspi->progress = 0; in dspi_transfer_one_message()
961 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_transfer_one_message()
965 spi_take_timestamp_pre(dspi->ctlr, dspi->cur_transfer, in dspi_transfer_one_message()
966 dspi->progress, !dspi->irq); in dspi_transfer_one_message()
968 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_transfer_one_message()
969 status = dspi_dma_xfer(dspi); in dspi_transfer_one_message()
971 dspi_fifo_write(dspi); in dspi_transfer_one_message()
973 if (dspi->irq) { in dspi_transfer_one_message()
974 wait_for_completion(&dspi->xfer_done); in dspi_transfer_one_message()
975 reinit_completion(&dspi->xfer_done); in dspi_transfer_one_message()
978 status = dspi_poll(dspi); in dspi_transfer_one_message()
979 } while (status == -EINPROGRESS); in dspi_transfer_one_message()
987 if (!(dspi->tx_cmd & SPI_PUSHR_CMD_CONT)) in dspi_transfer_one_message()
991 message->status = status; in dspi_transfer_one_message()
999 struct fsl_dspi *dspi = spi_controller_get_devdata(spi->controller); in dspi_setup() local
1000 u32 period_ns = DIV_ROUND_UP(NSEC_PER_SEC, spi->max_speed_hz); in dspi_setup()
1017 return -ENOMEM; in dspi_setup()
1020 pdata = dev_get_platdata(&dspi->pdev->dev); in dspi_setup()
1023 val = spi_delay_to_ns(&spi->cs_setup, NULL); in dspi_setup()
1026 of_property_read_u32(spi->dev.of_node, in dspi_setup()
1027 "fsl,spi-cs-sck-delay", in dspi_setup()
1030 val = spi_delay_to_ns(&spi->cs_hold, NULL); in dspi_setup()
1033 of_property_read_u32(spi->dev.of_node, in dspi_setup()
1034 "fsl,spi-sck-cs-delay", in dspi_setup()
1037 cs_sck_delay = pdata->cs_sck_delay; in dspi_setup()
1038 sck_cs_delay = pdata->sck_cs_delay; in dspi_setup()
1050 dev_dbg(&spi->dev, in dspi_setup()
1051 "DSPI controller timing params: CS-to-SCK delay %u ns, SCK-to-CS delay %u ns\n", in dspi_setup()
1054 clkrate = clk_get_rate(dspi->clk); in dspi_setup()
1055 hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate); in dspi_setup()
1063 chip->ctar_val = 0; in dspi_setup()
1064 if (spi->mode & SPI_CPOL) in dspi_setup()
1065 chip->ctar_val |= SPI_CTAR_CPOL; in dspi_setup()
1066 if (spi->mode & SPI_CPHA) in dspi_setup()
1067 chip->ctar_val |= SPI_CTAR_CPHA; in dspi_setup()
1069 if (!spi_controller_is_target(dspi->ctlr)) { in dspi_setup()
1070 chip->ctar_val |= SPI_CTAR_PCSSCK(pcssck) | in dspi_setup()
1077 if (spi->mode & SPI_LSB_FIRST) in dspi_setup()
1078 chip->ctar_val |= SPI_CTAR_LSBFE; in dspi_setup()
1096 dev_dbg(&spi->dev, "spi_device %u.%u cleanup\n", in dspi_cleanup()
1097 spi->controller->bus_num, spi_get_chipselect(spi, 0)); in dspi_cleanup()
1104 .compatible = "fsl,vf610-dspi",
1105 .data = &devtype_data[VF610],
1107 .compatible = "fsl,ls1021a-v1.0-dspi",
1110 .compatible = "fsl,ls1012a-dspi",
1113 .compatible = "fsl,ls1028a-dspi",
1116 .compatible = "fsl,ls1043a-dspi",
1119 .compatible = "fsl,ls1046a-dspi",
1122 .compatible = "fsl,ls2080a-dspi",
1125 .compatible = "fsl,ls2085a-dspi",
1128 .compatible = "fsl,lx2160a-dspi",
1138 struct fsl_dspi *dspi = dev_get_drvdata(dev); in dspi_suspend() local
1140 if (dspi->irq) in dspi_suspend()
1141 disable_irq(dspi->irq); in dspi_suspend()
1142 spi_controller_suspend(dspi->ctlr); in dspi_suspend()
1143 clk_disable_unprepare(dspi->clk); in dspi_suspend()
1152 struct fsl_dspi *dspi = dev_get_drvdata(dev); in dspi_resume() local
1157 ret = clk_prepare_enable(dspi->clk); in dspi_resume()
1160 spi_controller_resume(dspi->ctlr); in dspi_resume()
1161 if (dspi->irq) in dspi_resume()
1162 enable_irq(dspi->irq); in dspi_resume()
1218 static int dspi_init(struct fsl_dspi *dspi) in dspi_init() argument
1223 mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->max_native_cs - 1, 0)); in dspi_init()
1225 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_init()
1227 if (!spi_controller_is_target(dspi->ctlr)) in dspi_init()
1230 regmap_write(dspi->regmap, SPI_MCR, mcr); in dspi_init()
1231 regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); in dspi_init()
1233 switch (dspi->devtype_data->trans_mode) { in dspi_init()
1235 regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_CMDTCFE); in dspi_init()
1238 regmap_write(dspi->regmap, SPI_RSER, in dspi_init()
1243 dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n", in dspi_init()
1244 dspi->devtype_data->trans_mode); in dspi_init()
1245 return -EINVAL; in dspi_init()
1253 struct fsl_dspi *dspi = spi_controller_get_devdata(host); in dspi_target_abort() local
1259 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_target_abort()
1260 dmaengine_terminate_sync(dspi->dma->chan_rx); in dspi_target_abort()
1261 dmaengine_terminate_sync(dspi->dma->chan_tx); in dspi_target_abort()
1264 /* Clear the internal DSPI RX and TX FIFO buffers */ in dspi_target_abort()
1265 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_target_abort()
1274 struct device_node *np = pdev->dev.of_node; in dspi_probe()
1278 int ret, cs_num, bus_num = -1; in dspi_probe()
1279 struct fsl_dspi *dspi; in dspi_probe() local
1284 dspi = devm_kzalloc(&pdev->dev, sizeof(*dspi), GFP_KERNEL); in dspi_probe()
1285 if (!dspi) in dspi_probe()
1286 return -ENOMEM; in dspi_probe()
1288 ctlr = spi_alloc_host(&pdev->dev, 0); in dspi_probe()
1290 return -ENOMEM; in dspi_probe()
1292 spi_controller_set_devdata(ctlr, dspi); in dspi_probe()
1293 platform_set_drvdata(pdev, dspi); in dspi_probe()
1295 dspi->pdev = pdev; in dspi_probe()
1296 dspi->ctlr = ctlr; in dspi_probe()
1298 ctlr->setup = dspi_setup; in dspi_probe()
1299 ctlr->transfer_one_message = dspi_transfer_one_message; in dspi_probe()
1300 ctlr->dev.of_node = pdev->dev.of_node; in dspi_probe()
1302 ctlr->cleanup = dspi_cleanup; in dspi_probe()
1303 ctlr->target_abort = dspi_target_abort; in dspi_probe()
1304 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; in dspi_probe()
1305 ctlr->use_gpio_descriptors = true; in dspi_probe()
1307 pdata = dev_get_platdata(&pdev->dev); in dspi_probe()
1309 ctlr->num_chipselect = ctlr->max_native_cs = pdata->cs_num; in dspi_probe()
1310 ctlr->bus_num = pdata->bus_num; in dspi_probe()
1313 dspi->devtype_data = &devtype_data[MCF5441X]; in dspi_probe()
1317 ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num); in dspi_probe()
1319 dev_err(&pdev->dev, "can't get spi-num-chipselects\n"); in dspi_probe()
1322 ctlr->num_chipselect = ctlr->max_native_cs = cs_num; in dspi_probe()
1324 of_property_read_u32(np, "bus-num", &bus_num); in dspi_probe()
1325 ctlr->bus_num = bus_num; in dspi_probe()
1327 if (of_property_read_bool(np, "spi-slave")) in dspi_probe()
1328 ctlr->target = true; in dspi_probe()
1330 dspi->devtype_data = of_device_get_match_data(&pdev->dev); in dspi_probe()
1331 if (!dspi->devtype_data) { in dspi_probe()
1332 dev_err(&pdev->dev, "can't get devtype_data\n"); in dspi_probe()
1333 ret = -EFAULT; in dspi_probe()
1340 dspi->pushr_cmd = 0; in dspi_probe()
1341 dspi->pushr_tx = 2; in dspi_probe()
1343 dspi->pushr_cmd = 2; in dspi_probe()
1344 dspi->pushr_tx = 0; in dspi_probe()
1347 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_probe()
1348 ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); in dspi_probe()
1350 ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); in dspi_probe()
1358 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) in dspi_probe()
1362 dspi->regmap = devm_regmap_init_mmio(&pdev->dev, base, regmap_config); in dspi_probe()
1363 if (IS_ERR(dspi->regmap)) { in dspi_probe()
1364 dev_err(&pdev->dev, "failed to init regmap: %ld\n", in dspi_probe()
1365 PTR_ERR(dspi->regmap)); in dspi_probe()
1366 ret = PTR_ERR(dspi->regmap); in dspi_probe()
1370 if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) { in dspi_probe()
1371 dspi->regmap_pushr = devm_regmap_init_mmio( in dspi_probe()
1372 &pdev->dev, base + SPI_PUSHR, in dspi_probe()
1374 if (IS_ERR(dspi->regmap_pushr)) { in dspi_probe()
1375 dev_err(&pdev->dev, in dspi_probe()
1377 PTR_ERR(dspi->regmap_pushr)); in dspi_probe()
1378 ret = PTR_ERR(dspi->regmap_pushr); in dspi_probe()
1383 dspi->clk = devm_clk_get_enabled(&pdev->dev, "dspi"); in dspi_probe()
1384 if (IS_ERR(dspi->clk)) { in dspi_probe()
1385 ret = PTR_ERR(dspi->clk); in dspi_probe()
1386 dev_err(&pdev->dev, "unable to get clock\n"); in dspi_probe()
1390 ret = dspi_init(dspi); in dspi_probe()
1394 dspi->irq = platform_get_irq(pdev, 0); in dspi_probe()
1395 if (dspi->irq <= 0) { in dspi_probe()
1396 dev_info(&pdev->dev, in dspi_probe()
1398 dspi->irq = 0; in dspi_probe()
1402 init_completion(&dspi->xfer_done); in dspi_probe()
1404 ret = request_threaded_irq(dspi->irq, dspi_interrupt, NULL, in dspi_probe()
1405 IRQF_SHARED, pdev->name, dspi); in dspi_probe()
1407 dev_err(&pdev->dev, "Unable to attach DSPI interrupt\n"); in dspi_probe()
1413 if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { in dspi_probe()
1414 ret = dspi_request_dma(dspi, res->start); in dspi_probe()
1416 dev_err(&pdev->dev, "can't get dma channels\n"); in dspi_probe()
1421 ctlr->max_speed_hz = in dspi_probe()
1422 clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; in dspi_probe()
1424 if (dspi->devtype_data->trans_mode != DSPI_DMA_MODE) in dspi_probe()
1425 ctlr->ptp_sts_supported = true; in dspi_probe()
1429 dev_err(&pdev->dev, "Problem registering DSPI ctlr\n"); in dspi_probe()
1436 dspi_release_dma(dspi); in dspi_probe()
1438 if (dspi->irq) in dspi_probe()
1439 free_irq(dspi->irq, dspi); in dspi_probe()
1448 struct fsl_dspi *dspi = platform_get_drvdata(pdev); in dspi_remove() local
1451 spi_unregister_controller(dspi->ctlr); in dspi_remove()
1454 regmap_update_bits(dspi->regmap, SPI_MCR, in dspi_remove()
1459 regmap_update_bits(dspi->regmap, SPI_MCR, SPI_MCR_HALT, SPI_MCR_HALT); in dspi_remove()
1461 dspi_release_dma(dspi); in dspi_remove()
1462 if (dspi->irq) in dspi_remove()
1463 free_irq(dspi->irq, dspi); in dspi_remove()
1481 MODULE_DESCRIPTION("Freescale DSPI Controller Driver");