Lines Matching +full:ep9301 +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Mika Westerberg
7 * Explicit FIFO handling code was inspired by amba-pl022 driver.
9 * Chip select support using other than built-in GPIOs by H. Hartley Sweeten.
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
69 * struct ep93xx_spi - EP93xx SPI controller structure
75 * @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
99 #define bits_per_word_to_dss(bpw) ((bpw) - 1)
102 * ep93xx_spi_calc_divisors() - calculates SPI clock divisors
105 * @div_cpsr: pointer to return the cpsr (pre-scaler) divider
112 unsigned long spi_clk_rate = clk_get_rate(espi->clk); in ep93xx_spi_calc_divisors()
119 rate = clamp(rate, host->min_speed_hz, host->max_speed_hz); in ep93xx_spi_calc_divisors()
139 return -EINVAL; in ep93xx_spi_calc_divisors()
147 u8 dss = bits_per_word_to_dss(xfer->bits_per_word); in ep93xx_spi_chip_setup()
153 err = ep93xx_spi_calc_divisors(host, xfer->speed_hz, in ep93xx_spi_chip_setup()
159 if (spi->mode & SPI_CPOL) in ep93xx_spi_chip_setup()
161 if (spi->mode & SPI_CPHA) in ep93xx_spi_chip_setup()
165 dev_dbg(&host->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", in ep93xx_spi_chip_setup()
166 spi->mode, div_cpsr, div_scr, dss); in ep93xx_spi_chip_setup()
167 dev_dbg(&host->dev, "setup: cr0 %#x\n", cr0); in ep93xx_spi_chip_setup()
169 writel(div_cpsr, espi->mmio + SSPCPSR); in ep93xx_spi_chip_setup()
170 writel(cr0, espi->mmio + SSPCR0); in ep93xx_spi_chip_setup()
178 struct spi_transfer *xfer = host->cur_msg->state; in ep93xx_do_write()
181 if (xfer->bits_per_word > 8) { in ep93xx_do_write()
182 if (xfer->tx_buf) in ep93xx_do_write()
183 val = ((u16 *)xfer->tx_buf)[espi->tx]; in ep93xx_do_write()
184 espi->tx += 2; in ep93xx_do_write()
186 if (xfer->tx_buf) in ep93xx_do_write()
187 val = ((u8 *)xfer->tx_buf)[espi->tx]; in ep93xx_do_write()
188 espi->tx += 1; in ep93xx_do_write()
190 writel(val, espi->mmio + SSPDR); in ep93xx_do_write()
196 struct spi_transfer *xfer = host->cur_msg->state; in ep93xx_do_read()
199 val = readl(espi->mmio + SSPDR); in ep93xx_do_read()
200 if (xfer->bits_per_word > 8) { in ep93xx_do_read()
201 if (xfer->rx_buf) in ep93xx_do_read()
202 ((u16 *)xfer->rx_buf)[espi->rx] = val; in ep93xx_do_read()
203 espi->rx += 2; in ep93xx_do_read()
205 if (xfer->rx_buf) in ep93xx_do_read()
206 ((u8 *)xfer->rx_buf)[espi->rx] = val; in ep93xx_do_read()
207 espi->rx += 1; in ep93xx_do_read()
212 * ep93xx_spi_read_write() - perform next RX/TX transfer
215 * This function transfers next bytes (or half-words) to/from RX/TX FIFOs. If
217 * %-EINPROGRESS when current transfer was not yet completed otherwise %0.
225 struct spi_transfer *xfer = host->cur_msg->state; in ep93xx_spi_read_write()
228 while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) { in ep93xx_spi_read_write()
230 espi->fifo_level--; in ep93xx_spi_read_write()
234 while (espi->fifo_level < SPI_FIFO_SIZE && espi->tx < xfer->len) { in ep93xx_spi_read_write()
236 espi->fifo_level++; in ep93xx_spi_read_write()
239 if (espi->rx == xfer->len) in ep93xx_spi_read_write()
242 return -EINPROGRESS; in ep93xx_spi_read_write()
259 * ep93xx_spi_dma_prepare() - prepares a DMA transfer
272 struct spi_transfer *xfer = host->cur_msg->state; in ep93xx_spi_dma_prepare()
280 size_t len = xfer->len; in ep93xx_spi_dma_prepare()
283 if (xfer->bits_per_word > 8) in ep93xx_spi_dma_prepare()
292 chan = espi->dma_rx; in ep93xx_spi_dma_prepare()
293 buf = xfer->rx_buf; in ep93xx_spi_dma_prepare()
294 sgt = &espi->rx_sgt; in ep93xx_spi_dma_prepare()
296 conf.src_addr = espi->sspdr_phys; in ep93xx_spi_dma_prepare()
299 chan = espi->dma_tx; in ep93xx_spi_dma_prepare()
300 buf = xfer->tx_buf; in ep93xx_spi_dma_prepare()
301 sgt = &espi->tx_sgt; in ep93xx_spi_dma_prepare()
303 conf.dst_addr = espi->sspdr_phys; in ep93xx_spi_dma_prepare()
313 * because we are using @espi->zeropage to provide a zero RX buffer in ep93xx_spi_dma_prepare()
317 * needed. Otherwise we will re-use the current one. Eventually the in ep93xx_spi_dma_prepare()
322 if (nents != sgt->nents) { in ep93xx_spi_dma_prepare()
331 for_each_sg(sgt->sgl, sg, sgt->nents, i) { in ep93xx_spi_dma_prepare()
338 sg_set_page(sg, virt_to_page(espi->zeropage), in ep93xx_spi_dma_prepare()
343 len -= bytes; in ep93xx_spi_dma_prepare()
347 dev_warn(&host->dev, "len = %zu expected 0!\n", len); in ep93xx_spi_dma_prepare()
348 return ERR_PTR(-EINVAL); in ep93xx_spi_dma_prepare()
351 nents = dma_map_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); in ep93xx_spi_dma_prepare()
353 return ERR_PTR(-ENOMEM); in ep93xx_spi_dma_prepare()
355 txd = dmaengine_prep_slave_sg(chan, sgt->sgl, nents, conf.direction, in ep93xx_spi_dma_prepare()
358 dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); in ep93xx_spi_dma_prepare()
359 return ERR_PTR(-ENOMEM); in ep93xx_spi_dma_prepare()
365 * ep93xx_spi_dma_finish() - finishes with a DMA transfer
380 chan = espi->dma_rx; in ep93xx_spi_dma_finish()
381 sgt = &espi->rx_sgt; in ep93xx_spi_dma_finish()
383 chan = espi->dma_tx; in ep93xx_spi_dma_finish()
384 sgt = &espi->tx_sgt; in ep93xx_spi_dma_finish()
387 dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); in ep93xx_spi_dma_finish()
407 dev_err(&host->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); in ep93xx_spi_dma_transfer()
414 dev_err(&host->dev, "DMA TX failed: %ld\n", PTR_ERR(txd)); in ep93xx_spi_dma_transfer()
419 rxd->callback = ep93xx_spi_dma_callback; in ep93xx_spi_dma_transfer()
420 rxd->callback_param = host; in ep93xx_spi_dma_transfer()
426 dma_async_issue_pending(espi->dma_rx); in ep93xx_spi_dma_transfer()
427 dma_async_issue_pending(espi->dma_tx); in ep93xx_spi_dma_transfer()
443 if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) { in ep93xx_spi_interrupt()
445 writel(0, espi->mmio + SSPICR); in ep93xx_spi_interrupt()
446 dev_warn(&host->dev, in ep93xx_spi_interrupt()
448 host->cur_msg->status = -EIO; in ep93xx_spi_interrupt()
467 * any post-processing of the message. in ep93xx_spi_interrupt()
469 val = readl(espi->mmio + SSPCR1); in ep93xx_spi_interrupt()
471 writel(val, espi->mmio + SSPCR1); in ep93xx_spi_interrupt()
488 dev_err(&host->dev, "failed to setup chip for transfer\n"); in ep93xx_spi_transfer_one()
492 host->cur_msg->state = xfer; in ep93xx_spi_transfer_one()
493 espi->rx = 0; in ep93xx_spi_transfer_one()
494 espi->tx = 0; in ep93xx_spi_transfer_one()
501 if (espi->dma_rx && xfer->len > SPI_FIFO_SIZE) in ep93xx_spi_transfer_one()
507 val = readl(espi->mmio + SSPCR1); in ep93xx_spi_transfer_one()
509 writel(val, espi->mmio + SSPCR1); in ep93xx_spi_transfer_one()
525 while (readl(espi->mmio + SSPSR) & SSPSR_RNE) { in ep93xx_spi_prepare_message()
527 dev_warn(&host->dev, in ep93xx_spi_prepare_message()
529 return -ETIMEDOUT; in ep93xx_spi_prepare_message()
531 readl(espi->mmio + SSPDR); in ep93xx_spi_prepare_message()
538 espi->fifo_level = 0; in ep93xx_spi_prepare_message()
549 ret = clk_prepare_enable(espi->clk); in ep93xx_spi_prepare_hardware()
553 val = readl(espi->mmio + SSPCR1); in ep93xx_spi_prepare_hardware()
555 writel(val, espi->mmio + SSPCR1); in ep93xx_spi_prepare_hardware()
565 val = readl(espi->mmio + SSPCR1); in ep93xx_spi_unprepare_hardware()
567 writel(val, espi->mmio + SSPCR1); in ep93xx_spi_unprepare_hardware()
569 clk_disable_unprepare(espi->clk); in ep93xx_spi_unprepare_hardware()
578 espi->zeropage = (void *)get_zeroed_page(GFP_KERNEL); in ep93xx_spi_setup_dma()
579 if (!espi->zeropage) in ep93xx_spi_setup_dma()
580 return -ENOMEM; in ep93xx_spi_setup_dma()
582 espi->dma_rx = dma_request_chan(dev, "rx"); in ep93xx_spi_setup_dma()
583 if (IS_ERR(espi->dma_rx)) { in ep93xx_spi_setup_dma()
584 ret = dev_err_probe(dev, PTR_ERR(espi->dma_rx), "rx DMA setup failed"); in ep93xx_spi_setup_dma()
588 espi->dma_tx = dma_request_chan(dev, "tx"); in ep93xx_spi_setup_dma()
589 if (IS_ERR(espi->dma_tx)) { in ep93xx_spi_setup_dma()
590 ret = dev_err_probe(dev, PTR_ERR(espi->dma_tx), "tx DMA setup failed"); in ep93xx_spi_setup_dma()
597 dma_release_channel(espi->dma_rx); in ep93xx_spi_setup_dma()
598 espi->dma_rx = NULL; in ep93xx_spi_setup_dma()
600 free_page((unsigned long)espi->zeropage); in ep93xx_spi_setup_dma()
607 if (espi->dma_rx) { in ep93xx_spi_release_dma()
608 dma_release_channel(espi->dma_rx); in ep93xx_spi_release_dma()
609 sg_free_table(&espi->rx_sgt); in ep93xx_spi_release_dma()
611 if (espi->dma_tx) { in ep93xx_spi_release_dma()
612 dma_release_channel(espi->dma_tx); in ep93xx_spi_release_dma()
613 sg_free_table(&espi->tx_sgt); in ep93xx_spi_release_dma()
616 if (espi->zeropage) in ep93xx_spi_release_dma()
617 free_page((unsigned long)espi->zeropage); in ep93xx_spi_release_dma()
632 host = spi_alloc_host(&pdev->dev, sizeof(*espi)); in ep93xx_spi_probe()
634 return -ENOMEM; in ep93xx_spi_probe()
636 host->use_gpio_descriptors = true; in ep93xx_spi_probe()
637 host->prepare_transfer_hardware = ep93xx_spi_prepare_hardware; in ep93xx_spi_probe()
638 host->unprepare_transfer_hardware = ep93xx_spi_unprepare_hardware; in ep93xx_spi_probe()
639 host->prepare_message = ep93xx_spi_prepare_message; in ep93xx_spi_probe()
640 host->transfer_one = ep93xx_spi_transfer_one; in ep93xx_spi_probe()
641 host->bus_num = pdev->id; in ep93xx_spi_probe()
642 host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in ep93xx_spi_probe()
643 host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); in ep93xx_spi_probe()
645 * The SPI core will count the number of GPIO descriptors to figure in ep93xx_spi_probe()
648 host->num_chipselect = 0; in ep93xx_spi_probe()
654 espi->clk = devm_clk_get(&pdev->dev, NULL); in ep93xx_spi_probe()
655 if (IS_ERR(espi->clk)) { in ep93xx_spi_probe()
656 dev_err(&pdev->dev, "unable to get spi clock\n"); in ep93xx_spi_probe()
657 error = PTR_ERR(espi->clk); in ep93xx_spi_probe()
665 host->max_speed_hz = clk_get_rate(espi->clk) / 2; in ep93xx_spi_probe()
666 host->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); in ep93xx_spi_probe()
668 espi->mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in ep93xx_spi_probe()
669 if (IS_ERR(espi->mmio)) { in ep93xx_spi_probe()
670 error = PTR_ERR(espi->mmio); in ep93xx_spi_probe()
673 espi->sspdr_phys = res->start + SSPDR; in ep93xx_spi_probe()
675 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, in ep93xx_spi_probe()
676 0, "ep93xx-spi", host); in ep93xx_spi_probe()
678 dev_err(&pdev->dev, "failed to request irq\n"); in ep93xx_spi_probe()
682 error = ep93xx_spi_setup_dma(&pdev->dev, espi); in ep93xx_spi_probe()
683 if (error == -EPROBE_DEFER) in ep93xx_spi_probe()
687 dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n"); in ep93xx_spi_probe()
690 writel(0, espi->mmio + SSPCR1); in ep93xx_spi_probe()
692 device_set_node(&host->dev, dev_fwnode(&pdev->dev)); in ep93xx_spi_probe()
693 error = devm_spi_register_controller(&pdev->dev, host); in ep93xx_spi_probe()
695 dev_err(&pdev->dev, "failed to register SPI host\n"); in ep93xx_spi_probe()
699 dev_info(&pdev->dev, "EP93xx SPI Controller at 0x%08lx irq %d\n", in ep93xx_spi_probe()
700 (unsigned long)res->start, irq); in ep93xx_spi_probe()
721 { .compatible = "cirrus,ep9301-spi" },
728 .name = "ep93xx-spi",
739 MODULE_ALIAS("platform:ep93xx-spi");