Lines Matching +full:rx +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-SPI adapter
94 u16 mode; member
111 tx.port = dln2->port; in dln2_spi_enable()
115 len -= sizeof(tx.wait_for_completion); in dln2_spi_enable()
121 return dln2_transfer_tx(dln2->pdev, cmd, &tx, len); in dln2_spi_enable()
129 * Ex: cs_mask = 0x03 -> CS0 & CS1 will be selected and the next WR/RD operation
139 tx.port = dln2->port; in dln2_spi_cs_set()
148 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_SS, &tx, sizeof(tx)); in dln2_spi_cs_set()
152 * Select one CS line. The other lines will be un-selected.
170 tx.port = dln2->port; in dln2_spi_cs_enable()
174 return dln2_transfer_tx(dln2->pdev, cmd, &tx, sizeof(tx)); in dln2_spi_cs_enable()
179 u8 cs_mask = GENMASK(dln2->host->num_chipselect - 1, 0); in dln2_spi_cs_enable_all()
192 } rx; in dln2_spi_get_cs_num() local
193 unsigned rx_len = sizeof(rx); in dln2_spi_get_cs_num()
195 tx.port = dln2->port; in dln2_spi_get_cs_num()
196 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SS_COUNT, &tx, sizeof(tx), in dln2_spi_get_cs_num()
197 &rx, &rx_len); in dln2_spi_get_cs_num()
200 if (rx_len < sizeof(rx)) in dln2_spi_get_cs_num()
201 return -EPROTO; in dln2_spi_get_cs_num()
203 *cs_num = le16_to_cpu(rx.cs_count); in dln2_spi_get_cs_num()
205 dev_dbg(&dln2->pdev->dev, "cs_num = %d\n", *cs_num); in dln2_spi_get_cs_num()
218 } rx; in dln2_spi_get_speed() local
219 unsigned rx_len = sizeof(rx); in dln2_spi_get_speed()
221 tx.port = dln2->port; in dln2_spi_get_speed()
223 ret = dln2_transfer(dln2->pdev, cmd, &tx, sizeof(tx), &rx, &rx_len); in dln2_spi_get_speed()
226 if (rx_len < sizeof(rx)) in dln2_spi_get_speed()
227 return -EPROTO; in dln2_spi_get_speed()
229 *freq = le32_to_cpu(rx.speed); in dln2_spi_get_speed()
249 dev_dbg(&dln2->pdev->dev, "freq_min = %d, freq_max = %d\n", in dln2_spi_get_speed_range()
268 } rx; in dln2_spi_set_speed() local
269 int rx_len = sizeof(rx); in dln2_spi_set_speed()
271 tx.port = dln2->port; in dln2_spi_set_speed()
274 ret = dln2_transfer(dln2->pdev, DLN2_SPI_SET_FREQUENCY, &tx, sizeof(tx), in dln2_spi_set_speed()
275 &rx, &rx_len); in dln2_spi_set_speed()
278 if (rx_len < sizeof(rx)) in dln2_spi_set_speed()
279 return -EPROTO; in dln2_spi_set_speed()
287 static int dln2_spi_set_mode(struct dln2_spi *dln2, u8 mode) in dln2_spi_set_mode() argument
291 u8 mode; in dln2_spi_set_mode() member
294 tx.port = dln2->port; in dln2_spi_set_mode()
295 tx.mode = mode; in dln2_spi_set_mode()
297 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_MODE, &tx, sizeof(tx)); in dln2_spi_set_mode()
310 tx.port = dln2->port; in dln2_spi_set_bpw()
313 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_FRAME_SIZE, in dln2_spi_set_bpw()
327 } *rx = dln2->buf; in dln2_spi_get_supported_frame_sizes() local
328 unsigned rx_len = sizeof(*rx); in dln2_spi_get_supported_frame_sizes()
331 tx.port = dln2->port; in dln2_spi_get_supported_frame_sizes()
333 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SUPPORTED_FRAME_SIZES, in dln2_spi_get_supported_frame_sizes()
334 &tx, sizeof(tx), rx, &rx_len); in dln2_spi_get_supported_frame_sizes()
337 if (rx_len < sizeof(*rx)) in dln2_spi_get_supported_frame_sizes()
338 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
339 if (rx->count > ARRAY_SIZE(rx->frame_sizes)) in dln2_spi_get_supported_frame_sizes()
340 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
343 for (i = 0; i < rx->count; i++) in dln2_spi_get_supported_frame_sizes()
344 *bpw_mask |= BIT(rx->frame_sizes[i] - 1); in dln2_spi_get_supported_frame_sizes()
346 dev_dbg(&dln2->pdev->dev, "bpw_mask = 0x%X\n", *bpw_mask); in dln2_spi_get_supported_frame_sizes()
368 while (len--) in dln2_spi_copy_to_buf()
375 while (len--) in dln2_spi_copy_to_buf()
386 * of word size. The RX dln2_buf is 2 byte aligned so, for BE, we have to make
401 while (len--) in dln2_spi_copy_from_buf()
408 while (len--) in dln2_spi_copy_from_buf()
427 } __packed *tx = dln2->buf; in dln2_spi_write_one()
433 return -EINVAL; in dln2_spi_write_one()
435 tx->port = dln2->port; in dln2_spi_write_one()
436 tx->size = cpu_to_le16(data_len); in dln2_spi_write_one()
437 tx->attr = attr; in dln2_spi_write_one()
439 dln2_spi_copy_to_buf(tx->buf, data, data_len, dln2->bpw); in dln2_spi_write_one()
441 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_write_one()
442 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_WRITE, tx, tx_len); in dln2_spi_write_one()
460 } __packed *rx = dln2->buf; in dln2_spi_read_one() local
461 unsigned rx_len = sizeof(*rx); in dln2_spi_read_one()
463 BUILD_BUG_ON(sizeof(*rx) > DLN2_SPI_BUF_SIZE); in dln2_spi_read_one()
466 return -EINVAL; in dln2_spi_read_one()
468 tx.port = dln2->port; in dln2_spi_read_one()
472 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ, &tx, sizeof(tx), in dln2_spi_read_one()
473 rx, &rx_len); in dln2_spi_read_one()
476 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_one()
477 return -EPROTO; in dln2_spi_read_one()
478 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_one()
479 return -EPROTO; in dln2_spi_read_one()
481 dln2_spi_copy_from_buf(data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_one()
502 } __packed *rx; in dln2_spi_read_write_one() local
506 sizeof(*rx) > DLN2_SPI_BUF_SIZE); in dln2_spi_read_write_one()
509 return -EINVAL; in dln2_spi_read_write_one()
512 * Since this is a pseudo full-duplex communication, we're perfectly in dln2_spi_read_write_one()
513 * safe to use the same buffer for both tx and rx. When DLN2 sends the in dln2_spi_read_write_one()
514 * response back, with the rx data, we don't need the tx buffer anymore. in dln2_spi_read_write_one()
516 tx = dln2->buf; in dln2_spi_read_write_one()
517 rx = dln2->buf; in dln2_spi_read_write_one()
519 tx->port = dln2->port; in dln2_spi_read_write_one()
520 tx->size = cpu_to_le16(data_len); in dln2_spi_read_write_one()
521 tx->attr = attr; in dln2_spi_read_write_one()
523 dln2_spi_copy_to_buf(tx->buf, tx_data, data_len, dln2->bpw); in dln2_spi_read_write_one()
525 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_read_write_one()
526 rx_len = sizeof(*rx); in dln2_spi_read_write_one()
528 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ_WRITE, tx, tx_len, in dln2_spi_read_write_one()
529 rx, &rx_len); in dln2_spi_read_write_one()
532 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_write_one()
533 return -EPROTO; in dln2_spi_read_write_one()
534 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_write_one()
535 return -EPROTO; in dln2_spi_read_write_one()
537 dln2_spi_copy_from_buf(rx_data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_write_one()
564 offset = data_len - remaining; in dln2_spi_rdwr()
580 return -EINVAL; in dln2_spi_rdwr()
586 remaining -= len; in dln2_spi_rdwr()
597 struct spi_device *spi = message->spi; in dln2_spi_prepare_message()
599 if (dln2->cs != spi_get_chipselect(spi, 0)) { in dln2_spi_prepare_message()
604 dln2->cs = spi_get_chipselect(spi, 0); in dln2_spi_prepare_message()
611 u8 bpw, u8 mode) in dln2_spi_transfer_setup() argument
616 bus_setup_change = dln2->speed != speed || dln2->mode != mode || in dln2_spi_transfer_setup()
617 dln2->bpw != bpw; in dln2_spi_transfer_setup()
626 if (dln2->speed != speed) { in dln2_spi_transfer_setup()
631 dln2->speed = speed; in dln2_spi_transfer_setup()
634 if (dln2->mode != mode) { in dln2_spi_transfer_setup()
635 ret = dln2_spi_set_mode(dln2, mode & 0x3); in dln2_spi_transfer_setup()
639 dln2->mode = mode; in dln2_spi_transfer_setup()
642 if (dln2->bpw != bpw) { in dln2_spi_transfer_setup()
647 dln2->bpw = bpw; in dln2_spi_transfer_setup()
661 status = dln2_spi_transfer_setup(dln2, xfer->speed_hz, in dln2_spi_transfer_one()
662 xfer->bits_per_word, in dln2_spi_transfer_one()
663 spi->mode); in dln2_spi_transfer_one()
665 dev_err(&dln2->pdev->dev, "Cannot setup transfer\n"); in dln2_spi_transfer_one()
669 if (!xfer->cs_change && !spi_transfer_is_last(host, xfer)) in dln2_spi_transfer_one()
672 status = dln2_spi_rdwr(dln2, xfer->tx_buf, xfer->rx_buf, in dln2_spi_transfer_one()
673 xfer->len, attr); in dln2_spi_transfer_one()
675 dev_err(&dln2->pdev->dev, "write/read failed!\n"); in dln2_spi_transfer_one()
684 struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev); in dln2_spi_probe()
685 struct device *dev = &pdev->dev; in dln2_spi_probe()
688 host = spi_alloc_host(&pdev->dev, sizeof(*dln2)); in dln2_spi_probe()
690 return -ENOMEM; in dln2_spi_probe()
692 device_set_node(&host->dev, dev_fwnode(dev)); in dln2_spi_probe()
698 dln2->buf = devm_kmalloc(&pdev->dev, DLN2_SPI_BUF_SIZE, GFP_KERNEL); in dln2_spi_probe()
699 if (!dln2->buf) { in dln2_spi_probe()
700 ret = -ENOMEM; in dln2_spi_probe()
704 dln2->host = host; in dln2_spi_probe()
705 dln2->pdev = pdev; in dln2_spi_probe()
706 dln2->port = pdata->port; in dln2_spi_probe()
707 /* cs/mode can never be 0xff, so the first transfer will set them */ in dln2_spi_probe()
708 dln2->cs = 0xff; in dln2_spi_probe()
709 dln2->mode = 0xff; in dln2_spi_probe()
714 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
718 ret = dln2_spi_get_cs_num(dln2, &host->num_chipselect); in dln2_spi_probe()
720 dev_err(&pdev->dev, "Failed to get number of CS pins\n"); in dln2_spi_probe()
725 &host->min_speed_hz, in dln2_spi_probe()
726 &host->max_speed_hz); in dln2_spi_probe()
728 dev_err(&pdev->dev, "Failed to read bus min/max freqs\n"); in dln2_spi_probe()
733 &host->bits_per_word_mask); in dln2_spi_probe()
735 dev_err(&pdev->dev, "Failed to read supported frame sizes\n"); in dln2_spi_probe()
741 dev_err(&pdev->dev, "Failed to enable CS pins\n"); in dln2_spi_probe()
745 host->bus_num = -1; in dln2_spi_probe()
746 host->mode_bits = SPI_CPOL | SPI_CPHA; in dln2_spi_probe()
747 host->prepare_message = dln2_spi_prepare_message; in dln2_spi_probe()
748 host->transfer_one = dln2_spi_transfer_one; in dln2_spi_probe()
749 host->auto_runtime_pm = true; in dln2_spi_probe()
754 dev_err(&pdev->dev, "Failed to enable SPI module\n"); in dln2_spi_probe()
758 pm_runtime_set_autosuspend_delay(&pdev->dev, in dln2_spi_probe()
760 pm_runtime_use_autosuspend(&pdev->dev); in dln2_spi_probe()
761 pm_runtime_set_active(&pdev->dev); in dln2_spi_probe()
762 pm_runtime_enable(&pdev->dev); in dln2_spi_probe()
764 ret = devm_spi_register_controller(&pdev->dev, host); in dln2_spi_probe()
766 dev_err(&pdev->dev, "Failed to register host\n"); in dln2_spi_probe()
773 pm_runtime_disable(&pdev->dev); in dln2_spi_probe()
774 pm_runtime_set_suspended(&pdev->dev); in dln2_spi_probe()
777 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
789 pm_runtime_disable(&pdev->dev); in dln2_spi_remove()
792 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_remove()
816 dln2->cs = 0xff; in dln2_spi_suspend()
817 dln2->speed = 0; in dln2_spi_suspend()
818 dln2->bpw = 0; in dln2_spi_suspend()
819 dln2->mode = 0xff; in dln2_spi_suspend()
870 .name = "dln2-spi",
881 MODULE_ALIAS("platform:dln2-spi");