37 #define BCM2835_SPI_CS			0x00  macro
222 	       (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_RXD)) {  in bcm2835_rd_fifo()
235 	       (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_TXD)) {  in bcm2835_wr_fifo()
308 	while (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE))  in bcm2835_wait_tx_fifo_empty()
351 	u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);  in bcm2835_spi_reset_hw()
369 	bcm2835_wr(bs, BCM2835_SPI_CS, cs);  in bcm2835_spi_reset_hw()
377 	u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);  in bcm2835_spi_interrupt()
424 	bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);  in bcm2835_spi_transfer_one_irq()
433 	bcm2835_wr(bs, BCM2835_SPI_CS, cs);  in bcm2835_spi_transfer_one_irq()
521 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA  in bcm2835_spi_transfer_prologue()
526 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_RX  in bcm2835_spi_transfer_prologue()
548 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA  in bcm2835_spi_transfer_prologue()
552 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_TX  in bcm2835_spi_transfer_prologue()
641 	while (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE))  in bcm2835_spi_dma_tx_done()
642 		bcm2835_wr(bs, BCM2835_SPI_CS, bs->target->clear_rx_cs);  in bcm2835_spi_dma_tx_done()
802 	bcm2835_wr(bs, BCM2835_SPI_CS,  in bcm2835_spi_transfer_one_dma()
969 	slave_config.dst_addr = (u32)(dma_reg_base + BCM2835_SPI_CS);  in bcm2835_dma_init()
1009 	bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);  in bcm2835_spi_transfer_one_poll()
1125 	bcm2835_wr(bs, BCM2835_SPI_CS, target->prepare_cs);  in bcm2835_spi_prepare_message()
1384 	bcm2835_wr(bs, BCM2835_SPI_CS,  in bcm2835_spi_probe()
1422 	bcm2835_wr(bs, BCM2835_SPI_CS,  in bcm2835_spi_remove()