Lines Matching +full:spi +full:- +full:src +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0
11 * This driver is based on drivers/mtd/spi-nor/fsl-quadspi.c from Freescale.
14 #include <linux/clk.h>
25 #include <linux/spi/spi-mem.h>
69 #define QSPI_MR_NBBITS(n) ((((n) - 8) << 8) & QSPI_MR_NBBITS_MASK)
139 #define QSPI_WPSR_WPVSRC(src) (((src) << 8) & QSPI_WPSR_WPVSRC) argument
149 struct clk *pclk;
150 struct clk *qspick;
228 u32 value = readl_relaxed(aq->regs + offset); in atmel_qspi_read()
233 dev_vdbg(&aq->pdev->dev, "read 0x%08x from %s\n", value, in atmel_qspi_read()
245 dev_vdbg(&aq->pdev->dev, "write 0x%08x into %s\n", value, in atmel_qspi_write()
249 writel_relaxed(value, aq->regs + offset); in atmel_qspi_write()
255 if (op->cmd.buswidth != mode->cmd_buswidth) in atmel_qspi_is_compatible()
258 if (op->addr.nbytes && op->addr.buswidth != mode->addr_buswidth) in atmel_qspi_is_compatible()
261 if (op->data.nbytes && op->data.buswidth != mode->data_buswidth) in atmel_qspi_is_compatible()
275 return -EOPNOTSUPP; in atmel_qspi_find_mode()
288 if (op->addr.nbytes == 2 && op->cmd.buswidth != op->addr.buswidth && in atmel_qspi_supports_op()
289 op->dummy.nbytes == 0) in atmel_qspi_supports_op()
303 icr = QSPI_ICR_INST(op->cmd.opcode); in atmel_qspi_set_cfg()
311 if (op->dummy.nbytes) in atmel_qspi_set_cfg()
312 dummy_cycles = op->dummy.nbytes * 8 / op->dummy.buswidth; in atmel_qspi_set_cfg()
315 * The controller allows 24 and 32-bit addressing while NAND-flash in atmel_qspi_set_cfg()
316 * requires 16-bit long. Handling 8-bit long addresses is done using in atmel_qspi_set_cfg()
317 * the option field. For the 16-bit addresses, the workaround depends in atmel_qspi_set_cfg()
322 * use the same buswidth). The limitation is when the 16-bit address is in atmel_qspi_set_cfg()
326 if (op->addr.buswidth) { in atmel_qspi_set_cfg()
327 switch (op->addr.nbytes) { in atmel_qspi_set_cfg()
332 icr |= QSPI_ICR_OPT(op->addr.val & 0xff); in atmel_qspi_set_cfg()
335 if (dummy_cycles < 8 / op->addr.buswidth) { in atmel_qspi_set_cfg()
338 iar = (op->cmd.opcode << 16) | in atmel_qspi_set_cfg()
339 (op->addr.val & 0xffff); in atmel_qspi_set_cfg()
342 iar = (op->addr.val << 8) & 0xffffff; in atmel_qspi_set_cfg()
343 dummy_cycles -= 8 / op->addr.buswidth; in atmel_qspi_set_cfg()
348 iar = op->addr.val & 0xffffff; in atmel_qspi_set_cfg()
352 iar = op->addr.val & 0x7ffffff; in atmel_qspi_set_cfg()
355 return -ENOTSUPP; in atmel_qspi_set_cfg()
367 if (op->data.nbytes) { in atmel_qspi_set_cfg()
370 if (op->addr.nbytes) in atmel_qspi_set_cfg()
375 * If the QSPI controller is set in regular SPI mode, set it in in atmel_qspi_set_cfg()
378 if (!(aq->mr & QSPI_MR_SMM)) { in atmel_qspi_set_cfg()
379 aq->mr |= QSPI_MR_SMM; in atmel_qspi_set_cfg()
380 atmel_qspi_write(aq->mr, aq, QSPI_MR); in atmel_qspi_set_cfg()
387 if (op->addr.nbytes && !op->data.nbytes) in atmel_qspi_set_cfg()
390 if (aq->caps->has_ricr) { in atmel_qspi_set_cfg()
391 if (op->data.dir == SPI_MEM_DATA_IN) in atmel_qspi_set_cfg()
396 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) in atmel_qspi_set_cfg()
409 struct atmel_qspi *aq = spi_controller_get_devdata(mem->spi->controller); in atmel_qspi_exec_op()
415 * would be to add support for regular SPI mode and fall back to it in atmel_qspi_exec_op()
418 if (op->addr.val + op->data.nbytes > aq->mmap_size) in atmel_qspi_exec_op()
419 return -ENOTSUPP; in atmel_qspi_exec_op()
421 err = pm_runtime_resume_and_get(&aq->pdev->dev); in atmel_qspi_exec_op()
430 if (op->data.nbytes) { in atmel_qspi_exec_op()
435 if (op->data.dir == SPI_MEM_DATA_IN) in atmel_qspi_exec_op()
436 memcpy_fromio(op->data.buf.in, aq->mem + offset, in atmel_qspi_exec_op()
437 op->data.nbytes); in atmel_qspi_exec_op()
439 memcpy_toio(aq->mem + offset, op->data.buf.out, in atmel_qspi_exec_op()
440 op->data.nbytes); in atmel_qspi_exec_op()
442 /* Release the chip-select */ in atmel_qspi_exec_op()
452 reinit_completion(&aq->cmd_completion); in atmel_qspi_exec_op()
453 aq->pending = sr & QSPI_SR_CMD_COMPLETED; in atmel_qspi_exec_op()
455 if (!wait_for_completion_timeout(&aq->cmd_completion, in atmel_qspi_exec_op()
457 err = -ETIMEDOUT; in atmel_qspi_exec_op()
461 pm_runtime_mark_last_busy(&aq->pdev->dev); in atmel_qspi_exec_op()
462 pm_runtime_put_autosuspend(&aq->pdev->dev); in atmel_qspi_exec_op()
468 return dev_name(spimem->spi->dev.parent); in atmel_qspi_get_name()
477 static int atmel_qspi_setup(struct spi_device *spi) in atmel_qspi_setup() argument
479 struct spi_controller *ctrl = spi->controller; in atmel_qspi_setup()
485 if (ctrl->busy) in atmel_qspi_setup()
486 return -EBUSY; in atmel_qspi_setup()
488 if (!spi->max_speed_hz) in atmel_qspi_setup()
489 return -EINVAL; in atmel_qspi_setup()
491 src_rate = clk_get_rate(aq->pclk); in atmel_qspi_setup()
493 return -EINVAL; in atmel_qspi_setup()
496 scbr = DIV_ROUND_UP(src_rate, spi->max_speed_hz); in atmel_qspi_setup()
498 scbr--; in atmel_qspi_setup()
500 ret = pm_runtime_resume_and_get(ctrl->dev.parent); in atmel_qspi_setup()
504 aq->scr &= ~QSPI_SCR_SCBR_MASK; in atmel_qspi_setup()
505 aq->scr |= QSPI_SCR_SCBR(scbr); in atmel_qspi_setup()
506 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_setup()
508 pm_runtime_mark_last_busy(ctrl->dev.parent); in atmel_qspi_setup()
509 pm_runtime_put_autosuspend(ctrl->dev.parent); in atmel_qspi_setup()
514 static int atmel_qspi_set_cs_timing(struct spi_device *spi) in atmel_qspi_set_cs_timing() argument
516 struct spi_controller *ctrl = spi->controller; in atmel_qspi_set_cs_timing()
523 delay = spi_delay_to_ns(&spi->cs_setup, NULL); in atmel_qspi_set_cs_timing()
527 clk_rate = clk_get_rate(aq->pclk); in atmel_qspi_set_cs_timing()
529 return -EINVAL; in atmel_qspi_set_cs_timing()
534 ret = pm_runtime_resume_and_get(ctrl->dev.parent); in atmel_qspi_set_cs_timing()
538 aq->scr &= ~QSPI_SCR_DLYBS_MASK; in atmel_qspi_set_cs_timing()
539 aq->scr |= QSPI_SCR_DLYBS(cs_setup); in atmel_qspi_set_cs_timing()
540 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_set_cs_timing()
542 pm_runtime_mark_last_busy(ctrl->dev.parent); in atmel_qspi_set_cs_timing()
543 pm_runtime_put_autosuspend(ctrl->dev.parent); in atmel_qspi_set_cs_timing()
554 aq->mr |= QSPI_MR_SMM; in atmel_qspi_init()
555 atmel_qspi_write(aq->mr, aq, QSPI_MR); in atmel_qspi_init()
573 aq->pending |= pending; in atmel_qspi_interrupt()
574 if ((aq->pending & QSPI_SR_CMD_COMPLETED) == QSPI_SR_CMD_COMPLETED) in atmel_qspi_interrupt()
575 complete(&aq->cmd_completion); in atmel_qspi_interrupt()
587 ctrl = devm_spi_alloc_host(&pdev->dev, sizeof(*aq)); in atmel_qspi_probe()
589 return -ENOMEM; in atmel_qspi_probe()
591 ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD; in atmel_qspi_probe()
592 ctrl->setup = atmel_qspi_setup; in atmel_qspi_probe()
593 ctrl->set_cs_timing = atmel_qspi_set_cs_timing; in atmel_qspi_probe()
594 ctrl->bus_num = -1; in atmel_qspi_probe()
595 ctrl->mem_ops = &atmel_qspi_mem_ops; in atmel_qspi_probe()
596 ctrl->num_chipselect = 1; in atmel_qspi_probe()
597 ctrl->dev.of_node = pdev->dev.of_node; in atmel_qspi_probe()
602 init_completion(&aq->cmd_completion); in atmel_qspi_probe()
603 aq->pdev = pdev; in atmel_qspi_probe()
606 aq->regs = devm_platform_ioremap_resource_byname(pdev, "qspi_base"); in atmel_qspi_probe()
607 if (IS_ERR(aq->regs)) in atmel_qspi_probe()
608 return dev_err_probe(&pdev->dev, PTR_ERR(aq->regs), in atmel_qspi_probe()
613 aq->mem = devm_ioremap_resource(&pdev->dev, res); in atmel_qspi_probe()
614 if (IS_ERR(aq->mem)) in atmel_qspi_probe()
615 return dev_err_probe(&pdev->dev, PTR_ERR(aq->mem), in atmel_qspi_probe()
618 aq->mmap_size = resource_size(res); in atmel_qspi_probe()
621 aq->pclk = devm_clk_get(&pdev->dev, "pclk"); in atmel_qspi_probe()
622 if (IS_ERR(aq->pclk)) in atmel_qspi_probe()
623 aq->pclk = devm_clk_get(&pdev->dev, NULL); in atmel_qspi_probe()
625 if (IS_ERR(aq->pclk)) in atmel_qspi_probe()
626 return dev_err_probe(&pdev->dev, PTR_ERR(aq->pclk), in atmel_qspi_probe()
630 err = clk_prepare_enable(aq->pclk); in atmel_qspi_probe()
632 return dev_err_probe(&pdev->dev, err, in atmel_qspi_probe()
635 aq->caps = of_device_get_match_data(&pdev->dev); in atmel_qspi_probe()
636 if (!aq->caps) { in atmel_qspi_probe()
637 dev_err(&pdev->dev, "Could not retrieve QSPI caps\n"); in atmel_qspi_probe()
638 err = -EINVAL; in atmel_qspi_probe()
642 if (aq->caps->has_qspick) { in atmel_qspi_probe()
644 aq->qspick = devm_clk_get(&pdev->dev, "qspick"); in atmel_qspi_probe()
645 if (IS_ERR(aq->qspick)) { in atmel_qspi_probe()
646 dev_err(&pdev->dev, "missing system clock\n"); in atmel_qspi_probe()
647 err = PTR_ERR(aq->qspick); in atmel_qspi_probe()
652 err = clk_prepare_enable(aq->qspick); in atmel_qspi_probe()
654 dev_err(&pdev->dev, in atmel_qspi_probe()
666 err = devm_request_irq(&pdev->dev, irq, atmel_qspi_interrupt, in atmel_qspi_probe()
667 0, dev_name(&pdev->dev), aq); in atmel_qspi_probe()
671 pm_runtime_set_autosuspend_delay(&pdev->dev, 500); in atmel_qspi_probe()
672 pm_runtime_use_autosuspend(&pdev->dev); in atmel_qspi_probe()
673 pm_runtime_set_active(&pdev->dev); in atmel_qspi_probe()
674 pm_runtime_enable(&pdev->dev); in atmel_qspi_probe()
675 pm_runtime_get_noresume(&pdev->dev); in atmel_qspi_probe()
681 pm_runtime_put_noidle(&pdev->dev); in atmel_qspi_probe()
682 pm_runtime_disable(&pdev->dev); in atmel_qspi_probe()
683 pm_runtime_set_suspended(&pdev->dev); in atmel_qspi_probe()
684 pm_runtime_dont_use_autosuspend(&pdev->dev); in atmel_qspi_probe()
687 pm_runtime_mark_last_busy(&pdev->dev); in atmel_qspi_probe()
688 pm_runtime_put_autosuspend(&pdev->dev); in atmel_qspi_probe()
693 clk_disable_unprepare(aq->qspick); in atmel_qspi_probe()
695 clk_disable_unprepare(aq->pclk); in atmel_qspi_probe()
708 ret = pm_runtime_get_sync(&pdev->dev); in atmel_qspi_remove()
711 clk_disable(aq->qspick); in atmel_qspi_remove()
712 clk_disable(aq->pclk); in atmel_qspi_remove()
719 dev_warn(&pdev->dev, "Failed to resume device on remove\n"); in atmel_qspi_remove()
722 clk_unprepare(aq->qspick); in atmel_qspi_remove()
723 clk_unprepare(aq->pclk); in atmel_qspi_remove()
725 pm_runtime_disable(&pdev->dev); in atmel_qspi_remove()
726 pm_runtime_dont_use_autosuspend(&pdev->dev); in atmel_qspi_remove()
727 pm_runtime_put_noidle(&pdev->dev); in atmel_qspi_remove()
745 clk_unprepare(aq->qspick); in atmel_qspi_suspend()
746 clk_unprepare(aq->pclk); in atmel_qspi_suspend()
757 ret = clk_prepare(aq->pclk); in atmel_qspi_resume()
761 ret = clk_prepare(aq->qspick); in atmel_qspi_resume()
763 clk_unprepare(aq->pclk); in atmel_qspi_resume()
773 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_resume()
786 clk_disable(aq->qspick); in atmel_qspi_runtime_suspend()
787 clk_disable(aq->pclk); in atmel_qspi_runtime_suspend()
798 ret = clk_enable(aq->pclk); in atmel_qspi_runtime_resume()
802 ret = clk_enable(aq->qspick); in atmel_qspi_runtime_resume()
804 clk_disable(aq->pclk); in atmel_qspi_runtime_resume()
824 .compatible = "atmel,sama5d2-qspi",
828 .compatible = "microchip,sam9x60-qspi",