Lines Matching refs:reg_read
208 int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val); member
359 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], in swrm_wait_for_rd_fifo_avail()
385 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], in swrm_wait_for_wr_fifo_avail()
410 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], &value); in swrm_wait_for_wr_fifo_done()
416 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], &value); in swrm_wait_for_wr_fifo_done()
502 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_CMD_FIFO_RD_FIFO_ADDR], in qcom_swrm_cmd_fifo_rd_cmd()
536 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_alert_slave_dev_num()
555 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_device_status()
573 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status); in qcom_swrm_set_slave_dev_num()
603 ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1); in qcom_swrm_enumerate()
606 ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2); in qcom_swrm_enumerate()
674 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_INTERRUPT_STATUS], in qcom_swrm_irq_handler()
698 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &slave_status); in qcom_swrm_irq_handler()
718 ctrl->reg_read(ctrl, in qcom_swrm_irq_handler()
726 ctrl->reg_read(ctrl, in qcom_swrm_irq_handler()
734 ctrl->reg_read(ctrl, in qcom_swrm_irq_handler()
743 ctrl->reg_read(ctrl, in qcom_swrm_irq_handler()
780 ctrl->reg_read(ctrl, in qcom_swrm_irq_handler()
800 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_INTERRUPT_STATUS], in qcom_swrm_irq_handler()
815 ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_FRAME_GEN_ENABLED], in swrm_wait_for_frame_gen_enabled()
851 ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val); in qcom_swrm_init()
900 ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val); in qcom_swrm_init()
959 ctrl->reg_read(ctrl, reg, &val); in qcom_swrm_pre_bank_switch()
1053 ctrl->reg_read(ctrl, reg, &val); in qcom_swrm_port_enable()
1367 ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val); in qcom_swrm_get_port_config()
1476 ctrl->reg_read(ctrl, reg, ®_val); in swrm_reg_show()
1512 ctrl->reg_read = qcom_swrm_ahb_reg_read;
1518 ctrl->reg_read = qcom_swrm_cpu_reg_read;
1568 ctrl->reg_read(ctrl, SWRM_MCP_STATUS, &val);
1580 ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &ctrl->version);
1607 ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);