23  * shim vendor-specific (vs) ops
336 	/* the SHIM will be configured in the callback functions */  in intel_hw_params()
399 		 * need to reinitialize the SHIM/ALH/Cadence IP.  in intel_prepare()
401 		 * but in those cases we cannot touch ALH/SHIM  in intel_prepare()
412 		/* the SHIM will be configured in the callback functions */  in intel_prepare()
507 		 * In the case of xruns, the DMAs and SHIM registers cannot be touched,  in intel_trigger()
508 		 * but for resume operations the DMAs and SHIM registers need to be initialized.  in intel_trigger()
549 	void __iomem *shim = sdw->link_res->shim;  in intel_pdi_init()  local
553 	pcm_cap = intel_readw(shim, SDW_SHIM2_PCMSCAP);  in intel_pdi_init()
566 	void __iomem *shim = sdw->link_res->shim;  in intel_pdi_get_ch_cap()  local
569 	return intel_readw(shim, SDW_SHIM2_PCMSYCHC(pdi_num)) + 1;  in intel_pdi_get_ch_cap()