Lines Matching +full:rx +full:- +full:port +full:- +full:mapping

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3  * Copyright (C) 2023-24 Advanced Micro Devices, Inc. All rights reserved.
208  * SDW0 Manager instance registers  6 CPU DAI (3 TX & 3 RX Ports)
209  * whereas SDW1  Manager Instance registers 2 CPU DAI (one TX & one RX port)
210  * Below is the CPU DAI <->Manager port number mapping
211  * i.e SDW0 Pin0 -> port number 0 -> AUDIO0 TX
212  *     SDW0 Pin1 -> Port number 1 -> AUDIO1 TX
213  *     SDW0 Pin2 -> Port number 2 -> AUDIO2 TX
214  *     SDW0 Pin3 -> port number 3 -> AUDIO0 RX
215  *     SDW0 Pin4 -> Port number 4 -> AUDIO1 RX
216  *     SDW0 Pin5 -> Port number 5 -> AUDIO2 RX
218  *  SDW1 Pin0 -> port number 0 -> AUDIO1 TX
219  *  SDW1 Pin1 -> Port number 1 -> AUDIO1 RX
220  *  Same mapping should be used for programming DMA controller registers in SoundWire DMA driver.