soc/rockchip/grf.c

1 // SPDX-License-Identifier: GPL-2.0-only
33 	 * clock-framework and the mmc controllers making them unreliable.
48 	{ "vpu main clock", RK3128_GRF_SOC_CON1, HIWORD_UPDATE(0, 1, 10) },
162 		.compatible = "rockchip,rk3036-grf",
165 		.compatible = "rockchip,rk3128-grf",
168 		.compatible = "rockchip,rk3228-grf",
171 		.compatible = "rockchip,rk3288-grf",
174 		.compatible = "rockchip,rk3328-grf",
177 		.compatible = "rockchip,rk3368-grf",
180 		.compatible = "rockchip,rk3399-grf",
183 		.compatible = "rockchip,rk3566-pipe-grf",
186 		.compatible = "rockchip,rk3576-sys-grf",
189 		.compatible = "rockchip,rk3576-ioc-grf",
192 		.compatible = "rockchip,rk3588-sys-grf",
209 		return -ENODEV;  in rockchip_grf_init()
210 	if (!match || !match->data) {  in rockchip_grf_init()
213 		return -EINVAL;  in rockchip_grf_init()
216 	grf_info = match->data;  in rockchip_grf_init()
225 	for (i = 0; i < grf_info->num_values; i++) {  in rockchip_grf_init()
226 		const struct rockchip_grf_value *val = &grf_info->values[i];  in rockchip_grf_init()
229 			val->desc, val->reg, val->val);  in rockchip_grf_init()
230 		ret = regmap_write(grf, val->reg, val->val);  in rockchip_grf_init()
233 			       __func__, val->reg, ret);  in rockchip_grf_init()