195 u32 geni_se_get_qup_hw_version(struct geni_se *se)  in geni_se_get_qup_hw_version()  argument
197 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_get_qup_hw_version()
236 static void geni_se_irq_clear(struct geni_se *se)  in geni_se_irq_clear()  argument
238 	writel_relaxed(0, se->base + SE_GSI_EVENT_EN);  in geni_se_irq_clear()
239 	writel_relaxed(0xffffffff, se->base + SE_GENI_M_IRQ_CLEAR);  in geni_se_irq_clear()
240 	writel_relaxed(0xffffffff, se->base + SE_GENI_S_IRQ_CLEAR);  in geni_se_irq_clear()
241 	writel_relaxed(0xffffffff, se->base + SE_DMA_TX_IRQ_CLR);  in geni_se_irq_clear()
242 	writel_relaxed(0xffffffff, se->base + SE_DMA_RX_IRQ_CLR);  in geni_se_irq_clear()
243 	writel_relaxed(0xffffffff, se->base + SE_IRQ_EN);  in geni_se_irq_clear()
255 void geni_se_init(struct geni_se *se, u32 rx_wm, u32 rx_rfr)  in geni_se_init()  argument
259 	geni_se_irq_clear(se);  in geni_se_init()
260 	geni_se_io_init(se->base);  in geni_se_init()
261 	geni_se_io_set_mode(se->base);  in geni_se_init()
263 	writel_relaxed(rx_wm, se->base + SE_GENI_RX_WATERMARK_REG);  in geni_se_init()
264 	writel_relaxed(rx_rfr, se->base + SE_GENI_RX_RFR_WATERMARK_REG);  in geni_se_init()
266 	val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);  in geni_se_init()
268 	writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);  in geni_se_init()
270 	val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);  in geni_se_init()
272 	writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN);  in geni_se_init()
276 static void geni_se_select_fifo_mode(struct geni_se *se)  in geni_se_select_fifo_mode()  argument
278 	u32 proto = geni_se_read_proto(se);  in geni_se_select_fifo_mode()
281 	geni_se_irq_clear(se);  in geni_se_select_fifo_mode()
286 		val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_fifo_mode()
290 			writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_fifo_mode()
293 	val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);  in geni_se_select_fifo_mode()
296 		writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);  in geni_se_select_fifo_mode()
299 static void geni_se_select_dma_mode(struct geni_se *se)  in geni_se_select_dma_mode()  argument
301 	u32 proto = geni_se_read_proto(se);  in geni_se_select_dma_mode()
304 	geni_se_irq_clear(se);  in geni_se_select_dma_mode()
309 		val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_dma_mode()
313 			writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_dma_mode()
316 	val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);  in geni_se_select_dma_mode()
319 		writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);  in geni_se_select_dma_mode()
322 static void geni_se_select_gpi_mode(struct geni_se *se)  in geni_se_select_gpi_mode()  argument
326 	geni_se_irq_clear(se);  in geni_se_select_gpi_mode()
328 	writel(0, se->base + SE_IRQ_EN);  in geni_se_select_gpi_mode()
330 	val = readl(se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_gpi_mode()
333 	writel(val, se->base + SE_GENI_M_IRQ_EN);  in geni_se_select_gpi_mode()
335 	writel(GENI_DMA_MODE_EN, se->base + SE_GENI_DMA_MODE_EN);  in geni_se_select_gpi_mode()
337 	val = readl(se->base + SE_GSI_EVENT_EN);  in geni_se_select_gpi_mode()
339 	writel(val, se->base + SE_GSI_EVENT_EN);  in geni_se_select_gpi_mode()
347 void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode)  in geni_se_select_mode()  argument
353 		geni_se_select_fifo_mode(se);  in geni_se_select_mode()
356 		geni_se_select_dma_mode(se);  in geni_se_select_mode()
359 		geni_se_select_gpi_mode(se);  in geni_se_select_mode()
430 void geni_se_config_packing(struct geni_se *se, int bpw, int pack_words,  in geni_se_config_packing()  argument
465 		writel_relaxed(cfg0, se->base + SE_GENI_TX_PACKING_CFG0);  in geni_se_config_packing()
466 		writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1);  in geni_se_config_packing()
469 		writel_relaxed(cfg0, se->base + SE_GENI_RX_PACKING_CFG0);  in geni_se_config_packing()
470 		writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1);  in geni_se_config_packing()
481 		writel_relaxed(bpw / 16, se->base + SE_GENI_BYTE_GRAN);  in geni_se_config_packing()
485 static void geni_se_clks_off(struct geni_se *se)  in geni_se_clks_off()  argument
487 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_clks_off()
489 	clk_disable_unprepare(se->clk);  in geni_se_clks_off()
500 int geni_se_resources_off(struct geni_se *se)  in geni_se_resources_off()  argument
504 	if (has_acpi_companion(se->dev))  in geni_se_resources_off()
507 	ret = pinctrl_pm_select_sleep_state(se->dev);  in geni_se_resources_off()
511 	geni_se_clks_off(se);  in geni_se_resources_off()
516 static int geni_se_clks_on(struct geni_se *se)  in geni_se_clks_on()  argument
519 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_clks_on()
525 	ret = clk_prepare_enable(se->clk);  in geni_se_clks_on()
538 int geni_se_resources_on(struct geni_se *se)  in geni_se_resources_on()  argument
542 	if (has_acpi_companion(se->dev))  in geni_se_resources_on()
545 	ret = geni_se_clks_on(se);  in geni_se_resources_on()
549 	ret = pinctrl_pm_select_default_state(se->dev);  in geni_se_resources_on()
551 		geni_se_clks_off(se);  in geni_se_resources_on()
570 int geni_se_clk_tbl_get(struct geni_se *se, unsigned long **tbl)  in geni_se_clk_tbl_get()  argument
575 	if (se->clk_perf_tbl) {  in geni_se_clk_tbl_get()
576 		*tbl = se->clk_perf_tbl;  in geni_se_clk_tbl_get()
577 		return se->num_clk_levels;  in geni_se_clk_tbl_get()
580 	se->clk_perf_tbl = devm_kcalloc(se->dev, MAX_CLK_PERF_LEVEL,  in geni_se_clk_tbl_get()
581 					sizeof(*se->clk_perf_tbl),  in geni_se_clk_tbl_get()
583 	if (!se->clk_perf_tbl)  in geni_se_clk_tbl_get()
587 		freq = clk_round_rate(se->clk, freq + 1);  in geni_se_clk_tbl_get()
588 		if (freq <= 0 || freq == se->clk_perf_tbl[i - 1])  in geni_se_clk_tbl_get()
590 		se->clk_perf_tbl[i] = freq;  in geni_se_clk_tbl_get()
592 	se->num_clk_levels = i;  in geni_se_clk_tbl_get()
593 	*tbl = se->clk_perf_tbl;  in geni_se_clk_tbl_get()
594 	return se->num_clk_levels;  in geni_se_clk_tbl_get()
617 int geni_se_clk_freq_match(struct geni_se *se, unsigned long req_freq,  in geni_se_clk_freq_match()  argument
628 	num_clk_levels = geni_se_clk_tbl_get(se, &tbl);  in geni_se_clk_freq_match()
673 void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len)  in geni_se_tx_init_dma()  argument
680 	writel_relaxed(val, se->base + SE_DMA_TX_IRQ_EN_SET);  in geni_se_tx_init_dma()
681 	writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_TX_PTR_L);  in geni_se_tx_init_dma()
682 	writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_TX_PTR_H);  in geni_se_tx_init_dma()
683 	writel_relaxed(GENI_SE_DMA_EOT_BUF, se->base + SE_DMA_TX_ATTR);  in geni_se_tx_init_dma()
684 	writel(len, se->base + SE_DMA_TX_LEN);  in geni_se_tx_init_dma()
699 int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len,  in geni_se_tx_dma_prep()  argument
702 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_tx_dma_prep()
711 	geni_se_tx_init_dma(se, *iova, len);  in geni_se_tx_dma_prep()
724 void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len)  in geni_se_rx_init_dma()  argument
731 	writel_relaxed(val, se->base + SE_DMA_RX_IRQ_EN_SET);  in geni_se_rx_init_dma()
732 	writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_RX_PTR_L);  in geni_se_rx_init_dma()
733 	writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_RX_PTR_H);  in geni_se_rx_init_dma()
735 	writel_relaxed(0, se->base + SE_DMA_RX_ATTR);  in geni_se_rx_init_dma()
736 	writel(len, se->base + SE_DMA_RX_LEN);  in geni_se_rx_init_dma()
751 int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len,  in geni_se_rx_dma_prep()  argument
754 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_rx_dma_prep()
763 	geni_se_rx_init_dma(se, *iova, len);  in geni_se_rx_dma_prep()
776 void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len)  in geni_se_tx_dma_unprep()  argument
778 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_tx_dma_unprep()
793 void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len)  in geni_se_rx_dma_unprep()  argument
795 	struct geni_wrapper *wrapper = se->wrapper;  in geni_se_rx_dma_unprep()
802 int geni_icc_get(struct geni_se *se, const char *icc_ddr)  in geni_icc_get()  argument
807 	if (has_acpi_companion(se->dev))  in geni_icc_get()
810 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {  in geni_icc_get()
814 		se->icc_paths[i].path = devm_of_icc_get(se->dev, icc_names[i]);  in geni_icc_get()
815 		if (IS_ERR(se->icc_paths[i].path))  in geni_icc_get()
822 	err = PTR_ERR(se->icc_paths[i].path);  in geni_icc_get()
824 		dev_err_ratelimited(se->dev, "Failed to get ICC path '%s': %d\n",  in geni_icc_get()
831 int geni_icc_set_bw(struct geni_se *se)  in geni_icc_set_bw()  argument
835 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {  in geni_icc_set_bw()
836 		ret = icc_set_bw(se->icc_paths[i].path,  in geni_icc_set_bw()
837 			se->icc_paths[i].avg_bw, se->icc_paths[i].avg_bw);  in geni_icc_set_bw()
839 			dev_err_ratelimited(se->dev, "ICC BW voting failed on path '%s': %d\n",  in geni_icc_set_bw()
849 void geni_icc_set_tag(struct geni_se *se, u32 tag)  in geni_icc_set_tag()  argument
853 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++)  in geni_icc_set_tag()
854 		icc_set_tag(se->icc_paths[i].path, tag);  in geni_icc_set_tag()
859 int geni_icc_enable(struct geni_se *se)  in geni_icc_enable()  argument
863 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {  in geni_icc_enable()
864 		ret = icc_enable(se->icc_paths[i].path);  in geni_icc_enable()
866 			dev_err_ratelimited(se->dev, "ICC enable failed on path '%s': %d\n",  in geni_icc_enable()
876 int geni_icc_disable(struct geni_se *se)  in geni_icc_disable()  argument
880 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {  in geni_icc_disable()
881 		ret = icc_disable(se->icc_paths[i].path);  in geni_icc_disable()
883 			dev_err_ratelimited(se->dev, "ICC disable failed on path '%s': %d\n",  in geni_icc_disable()