Lines Matching +full:0 +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
16 #include <linux/nvmem-consumer.h>
21 #include <linux/soc/qcom/llcc-qcom.h>
23 #define ACTIVATE BIT(0)
24 #define DEACTIVATE BIT(1)
25 #define ACT_CLEAR BIT(0)
27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
29 #define ACT_CTRL_ACT_TRIG BIT(0)
30 #define ACT_CTRL_OPCODE_SHIFT 0x01
31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 0x02
32 #define ATTR1_FIXED_SIZE_SHIFT 0x03
33 #define ATTR1_PRIORITY_SHIFT 0x04
34 #define ATTR1_MAX_CAP_SHIFT 0x10
35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0)
37 #define ATTR0_BONUS_WAYS_SHIFT 0x10
49 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
50 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
51 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
53 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
54 #define LLCC_TRP_PCB_ACT 0x21f04
55 #define LLCC_TRP_ALGO_CFG1 0x21f0c
56 #define LLCC_TRP_ALGO_CFG2 0x21f10
57 #define LLCC_TRP_ALGO_CFG3 0x21f14
58 #define LLCC_TRP_ALGO_CFG4 0x21f18
59 #define LLCC_TRP_ALGO_CFG5 0x21f1c
60 #define LLCC_TRP_WRSC_EN 0x21f20
61 #define LLCC_TRP_ALGO_CFG6 0x21f24
62 #define LLCC_TRP_ALGO_CFG7 0x21f28
63 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c
64 #define LLCC_TRP_ALGO_CFG8 0x21f30
66 #define LLCC_VERSION_2_0_0_0 0x02000000
67 #define LLCC_VERSION_2_1_0_0 0x02010000
68 #define LLCC_VERSION_4_1_0_0 0x04010000
71 * struct llcc_slice_config - Data associated with the llcc slice
86 * configured to 1 only bonus and reserved ways are probed.
87 * When configured to 0 all ways in llcc are probed.
97 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
98 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
99 * under-cap.
100 * @mru_rollover: Roll-over on reserved cache ways.
101 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
102 * same-scid lines for replacement.
103 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
104 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
105 * over-cap scid. Depends on corresponding bit being set in
107 * @vict_prio: When current scid is under-capacity, allocate over other
108 * lower-than victim priority-line threshold scid.
156 {LLCC_CPUSS, 1, 2048, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 1, 0, 0},
157 {LLCC_VIDSC0, 2, 512, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
158 {LLCC_CPUSS1, 3, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
159 {LLCC_CPUHWT, 5, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
160 {LLCC_AUDIO, 6, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0},
161 {LLCC_CMPT, 10, 4096, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
162 {LLCC_GPUHTW, 11, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
163 {LLCC_GPU, 12, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 1, 0},
164 {LLCC_MMUHWT, 13, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0},
165 {LLCC_CMPTDMA, 15, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
166 {LLCC_DISP, 16, 4096, 2, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
167 {LLCC_VIDFW, 17, 3072, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
168 {LLCC_AUDHW, 22, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0},
169 {LLCC_CVP, 28, 256, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
170 {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0},
171 {LLCC_WRCACHE, 31, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0},
175 { LLCC_CPUSS, 1, 256, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 1 },
176 { LLCC_MDM, 8, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
177 { LLCC_GPUHTW, 11, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
178 { LLCC_GPU, 12, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
182 { LLCC_CPUSS, 1, 768, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 1, 0},
183 { LLCC_MDMHPGRW, 7, 512, 2, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
184 { LLCC_CMPT, 10, 768, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
185 { LLCC_GPUHTW, 11, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
186 { LLCC_GPU, 12, 512, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
187 { LLCC_MMUHWT, 13, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 0, 1, 0},
188 { LLCC_MDMPNG, 21, 768, 0, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
189 { LLCC_WLHW, 24, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
190 { LLCC_MODPE, 29, 64, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
194 { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1 },
195 { LLCC_VIDSC0, 2, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
196 { LLCC_VIDSC1, 3, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
197 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
198 { LLCC_MDMHPGRW, 7, 3072, 1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 },
199 { LLCC_MDM, 8, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
200 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
201 { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
202 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
203 { LLCC_GPU, 12, 5120, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
204 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 },
205 { LLCC_CMPTDMA, 15, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
206 { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
207 { LLCC_VIDFW, 17, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
208 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
209 { LLCC_MDMPNG, 21, 1024, 0, 1, 0xc, 0x0, 0, 0, 0, 1, 0 },
210 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
211 { LLCC_NPU, 23, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
212 { LLCC_WLHW, 24, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
213 { LLCC_MODPE, 29, 512, 1, 1, 0xc, 0x0, 0, 0, 0, 1, 0 },
214 { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 },
215 { LLCC_WRCACHE, 31, 128, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 },
219 { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
220 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
221 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
222 { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
223 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
224 { LLCC_GPU, 12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },
225 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
226 { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
227 { LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
228 { LLCC_ECC, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
229 { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
230 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
231 { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
232 { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
233 { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
234 { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
238 { LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 },
239 { LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
240 { LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
241 { LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0 },
242 { LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
243 { LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
244 { LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0 },
245 { LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
246 { LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
247 { LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0 },
248 { LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0 },
249 { LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1 },
250 { LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
251 { LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
252 { LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
253 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0 },
254 { LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0 },
255 { LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 },
259 { LLCC_CPUSS, 1, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1 },
260 { LLCC_MDM, 8, 512, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
261 { LLCC_GPUHTW, 11, 256, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
262 { LLCC_GPU, 12, 512, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
263 { LLCC_MDMPNG, 21, 768, 0, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
264 { LLCC_NPU, 23, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
265 { LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
269 { LLCC_CPUSS, 1, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 },
270 { LLCC_MDM, 8, 128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
271 { LLCC_GPUHTW, 11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
272 { LLCC_GPU, 12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
273 { LLCC_NPU, 23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
277 { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 },
278 { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
279 { LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
280 { LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
281 { LLCC_MDMHPGRW, 7, 3072, 1, 0, 0xFF, 0xF00, 0, 0, 0, 1, 0 },
282 { LLCC_MDM, 8, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
283 { LLCC_MODHW, 9, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
284 { LLCC_CMPT, 10, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
285 { LLCC_GPUHTW , 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
286 { LLCC_GPU, 12, 2560, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
287 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1 },
288 { LLCC_CMPTDMA, 15, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
289 { LLCC_DISP, 16, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
290 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
291 { LLCC_MDMHPFX, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
292 { LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
293 { LLCC_NPU, 23, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
294 { LLCC_WLHW, 24, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
295 { LLCC_MODPE, 29, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
296 { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 },
297 { LLCC_WRCACHE, 31, 128, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0 },
301 { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
302 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
303 { LLCC_AUDIO, 6, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
304 { LLCC_CMPT, 10, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
305 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
306 { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },
307 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
308 { LLCC_CMPTDMA, 15, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
309 { LLCC_DISP, 16, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
310 { LLCC_VIDFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
311 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
312 { LLCC_NPU, 23, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
313 { LLCC_WLHW, 24, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
314 { LLCC_CVP, 28, 256, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
315 { LLCC_APTCM, 30, 128, 3, 0, 0x0, 0x3, 1, 0, 0, 1, 0, 0 },
316 { LLCC_WRCACHE, 31, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
320 { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 1 },
321 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
322 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
323 { LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
324 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
325 { LLCC_CMPT, 10, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
326 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
327 { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
328 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
329 { LLCC_DISP, 16, 3072, 2, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
330 { LLCC_MDMPNG, 21, 1024, 0, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
331 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
332 { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
333 { LLCC_MODPE, 29, 256, 1, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
334 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 0, 1, 0 },
335 { LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
336 { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
337 { LLCC_CPUSS1, 3, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
338 { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
342 {LLCC_CPUSS, 1, 3072, 1, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 },
343 {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
344 {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
345 {LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
346 {LLCC_MODHW, 9, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
347 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
348 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
349 {LLCC_GPU, 12, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 1, 0 },
350 {LLCC_MMUHWT, 13, 768, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
351 {LLCC_DISP, 16, 4096, 2, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
352 {LLCC_MDMPNG, 21, 1024, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 },
353 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
354 {LLCC_CVP, 28, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
355 {LLCC_MODPE, 29, 64, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 },
356 {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0 },
357 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
358 {LLCC_CVPFW, 17, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
359 {LLCC_CPUSS1, 3, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
360 {LLCC_CAMEXP0, 4, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
361 {LLCC_CPUMTE, 23, 256, 1, 1, 0x0FFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
362 {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 },
363 {LLCC_CAMEXP1, 27, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
364 {LLCC_AENPU, 8, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
368 {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
369 {LLCC_VIDSC0, 2, 512, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
370 {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
371 {LLCC_MDMHPGRW, 25, 1024, 4, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
372 {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
373 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
374 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
375 {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, },
376 {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
377 {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
378 {LLCC_MDMPNG, 27, 1024, 0, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
379 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
380 {LLCC_CVP, 8, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
381 {LLCC_MODPE, 29, 64, 1, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, },
382 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
383 {LLCC_CAMEXP0, 4, 256, 4, 1, 0xF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
384 {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
385 {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
386 {LLCC_CMPTHCP, 17, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
387 {LLCC_LCPDARE, 30, 128, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, },
388 {LLCC_AENPU, 3, 3072, 1, 1, 0xFE01FF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
389 {LLCC_ISLAND1, 12, 1792, 7, 1, 0xFE00, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
390 {LLCC_ISLAND4, 15, 256, 7, 1, 0x10000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
391 {LLCC_CAMEXP2, 19, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
392 {LLCC_CAMEXP3, 20, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
393 {LLCC_CAMEXP4, 21, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
394 {LLCC_DISP_WB, 23, 1024, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
395 {LLCC_DISP_1, 24, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
396 {LLCC_VIDVSP, 28, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
400 {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0},
401 {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
402 {LLCC_AUDIO, 6, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
403 {LLCC_MDMHPGRW, 25, 1024, 3, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
404 {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
405 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
406 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
407 {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0},
408 {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
409 {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
410 {LLCC_MDMHPFX, 24, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
411 {LLCC_MDMPNG, 27, 1024, 0, 1, 0x000000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
412 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
413 {LLCC_CVP, 8, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
414 {LLCC_MODPE, 29, 128, 1, 1, 0xF00000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
415 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
416 {LLCC_CAMEXP0, 4, 256, 3, 1, 0xF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
417 {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
418 {LLCC_CMPTHCP, 17, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
419 {LLCC_LCPDARE, 30, 128, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
420 {LLCC_AENPU, 3, 3072, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
421 {LLCC_ISLAND1, 12, 5888, 7, 1, 0x0, 0x7FFFFF, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
422 {LLCC_DISP_WB, 23, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
423 {LLCC_VIDVSP, 28, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
427 { LLCC_MDMHPGRW, 7, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
428 { LLCC_MODHW, 9, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
429 { LLCC_MDMPNG, 21, 256, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
430 { LLCC_ECC, 26, 512, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
431 { LLCC_MODPE, 29, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
432 { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
433 { LLCC_WRCACHE, 31, 128, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
437 { LLCC_MDMHPGRW, 7, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
438 { LLCC_MODHW, 9, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
439 { LLCC_MDMPNG, 21, 512, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
440 { LLCC_ECC, 26, 1024, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
441 { LLCC_MODPE, 29, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
442 { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
443 { LLCC_WRCACHE, 31, 256, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
447 { LLCC_MDMHPGRW, 7, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
448 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
449 { LLCC_MDMPNG, 21, 1024, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
450 { LLCC_ECC, 26, 2048, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
451 { LLCC_MODPE, 29, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
452 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
453 { LLCC_WRCACHE, 31, 512, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
457 {LLCC_CPUSS, 1, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
458 {LLCC_VIDSC0, 2, 512, 4, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
459 {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
460 {LLCC_CMPT, 10, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
461 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
462 {LLCC_GPU, 9, 4608, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0},
463 {LLCC_MMUHWT, 18, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
464 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
465 {LLCC_CVP, 8, 512, 4, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
466 {LLCC_WRCACHE, 31, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
467 {LLCC_CAMEXP0, 4, 256, 4, 1, 0x3, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
468 {LLCC_CAMEXP1, 7, 3072, 3, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
469 {LLCC_LCPDARE, 30, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
470 {LLCC_AENPU, 3, 3072, 1, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
471 {LLCC_ISLAND1, 12, 2048, 7, 1, 0x0, 0xF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
472 {LLCC_CAMEXP2, 19, 3072, 3, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
473 {LLCC_CAMEXP3, 20, 3072, 2, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
474 {LLCC_CAMEXP4, 21, 3072, 2, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
478 .trp_ecc_error_status0 = 0x20344,
479 .trp_ecc_error_status1 = 0x20348,
480 .trp_ecc_sb_err_syn0 = 0x2304c,
481 .trp_ecc_db_err_syn0 = 0x20370,
482 .trp_ecc_error_cntr_clear = 0x20440,
483 .trp_interrupt_0_status = 0x20480,
484 .trp_interrupt_0_clear = 0x20484,
485 .trp_interrupt_0_enable = 0x20488,
488 .cmn_status0 = 0x3000c,
489 .cmn_interrupt_0_enable = 0x3001c,
490 .cmn_interrupt_2_enable = 0x3003c,
493 .drp_ecc_error_cfg = 0x40000,
494 .drp_ecc_error_cntr_clear = 0x40004,
495 .drp_interrupt_status = 0x41000,
496 .drp_interrupt_clear = 0x41008,
497 .drp_interrupt_enable = 0x4100c,
498 .drp_ecc_error_status0 = 0x42044,
499 .drp_ecc_error_status1 = 0x42048,
500 .drp_ecc_sb_err_syn0 = 0x4204c,
501 .drp_ecc_db_err_syn0 = 0x42070,
505 .trp_ecc_error_status0 = 0x20344,
506 .trp_ecc_error_status1 = 0x20348,
507 .trp_ecc_sb_err_syn0 = 0x2034c,
508 .trp_ecc_db_err_syn0 = 0x20370,
509 .trp_ecc_error_cntr_clear = 0x20440,
510 .trp_interrupt_0_status = 0x20480,
511 .trp_interrupt_0_clear = 0x20484,
512 .trp_interrupt_0_enable = 0x20488,
515 .cmn_status0 = 0x3400c,
516 .cmn_interrupt_0_enable = 0x3401c,
517 .cmn_interrupt_2_enable = 0x3403c,
520 .drp_ecc_error_cfg = 0x50000,
521 .drp_ecc_error_cntr_clear = 0x50004,
522 .drp_interrupt_status = 0x50020,
523 .drp_interrupt_clear = 0x50028,
524 .drp_interrupt_enable = 0x5002c,
525 .drp_ecc_error_status0 = 0x520f4,
526 .drp_ecc_error_status1 = 0x520f8,
527 .drp_ecc_sb_err_syn0 = 0x520fc,
528 .drp_ecc_db_err_syn0 = 0x52120,
533 [LLCC_COMMON_HW_INFO] = 0x00030000,
534 [LLCC_COMMON_STATUS0] = 0x0003000c,
539 [LLCC_COMMON_HW_INFO] = 0x00034000,
540 [LLCC_COMMON_STATUS0] = 0x0003400c,
806 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
809 * llcc_slice_getd - get llcc slice descriptor
824 cfg = drv_data->cfg; in llcc_slice_getd()
825 sz = drv_data->cfg_size; in llcc_slice_getd()
827 for (count = 0; cfg && count < sz; count++, cfg++) in llcc_slice_getd()
828 if (cfg->usecase_id == uid) in llcc_slice_getd()
832 return ERR_PTR(-ENODEV); in llcc_slice_getd()
836 return ERR_PTR(-ENOMEM); in llcc_slice_getd()
838 desc->slice_id = cfg->slice_id; in llcc_slice_getd()
839 desc->slice_size = cfg->max_cap; in llcc_slice_getd()
846 * llcc_slice_putd - llcc slice descriptor
875 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
882 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
887 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in llcc_update_act_ctrl()
888 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap; in llcc_update_act_ctrl()
891 0, LLCC_STATUS_READ_DELAY); in llcc_update_act_ctrl()
896 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, in llcc_update_act_ctrl()
898 0, LLCC_STATUS_READ_DELAY); in llcc_update_act_ctrl()
902 if (drv_data->version >= LLCC_VERSION_4_1_0_0) in llcc_update_act_ctrl()
903 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, in llcc_update_act_ctrl()
910 * llcc_slice_activate - Activate the llcc slice
925 return -EINVAL; in llcc_slice_activate()
927 mutex_lock(&drv_data->lock); in llcc_slice_activate()
928 if (test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_activate()
929 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
930 return 0; in llcc_slice_activate()
935 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_activate()
938 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
942 __set_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_activate()
943 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
950 * llcc_slice_deactivate - Deactivate the llcc slice
965 return -EINVAL; in llcc_slice_deactivate()
967 mutex_lock(&drv_data->lock); in llcc_slice_deactivate()
968 if (!test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_deactivate()
969 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
970 return 0; in llcc_slice_deactivate()
974 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_deactivate()
977 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
981 __clear_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_deactivate()
982 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
989 * llcc_get_slice_id - return the slice id
995 return -EINVAL; in llcc_get_slice_id()
997 return desc->slice_id; in llcc_get_slice_id()
1002 * llcc_get_slice_size - return the slice id
1008 return 0; in llcc_get_slice_size()
1010 return desc->slice_size; in llcc_get_slice_size()
1027 attr1_val = config->cache_mode; in _qcom_llcc_cfg_program()
1028 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; in _qcom_llcc_cfg_program()
1029 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; in _qcom_llcc_cfg_program()
1030 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; in _qcom_llcc_cfg_program()
1032 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); in _qcom_llcc_cfg_program()
1041 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in _qcom_llcc_cfg_program()
1045 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1047 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); in _qcom_llcc_cfg_program()
1051 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1052 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1053 attr0_val = config->res_ways; in _qcom_llcc_cfg_program()
1054 attr2_val = config->bonus_ways; in _qcom_llcc_cfg_program()
1056 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; in _qcom_llcc_cfg_program()
1057 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; in _qcom_llcc_cfg_program()
1060 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1062 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); in _qcom_llcc_cfg_program()
1066 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1067 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); in _qcom_llcc_cfg_program()
1072 if (cfg->need_llcc_cfg) { in _qcom_llcc_cfg_program()
1075 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; in _qcom_llcc_cfg_program()
1076 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, in _qcom_llcc_cfg_program()
1077 BIT(config->slice_id), disable_cap_alloc); in _qcom_llcc_cfg_program()
1081 if (drv_data->version < LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1082 retain_pc = config->retain_on_pc << config->slice_id; in _qcom_llcc_cfg_program()
1083 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, in _qcom_llcc_cfg_program()
1084 BIT(config->slice_id), retain_pc); in _qcom_llcc_cfg_program()
1090 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { in _qcom_llcc_cfg_program()
1093 wren = config->write_scid_en << config->slice_id; in _qcom_llcc_cfg_program()
1094 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, in _qcom_llcc_cfg_program()
1095 BIT(config->slice_id), wren); in _qcom_llcc_cfg_program()
1100 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { in _qcom_llcc_cfg_program()
1103 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; in _qcom_llcc_cfg_program()
1104 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, in _qcom_llcc_cfg_program()
1105 BIT(config->slice_id), wr_cache_en); in _qcom_llcc_cfg_program()
1110 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1120 stale_en = config->stale_en << config->slice_id; in _qcom_llcc_cfg_program()
1121 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, in _qcom_llcc_cfg_program()
1122 BIT(config->slice_id), stale_en); in _qcom_llcc_cfg_program()
1126 stale_cap_en = config->stale_cap_en << config->slice_id; in _qcom_llcc_cfg_program()
1127 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, in _qcom_llcc_cfg_program()
1128 BIT(config->slice_id), stale_cap_en); in _qcom_llcc_cfg_program()
1132 mru_uncap_en = config->mru_uncap_en << config->slice_id; in _qcom_llcc_cfg_program()
1133 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, in _qcom_llcc_cfg_program()
1134 BIT(config->slice_id), mru_uncap_en); in _qcom_llcc_cfg_program()
1138 mru_rollover = config->mru_rollover << config->slice_id; in _qcom_llcc_cfg_program()
1139 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, in _qcom_llcc_cfg_program()
1140 BIT(config->slice_id), mru_rollover); in _qcom_llcc_cfg_program()
1144 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; in _qcom_llcc_cfg_program()
1145 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, in _qcom_llcc_cfg_program()
1146 BIT(config->slice_id), alloc_oneway_en); in _qcom_llcc_cfg_program()
1150 ovcap_en = config->ovcap_en << config->slice_id; in _qcom_llcc_cfg_program()
1151 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, in _qcom_llcc_cfg_program()
1152 BIT(config->slice_id), ovcap_en); in _qcom_llcc_cfg_program()
1156 ovcap_prio = config->ovcap_prio << config->slice_id; in _qcom_llcc_cfg_program()
1157 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, in _qcom_llcc_cfg_program()
1158 BIT(config->slice_id), ovcap_prio); in _qcom_llcc_cfg_program()
1162 vict_prio = config->vict_prio << config->slice_id; in _qcom_llcc_cfg_program()
1163 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, in _qcom_llcc_cfg_program()
1164 BIT(config->slice_id), vict_prio); in _qcom_llcc_cfg_program()
1169 if (config->activate_on_init) { in _qcom_llcc_cfg_program()
1170 desc.slice_id = config->slice_id; in _qcom_llcc_cfg_program()
1182 int ret = 0; in qcom_llcc_cfg_program()
1185 sz = drv_data->cfg_size; in qcom_llcc_cfg_program()
1186 llcc_table = drv_data->cfg; in qcom_llcc_cfg_program()
1188 for (i = 0; i < sz; i++) { in qcom_llcc_cfg_program()
1201 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index); in qcom_llcc_get_cfg_index()
1202 if (ret == -ENOENT || ret == -EOPNOTSUPP) { in qcom_llcc_get_cfg_index()
1203 if (num_config > 1) in qcom_llcc_get_cfg_index()
1204 return -EINVAL; in qcom_llcc_get_cfg_index()
1205 *cfg_index = 0; in qcom_llcc_get_cfg_index()
1206 return 0; in qcom_llcc_get_cfg_index()
1210 ret = -EINVAL; in qcom_llcc_get_cfg_index()
1218 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_remove()
1237 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); in qcom_llcc_init_mmio()
1243 struct device *dev = &pdev->dev; in qcom_llcc_probe()
1255 return -EBUSY; in qcom_llcc_probe()
1259 ret = -ENOMEM; in qcom_llcc_probe()
1264 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); in qcom_llcc_probe()
1270 cfgs = of_device_get_match_data(&pdev->dev); in qcom_llcc_probe()
1272 ret = -EINVAL; in qcom_llcc_probe()
1275 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); in qcom_llcc_probe()
1278 cfg = &cfgs->llcc_config[cfg_index]; in qcom_llcc_probe()
1280 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); in qcom_llcc_probe()
1286 drv_data->num_banks = num_banks; in qcom_llcc_probe()
1288 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); in qcom_llcc_probe()
1289 if (!drv_data->regmaps) { in qcom_llcc_probe()
1290 ret = -ENOMEM; in qcom_llcc_probe()
1294 drv_data->regmaps[0] = regmap; in qcom_llcc_probe()
1297 for (i = 1; i < num_banks; i++) { in qcom_llcc_probe()
1300 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); in qcom_llcc_probe()
1301 if (IS_ERR(drv_data->regmaps[i])) { in qcom_llcc_probe()
1302 ret = PTR_ERR(drv_data->regmaps[i]); in qcom_llcc_probe()
1307 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); in qcom_llcc_probe()
1308 if (IS_ERR(drv_data->bcast_regmap)) { in qcom_llcc_probe()
1309 ret = PTR_ERR(drv_data->bcast_regmap); in qcom_llcc_probe()
1314 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], in qcom_llcc_probe()
1319 drv_data->version = version; in qcom_llcc_probe()
1321 /* Applicable only when drv_data->version >= 4.1 */ in qcom_llcc_probe()
1322 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in qcom_llcc_probe()
1323 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base"); in qcom_llcc_probe()
1324 if (IS_ERR(drv_data->bcast_and_regmap)) { in qcom_llcc_probe()
1325 ret = PTR_ERR(drv_data->bcast_and_regmap); in qcom_llcc_probe()
1326 if (ret == -EINVAL) in qcom_llcc_probe()
1327 drv_data->bcast_and_regmap = NULL; in qcom_llcc_probe()
1333 llcc_cfg = cfg->sct_data; in qcom_llcc_probe()
1334 sz = cfg->size; in qcom_llcc_probe()
1336 for (i = 0; i < sz; i++) in qcom_llcc_probe()
1337 if (llcc_cfg[i].slice_id > drv_data->max_slices) in qcom_llcc_probe()
1338 drv_data->max_slices = llcc_cfg[i].slice_id; in qcom_llcc_probe()
1340 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, in qcom_llcc_probe()
1342 if (!drv_data->bitmap) { in qcom_llcc_probe()
1343 ret = -ENOMEM; in qcom_llcc_probe()
1347 drv_data->cfg = llcc_cfg; in qcom_llcc_probe()
1348 drv_data->cfg_size = sz; in qcom_llcc_probe()
1349 drv_data->edac_reg_offset = cfg->edac_reg_offset; in qcom_llcc_probe()
1350 drv_data->ecc_irq_configured = cfg->irq_configured; in qcom_llcc_probe()
1351 mutex_init(&drv_data->lock); in qcom_llcc_probe()
1358 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); in qcom_llcc_probe()
1366 if (!cfg->no_edac) { in qcom_llcc_probe()
1367 llcc_edac = platform_device_register_data(&pdev->dev, in qcom_llcc_probe()
1368 "qcom_llcc_edac", -1, drv_data, in qcom_llcc_probe()
1374 return 0; in qcom_llcc_probe()
1376 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_probe()
1381 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
1382 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
1383 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
1384 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
1385 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
1386 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
1387 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
1388 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
1389 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
1390 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
1391 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
1392 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
1393 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
1394 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
1395 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
1396 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
1403 .name = "qcom-llcc",