Lines Matching full:npe
24 #include <linux/soc/ixp4xx/npe.h>
46 /* NPE exec status (read) and command (write) */
86 #define ECS_INSTRUCT_REG 0x11 /* NPE Instruction Register */
99 /* NPE watchpoint_fifo register bit */
102 /* NPE messaging_status register bit definitions */
112 /* NPE messaging_control register bit definitions */
118 /* NPE mailbox_status value for reset */
121 #define NPE_A_FIRMWARE "NPE-A"
122 #define NPE_B_FIRMWARE "NPE-B"
123 #define NPE_C_FIRMWARE "NPE-C"
127 #define print_npe(pri, npe, fmt, ...) \ argument
128 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
131 #define debug_msg(npe, fmt, ...) \ argument
132 print_npe(KERN_DEBUG, npe, fmt, ## __VA_ARGS__)
134 #define debug_msg(npe, fmt, ...) argument
155 static struct npe npe_tab[NPE_COUNT] = {
165 int npe_running(struct npe *npe) in npe_running() argument
167 return (__raw_readl(&npe->regs->exec_status_cmd) & STAT_RUN) != 0; in npe_running()
170 static void npe_cmd_write(struct npe *npe, u32 addr, int cmd, u32 data) in npe_cmd_write() argument
172 __raw_writel(data, &npe->regs->exec_data); in npe_cmd_write()
173 __raw_writel(addr, &npe->regs->exec_addr); in npe_cmd_write()
174 __raw_writel(cmd, &npe->regs->exec_status_cmd); in npe_cmd_write()
177 static u32 npe_cmd_read(struct npe *npe, u32 addr, int cmd) in npe_cmd_read() argument
179 __raw_writel(addr, &npe->regs->exec_addr); in npe_cmd_read()
180 __raw_writel(cmd, &npe->regs->exec_status_cmd); in npe_cmd_read()
181 /* Iintroduce extra read cycles after issuing read command to NPE in npe_cmd_read()
182 so that we read the register after the NPE has updated it. in npe_cmd_read()
183 This is to overcome race condition between XScale and NPE */ in npe_cmd_read()
184 __raw_readl(&npe->regs->exec_data); in npe_cmd_read()
185 __raw_readl(&npe->regs->exec_data); in npe_cmd_read()
186 return __raw_readl(&npe->regs->exec_data); in npe_cmd_read()
189 static void npe_clear_active(struct npe *npe, u32 reg) in npe_clear_active() argument
191 u32 val = npe_cmd_read(npe, reg, CMD_RD_ECS_REG); in npe_clear_active()
192 npe_cmd_write(npe, reg, CMD_WR_ECS_REG, val & ~ECS_REG_0_ACTIVE); in npe_clear_active()
195 static void npe_start(struct npe *npe) in npe_start() argument
198 npe_clear_active(npe, ECS_PRI_1_CTXT_REG_0); in npe_start()
199 npe_clear_active(npe, ECS_PRI_2_CTXT_REG_0); in npe_start()
200 npe_clear_active(npe, ECS_DBG_CTXT_REG_0); in npe_start()
202 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); in npe_start()
203 __raw_writel(CMD_NPE_START, &npe->regs->exec_status_cmd); in npe_start()
206 static void npe_stop(struct npe *npe) in npe_stop() argument
208 __raw_writel(CMD_NPE_STOP, &npe->regs->exec_status_cmd); in npe_stop()
209 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); /*FIXME?*/ in npe_stop()
212 static int __must_check npe_debug_instr(struct npe *npe, u32 instr, u32 ctx, in npe_debug_instr() argument
219 npe_cmd_write(npe, ECS_DBG_CTXT_REG_0, CMD_WR_ECS_REG, in npe_debug_instr()
227 npe_cmd_write(npe, ECS_DBG_CTXT_REG_1, CMD_WR_ECS_REG, in npe_debug_instr()
232 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); in npe_debug_instr()
234 /* load NPE instruction into the instruction register */ in npe_debug_instr()
235 npe_cmd_write(npe, ECS_INSTRUCT_REG, CMD_WR_ECS_REG, instr); in npe_debug_instr()
237 /* we need this value later to wait for completion of NPE execution in npe_debug_instr()
239 wc = __raw_readl(&npe->regs->watch_count); in npe_debug_instr()
242 __raw_writel(CMD_NPE_STEP, &npe->regs->exec_status_cmd); in npe_debug_instr()
244 /* Watch Count register increments when NPE completes an instruction */ in npe_debug_instr()
246 if (wc != __raw_readl(&npe->regs->watch_count)) in npe_debug_instr()
251 print_npe(KERN_ERR, npe, "reset: npe_debug_instr(): timeout\n"); in npe_debug_instr()
255 static int __must_check npe_logical_reg_write8(struct npe *npe, u32 addr, in npe_logical_reg_write8() argument
258 /* here we build the NPE assembler instruction: mov8 d0, #0 */ in npe_logical_reg_write8()
263 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */ in npe_logical_reg_write8()
266 static int __must_check npe_logical_reg_write16(struct npe *npe, u32 addr, in npe_logical_reg_write16() argument
269 /* here we build the NPE assembler instruction: mov16 d0, #0 */ in npe_logical_reg_write16()
274 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */ in npe_logical_reg_write16()
277 static int __must_check npe_logical_reg_write32(struct npe *npe, u32 addr, in npe_logical_reg_write32() argument
281 if (npe_logical_reg_write16(npe, addr, val >> 16, ctx)) in npe_logical_reg_write32()
283 return npe_logical_reg_write16(npe, addr + 2, val & 0xFFFF, ctx); in npe_logical_reg_write32()
286 static int npe_reset(struct npe *npe) in npe_reset() argument
288 u32 reset_bit = (IXP4XX_FEATURE_RESET_NPEA << npe->id); in npe_reset()
292 ctl = (__raw_readl(&npe->regs->messaging_control) | 0x3F000000) & in npe_reset()
296 __raw_writel(ctl & 0x3F00FFFF, &npe->regs->messaging_control); in npe_reset()
300 exec_count = __raw_readl(&npe->regs->exec_count); in npe_reset()
301 __raw_writel(0, &npe->regs->exec_count); in npe_reset()
304 ctx_reg2 = npe_cmd_read(npe, ECS_DBG_CTXT_REG_2, CMD_RD_ECS_REG); in npe_reset()
305 npe_cmd_write(npe, ECS_DBG_CTXT_REG_2, CMD_WR_ECS_REG, ctx_reg2 | in npe_reset()
309 while (__raw_readl(&npe->regs->watchpoint_fifo) & WFIFO_VALID) in npe_reset()
311 while (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_OFNE) in npe_reset()
313 print_npe(KERN_DEBUG, npe, "npe_reset: read FIFO = 0x%X\n", in npe_reset()
314 __raw_readl(&npe->regs->in_out_fifo)); in npe_reset()
316 while (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE) in npe_reset()
317 /* step execution of the NPE intruction to read inFIFO using in npe_reset()
319 if (npe_debug_instr(npe, INSTR_RD_FIFO, 0, 0)) in npe_reset()
323 __raw_writel(RESET_MBOX_STAT, &npe->regs->mailbox_status); in npe_reset()
324 /* from NPE side */ in npe_reset()
325 if (npe_debug_instr(npe, INSTR_RESET_MBOX, 0, 0)) in npe_reset()
328 /* Reset the physical registers in the NPE register file */ in npe_reset()
330 if (npe_logical_reg_write16(npe, NPE_REGMAP, val >> 1, 0)) in npe_reset()
333 if (npe_logical_reg_write32(npe, (val & 1) * 4, 0, 0)) in npe_reset()
340 for Background ECS, to set where NPE starts executing code */ in npe_reset()
341 val = npe_cmd_read(npe, ECS_BG_CTXT_REG_0, CMD_RD_ECS_REG); in npe_reset()
344 npe_cmd_write(npe, ECS_BG_CTXT_REG_0, CMD_WR_ECS_REG, val); in npe_reset()
349 if (npe_logical_reg_write8(npe, NPE_STEVT, 0x80, i)) in npe_reset()
351 if (npe_logical_reg_write16(npe, NPE_STARTPC, 0, i)) in npe_reset()
355 if (npe_logical_reg_write16(npe, NPE_REGMAP, 0x820, i)) in npe_reset()
357 if (npe_logical_reg_write8(npe, NPE_CINDEX, 0, i)) in npe_reset()
363 npe_cmd_write(npe, ECS_DBG_CTXT_REG_0, CMD_WR_ECS_REG, 0); in npe_reset()
365 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); in npe_reset()
367 __raw_writel(exec_count, &npe->regs->exec_count); in npe_reset()
368 npe_cmd_write(npe, ECS_DBG_CTXT_REG_2, CMD_WR_ECS_REG, ctx_reg2); in npe_reset()
372 npe_cmd_write(npe, ecs_reset[val].reg, CMD_WR_ECS_REG, in npe_reset()
376 __raw_writel(CMD_CLR_PROFILE_CNT, &npe->regs->exec_status_cmd); in npe_reset()
378 __raw_writel(0, &npe->regs->exec_count); in npe_reset()
379 __raw_writel(0, &npe->regs->action_points[0]); in npe_reset()
380 __raw_writel(0, &npe->regs->action_points[1]); in npe_reset()
381 __raw_writel(0, &npe->regs->action_points[2]); in npe_reset()
382 __raw_writel(0, &npe->regs->action_points[3]); in npe_reset()
383 __raw_writel(0, &npe->regs->watch_count); in npe_reset()
389 val = cpu_ixp4xx_features(npe->rmap); in npe_reset()
390 /* reset the NPE */ in npe_reset()
391 regmap_write(npe->rmap, IXP4XX_EXP_CNFG2, val & ~reset_bit); in npe_reset()
393 regmap_write(npe->rmap, IXP4XX_EXP_CNFG2, val | reset_bit); in npe_reset()
396 val = cpu_ixp4xx_features(npe->rmap); in npe_reset()
398 break; /* NPE is back alive */ in npe_reset()
404 npe_stop(npe); in npe_reset()
406 /* restore NPE configuration bus Control Register - parity settings */ in npe_reset()
407 __raw_writel(ctl, &npe->regs->messaging_control); in npe_reset()
412 int npe_send_message(struct npe *npe, const void *msg, const char *what) in npe_send_message() argument
417 debug_msg(npe, "Trying to send message %s [%08X:%08X]\n", in npe_send_message()
420 if (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE) { in npe_send_message()
421 debug_msg(npe, "NPE input FIFO not empty\n"); in npe_send_message()
425 __raw_writel(send[0], &npe->regs->in_out_fifo); in npe_send_message()
427 if (!(__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNF)) { in npe_send_message()
428 debug_msg(npe, "NPE input FIFO full\n"); in npe_send_message()
432 __raw_writel(send[1], &npe->regs->in_out_fifo); in npe_send_message()
435 (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE)) { in npe_send_message()
441 debug_msg(npe, "Timeout sending message\n"); in npe_send_message()
446 debug_msg(npe, "Sending a message took %i cycles\n", cycles); in npe_send_message()
451 int npe_recv_message(struct npe *npe, void *msg, const char *what) in npe_recv_message() argument
456 debug_msg(npe, "Trying to receive message %s\n", what); in npe_recv_message()
459 if (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_OFNE) { in npe_recv_message()
460 recv[cnt++] = __raw_readl(&npe->regs->in_out_fifo); in npe_recv_message()
471 debug_msg(npe, "Received [%08X]\n", recv[0]); in npe_recv_message()
474 debug_msg(npe, "Received [%08X:%08X]\n", recv[0], recv[1]); in npe_recv_message()
479 debug_msg(npe, "Timeout waiting for message\n"); in npe_recv_message()
484 debug_msg(npe, "Receiving a message took %i cycles\n", cycles); in npe_recv_message()
489 int npe_send_recv_message(struct npe *npe, void *msg, const char *what) in npe_send_recv_message() argument
494 if ((result = npe_send_message(npe, msg, what)) != 0) in npe_send_recv_message()
496 if ((result = npe_recv_message(npe, recv, what)) != 0) in npe_send_recv_message()
500 debug_msg(npe, "Message %s: unexpected message received\n", in npe_send_recv_message()
508 int npe_load_firmware(struct npe *npe, const char *name, struct device *dev) in npe_load_firmware() argument
541 print_npe(KERN_ERR, npe, "incomplete firmware file\n"); in npe_load_firmware()
547 print_npe(KERN_DEBUG, npe, "firmware: %08X %08X %08X (0x%X bytes)\n", in npe_load_firmware()
555 print_npe(KERN_ERR, npe, "bad firmware file magic: 0x%X\n", in npe_load_firmware()
560 print_npe(KERN_ERR, npe, in npe_load_firmware()
564 if (((image->id >> 24) & 0xF /* NPE ID */) != npe->id) { in npe_load_firmware()
565 print_npe(KERN_ERR, npe, "firmware file NPE ID mismatch\n"); in npe_load_firmware()
573 print_npe(KERN_INFO, npe, "IXP43x/IXP46x firmware ignored on " in npe_load_firmware()
578 if (npe_running(npe)) { in npe_load_firmware()
579 print_npe(KERN_INFO, npe, "unable to load firmware, NPE is " in npe_load_firmware()
585 npe_stop(npe); in npe_load_firmware()
586 npe_reset(npe); in npe_load_firmware()
589 print_npe(KERN_INFO, npe, "firmware functionality 0x%X, " in npe_load_firmware()
594 if (!npe->id) in npe_load_firmware()
609 print_npe(KERN_INFO, npe, "firmware EOF block marker not " in npe_load_firmware()
615 print_npe(KERN_DEBUG, npe, "%i firmware blocks found\n", blocks); in npe_load_firmware()
622 print_npe(KERN_INFO, npe, "invalid offset 0x%X of " in npe_load_firmware()
637 print_npe(KERN_INFO, npe, "invalid firmware block #%i " in npe_load_firmware()
642 print_npe(KERN_INFO, npe, "firmware block #%i doesn't " in npe_load_firmware()
651 npe_cmd_write(npe, cb->npe_addr + j, cmd, cb->data[j]); in npe_load_firmware()
654 npe_start(npe); in npe_load_firmware()
655 if (!npe_running(npe)) in npe_load_firmware()
656 print_npe(KERN_ERR, npe, "unable to start\n"); in npe_load_firmware()
661 print_npe(KERN_INFO, npe, "firmware block #%i doesn't fit in NPE " in npe_load_firmware()
671 struct npe *npe_request(unsigned id) in npe_request()
680 void npe_release(struct npe *npe) in npe_release() argument
701 struct npe *npe = &npe_tab[i]; in ixp4xx_npe_probe() local
710 dev_info(dev, "NPE%d at %pR not available\n", in ixp4xx_npe_probe()
712 continue; /* NPE already disabled or not present */ in ixp4xx_npe_probe()
714 npe->regs = devm_ioremap_resource(dev, res); in ixp4xx_npe_probe()
715 if (IS_ERR(npe->regs)) in ixp4xx_npe_probe()
716 return PTR_ERR(npe->regs); in ixp4xx_npe_probe()
717 npe->rmap = rmap; in ixp4xx_npe_probe()
719 if (npe_reset(npe)) { in ixp4xx_npe_probe()
720 dev_info(dev, "NPE%d at %pR does not reset\n", in ixp4xx_npe_probe()
724 npe->valid = 1; in ixp4xx_npe_probe()
725 dev_info(dev, "NPE%d at %pR registered\n", i, res); in ixp4xx_npe_probe()
758 .name = "ixp4xx-npe",