284 static inline void qm_ccsr_out(u32 offset, u32 val)  in qm_ccsr_out()  function
304 		qm_ccsr_out(REG_DCP_CFG(portal),  in qm_set_dc()
307 		qm_ccsr_out(REG_DCP_CFG(portal),  in qm_set_dc()
315 	qm_ccsr_out(REG_WQ_CS_CFG(wq_class), ((cs_elev & 0xff) << 24) |  in qm_set_wq_scheduling()
323 	qm_ccsr_out(REG_HID_CFG, 0);  in qm_set_hid()
328 	qm_ccsr_out(REG_CI_SCHED_CFG, QM_CI_SCHED_CFG_SRCCIV_EN |  in qm_set_corenet_initiator()
389 	qm_ccsr_out(offset, upper_32_bits(ba));  in qm_set_memory()
390 	qm_ccsr_out(offset + REG_offset_BAR, lower_32_bits(ba));  in qm_set_memory()
391 	qm_ccsr_out(offset + REG_offset_AR, PFDR_AR_EN | (exp - 1));  in qm_set_memory()
397 	qm_ccsr_out(REG_PFDR_FP_LWIT, th & 0xffffff);  in qm_set_pfdr_threshold()
398 	qm_ccsr_out(REG_PFDR_CFG, k);  in qm_set_pfdr_threshold()
403 	qm_ccsr_out(REG_SFDR_CFG, th & 0x3ff);  in qm_set_sfdr_threshold()
418 	qm_ccsr_out(REG_MCP(0), pfdr_start);  in qm_init_pfdr()
424 	qm_ccsr_out(REG_MCP(1), pfdr_start + num - 16);  in qm_init_pfdr()
426 	qm_ccsr_out(REG_MCR, MCR_INIT_PFDR);  in qm_init_pfdr()
569 				qm_ccsr_out(REG_ECSR, ecsr_val);  in qman_isr()
575 				qm_ccsr_out(REG_ERR_IER, ier_val);  in qman_isr()
579 	qm_ccsr_out(REG_ERR_ISR, isr_val);  in qman_isr()
606 	qm_ccsr_out(REG_ERR_ISR, QM_EIRQ_PEBI);  in qman_init_ccsr()
639 		qm_ccsr_out(REG_REV3_QCSP_LIO_CFG(idx), after);  in __qman_liodn_fixup()
641 		qm_ccsr_out(REG_QCSP_LIO_CFG(idx), after);  in __qman_liodn_fixup()
655 		qm_ccsr_out(REG_REV3_QCSP_IO_CFG(idx), after);  in qman_set_sdest()
659 		qm_ccsr_out(REG_QCSP_IO_CFG(idx), after);  in qman_set_sdest()
830 	qm_ccsr_out(REG_ERR_ISR, 0xffffffff);  in fsl_qman_probe()
832 	qm_ccsr_out(REG_ERR_IER, 0xffffffff);  in fsl_qman_probe()