soc/atmel/soc.c

130 		 "sama5d21", "sama5d2"),
133 		 "sama5d22", "sama5d2"),
136 		 "sama5d225c 16MiB SiP", "sama5d2"),
139 		 "sama5d23", "sama5d2"),
142 		 "sama5d24", "sama5d2"),
145 		 "sama5d24", "sama5d2"),
148 		 "sama5d26", "sama5d2"),
151 		 "sama5d27", "sama5d2"),
154 		 "sama5d27", "sama5d2"),
157 		 "sama5d27c 128MiB SiP", "sama5d2"),
160 		 "sama5d27c 64MiB SiP", "sama5d2"),
163 		 "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
166 		 "sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
169 		 "sama5d28", "sama5d2"),
172 		 "sama5d28", "sama5d2"),
175 		 "sama5d28c 128MiB SiP", "sama5d2"),
178 		 "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
181 		 "sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
184 		 "sama5d29", "sama5d2"),
307 		{ .compatible = "atmel,sama5d2-chipid" },  in at91_get_cidr_exid_from_chipid()
341 	 * With SAMA5D2 and later SoCs, CIDR and EXID registers are no more  in at91_soc_init()