Lines Matching +full:xdma +full:- +full:host +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2013 QLogic Corporation
14 #include <linux/io-64-nonatomic-lo-hi.h>
40 if ((off < ha->first_page_group_end) && in qla4_8xxx_pci_base_offsetfset()
41 (off >= ha->first_page_group_start)) in qla4_8xxx_pci_base_offsetfset()
42 return (void __iomem *)(ha->nx_pcibase + off); in qla4_8xxx_pci_base_offsetfset()
59 qla4_8xxx_crb_addr_transform(XDMA); in qla4_82xx_crb_addr_transform_setup()
133 {{{0, 0, 0, 0} } }, /* 3: */
206 {{{0, 0x1000000, 0x1004000, 0x1a8000} } },/* 16: XDMA */
254 {{{0, 0x3100000, 0x3104000, 0x1a8000} } },/* 49: XDMA */
363 ha->crb_win = CRB_HI(*off); in qla4_82xx_pci_set_crbwindow_2M()
364 writel(ha->crb_win, in qla4_82xx_pci_set_crbwindow_2M()
365 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
369 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
370 if (win_read != ha->crb_win) { in qla4_82xx_pci_set_crbwindow_2M()
373 " off=0x%lx\n", __func__, ha->crb_win, win_read, *off)); in qla4_82xx_pci_set_crbwindow_2M()
375 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla4_82xx_pci_set_crbwindow_2M()
393 return -1; in qla4_82xx_crb_win_lock()
398 qla4_82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->func_num); in qla4_82xx_crb_win_lock()
415 BUG_ON(rv == -1); in qla4_82xx_wr_32()
418 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_wr_32()
427 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_wr_32()
439 BUG_ON(rv == -1); in qla4_82xx_rd_32()
442 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_rd_32()
450 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_rd_32()
462 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
468 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
477 ha->nx_pcibase)); in qla4_82xx_md_rd_32()
488 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
493 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
502 ha->nx_pcibase)); in qla4_82xx_md_wr_32()
510 * qla4_82xx_idc_lock - hw_lock
530 return -1; in qla4_82xx_idc_lock()
549 return -1; in qla4_82xx_pci_get_crb_addr_2M()
552 *off = (*off - QLA82XX_PCI_CAMQM) + in qla4_82xx_pci_get_crb_addr_2M()
553 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla4_82xx_pci_get_crb_addr_2M()
558 return -1; in qla4_82xx_pci_get_crb_addr_2M()
560 *off -= QLA82XX_PCI_CRBSPACE; in qla4_82xx_pci_get_crb_addr_2M()
567 if (m->valid && (m->start_128M <= *off) && (m->end_128M > *off)) { in qla4_82xx_pci_get_crb_addr_2M()
568 *off = *off + m->start_2M - m->start_128M + ha->nx_pcibase; in qla4_82xx_pci_get_crb_addr_2M()
588 !QLA8XXX_ADDR_IN_RANGE(addr + size - 1, in qla4_82xx_pci_mem_bound_check()
608 ha->ddr_mn_window = window; in qla4_82xx_pci_set_window()
609 qla4_82xx_wr_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
611 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
625 addr = -1UL; in qla4_82xx_pci_set_window()
629 ha->ddr_mn_window = window; in qla4_82xx_pci_set_window()
630 qla4_82xx_wr_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
632 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
646 ha->qdr_sn_window = window; in qla4_82xx_pci_set_window()
647 qla4_82xx_wr_32(ha, ha->ms_win_crb | in qla4_82xx_pci_set_window()
650 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla4_82xx_pci_set_window()
667 addr = -1UL; in qla4_82xx_pci_set_window()
694 window = ((addr - QLA8XXX_ADDR_QDR_NET) >> 22) & 0x3f; in qla4_82xx_pci_is_same_window()
695 if (ha->qdr_sn_window == window) in qla4_82xx_pci_is_same_window()
713 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
720 if ((start == -1UL) || in qla4_82xx_pci_mem_read_direct()
721 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla4_82xx_pci_mem_read_direct()
722 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
725 return -1; in qla4_82xx_pci_mem_read_direct()
730 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
731 mem_base = pci_resource_start(ha->pdev, 0); in qla4_82xx_pci_mem_read_direct()
736 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla4_82xx_pci_mem_read_direct()
743 return -1; in qla4_82xx_pci_mem_read_direct()
746 addr += start & (PAGE_SIZE - 1); in qla4_82xx_pci_mem_read_direct()
747 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
764 ret = -1; in qla4_82xx_pci_mem_read_direct()
767 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
786 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
793 if ((start == -1UL) || in qla4_82xx_pci_mem_write_direct()
794 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla4_82xx_pci_mem_write_direct()
795 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
798 return -1; in qla4_82xx_pci_mem_write_direct()
803 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
804 mem_base = pci_resource_start(ha->pdev, 0); in qla4_82xx_pci_mem_write_direct()
809 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla4_82xx_pci_mem_write_direct()
814 return -1; in qla4_82xx_pci_mem_write_direct()
817 addr += start & (PAGE_SIZE - 1); in qla4_82xx_pci_mem_write_direct()
818 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
835 ret = -1; in qla4_82xx_pci_mem_write_direct()
838 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
890 return -1; in qla4_82xx_rom_lock()
918 return -1; in qla4_82xx_wait_rom_done()
929 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla4_82xx_do_rom_fast_read()
933 return -1; in qla4_82xx_do_rom_fast_read()
956 return -1; in qla4_82xx_rom_fast_read()
1029 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) in qla4_82xx_pinit_from_rom()
1046 return -1; in qla4_82xx_pinit_from_rom()
1060 return -1; in qla4_82xx_pinit_from_rom()
1070 return -1; in qla4_82xx_pinit_from_rom()
1078 return -1; in qla4_82xx_pinit_from_rom()
1169 * qla4_8xxx_ms_mem_write_128b - Writes data to MS/off-chip memory
1186 /* Only 128-bit aligned access */ in qla4_8xxx_ms_mem_write_128b()
1192 write_lock_irqsave(&ha->hw_lock, flags); in qla4_8xxx_ms_mem_write_128b()
1195 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, 0); in qla4_8xxx_ms_mem_write_128b()
1211 ret_val = ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1215 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1218 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1221 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1224 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1234 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, in qla4_8xxx_ms_mem_write_128b()
1236 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1246 ret_val = ha->isp_ops->rd_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1268 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_8xxx_ms_mem_write_128b()
1283 flashaddr = memaddr = ha->hw.flt_region_bootload; in qla4_82xx_load_from_flash()
1284 size = (image_start - flashaddr) / 8; in qla4_82xx_load_from_flash()
1287 ha->host_no, __func__, flashaddr, image_start)); in qla4_82xx_load_from_flash()
1293 rval = -1; in qla4_82xx_load_from_flash()
1311 read_lock(&ha->hw_lock); in qla4_82xx_load_from_flash()
1314 read_unlock(&ha->hw_lock); in qla4_82xx_load_from_flash()
1376 sz[0] = (size < (16 - off0[0])) ? size : (16 - off0[0]); in qla4_82xx_pci_mem_read_2M()
1379 loop = ((off0[0] + size - 1) >> shift_amount) + 1; in qla4_82xx_pci_mem_read_2M()
1381 sz[1] = size - sz[0]; in qla4_82xx_pci_mem_read_2M()
1407 end = (off0[i] + sz[i] - 1) >> 2; in qla4_82xx_pci_mem_read_2M()
1416 return -1; in qla4_82xx_pci_mem_read_2M()
1464 sz[0] = (size < (8 - off0)) ? size : (8 - off0); in qla4_82xx_pci_mem_write_2M()
1465 sz[1] = size - sz[0]; in qla4_82xx_pci_mem_write_2M()
1468 loop = (((off & 0xf) + size - 1) >> 4) + 1; in qla4_82xx_pci_mem_write_2M()
1476 return -1; in qla4_82xx_pci_mem_write_2M()
1540 ret = -1; in qla4_82xx_pci_mem_write_2M()
1562 } while (--retries); in qla4_82xx_cmdpeg_ready()
1569 return -1; in qla4_82xx_cmdpeg_ready()
1581 read_lock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1583 read_unlock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1588 read_lock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1590 read_unlock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1617 drv_active |= (1 << ha->func_num); in qla4_8xxx_set_drv_active()
1619 drv_active |= (1 << (ha->func_num * 4)); in qla4_8xxx_set_drv_active()
1622 __func__, ha->host_no, drv_active); in qla4_8xxx_set_drv_active()
1639 drv_active &= ~(1 << (ha->func_num)); in qla4_8xxx_clear_drv_active()
1641 drv_active &= ~(1 << (ha->func_num * 4)); in qla4_8xxx_clear_drv_active()
1644 __func__, ha->host_no, drv_active); in qla4_8xxx_clear_drv_active()
1662 rval = drv_state & (1 << ha->func_num); in qla4_8xxx_need_reset()
1664 rval = drv_state & (1 << (ha->func_num * 4)); in qla4_8xxx_need_reset()
1666 if ((test_bit(AF_EEH_BUSY, &ha->flags)) && drv_active) in qla4_8xxx_need_reset()
1684 drv_state |= (1 << ha->func_num); in qla4_8xxx_set_rst_ready()
1686 drv_state |= (1 << (ha->func_num * 4)); in qla4_8xxx_set_rst_ready()
1689 __func__, ha->host_no, drv_state); in qla4_8xxx_set_rst_ready()
1705 drv_state &= ~(1 << ha->func_num); in qla4_8xxx_clear_rst_ready()
1707 drv_state &= ~(1 << (ha->func_num * 4)); in qla4_8xxx_clear_rst_ready()
1710 __func__, ha->host_no, drv_state); in qla4_8xxx_clear_rst_ready()
1727 qsnt_state |= (1 << ha->func_num); in qla4_8xxx_set_qsnt_ready()
1729 qsnt_state |= (2 << (ha->func_num * 4)); in qla4_8xxx_set_qsnt_ready()
1761 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla4_82xx_start_firmware()
1762 ha->link_width = (lnk >> 4) & 0x3f; in qla4_82xx_start_firmware()
1786 rval = qla4_82xx_start_firmware(ha, ha->hw.flt_region_fw); in qla4_82xx_try_start_fw()
1801 dev_info(&ha->pdev->dev, "Resetting rom_lock\n"); in qla4_82xx_rom_lock_recovery()
1821 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in ql4_84xx_poll_wait_for_ready()
1847 ha->isp_ops->wr_reg_indirect(ha, addr1, temp); in ql4_84xx_ipmdio_rd_reg()
1853 ha->isp_ops->rd_reg_indirect(ha, addr3, &data); in ql4_84xx_ipmdio_rd_reg()
1896 ha->isp_ops->wr_reg_indirect(ha, addr3, value); in ql4_84xx_ipmdio_wr_reg()
1897 ha->isp_ops->wr_reg_indirect(ha, addr1, addr); in ql4_84xx_ipmdio_wr_reg()
1917 r_addr = crb_hdr->addr; in qla4_8xxx_minidump_process_rdcrb()
1918 r_stride = crb_hdr->crb_strd.addr_stride; in qla4_8xxx_minidump_process_rdcrb()
1919 loop_cnt = crb_hdr->op_count; in qla4_8xxx_minidump_process_rdcrb()
1922 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_rdcrb()
1938 ha->fw_dump_tmplt_hdr; in qla4_83xx_check_dma_engine_state()
1940 tmplt_hdr->saved_state_array[QLA83XX_PEX_DMA_ENGINE_INDEX]; in qla4_83xx_check_dma_engine_state()
1944 /* Read the pex-dma's command-status-and-control register. */ in qla4_83xx_check_dma_engine_state()
1945 rval = ha->isp_ops->rd_reg_indirect(ha, in qla4_83xx_check_dma_engine_state()
1952 /* Check if requested pex-dma engine is available. */ in qla4_83xx_check_dma_engine_state()
1968 ha->fw_dump_tmplt_hdr; in qla4_83xx_start_pex_dma()
1970 tmplt_hdr->saved_state_array[QLA83XX_PEX_DMA_ENGINE_INDEX]; in qla4_83xx_start_pex_dma()
1974 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1976 m_hdr->desc_card_addr); in qla4_83xx_start_pex_dma()
1980 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1985 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1987 m_hdr->start_dma_cmd); in qla4_83xx_start_pex_dma()
1993 rval = ha->isp_ops->rd_reg_indirect(ha, in qla4_83xx_start_pex_dma()
2032 "%s: DMA engine not available. Fallback to rdmem-read.\n", in qla4_8xxx_minidump_pex_dma_read()
2038 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, in qla4_8xxx_minidump_pex_dma_read()
2048 /* Prepare pex-dma descriptor to be written to MS memory. */ in qla4_8xxx_minidump_pex_dma_read()
2049 /* dma-desc-cmd layout: in qla4_8xxx_minidump_pex_dma_read()
2050 * 0-3: dma-desc-cmd 0-3 in qla4_8xxx_minidump_pex_dma_read()
2051 * 4-7: pcid function number in qla4_8xxx_minidump_pex_dma_read()
2052 * 8-15: dma-desc-cmd 8-15 in qla4_8xxx_minidump_pex_dma_read()
2054 dma_desc.cmd.dma_desc_cmd = (m_hdr->dma_desc_cmd & 0xff0f); in qla4_8xxx_minidump_pex_dma_read()
2055 dma_desc.cmd.dma_desc_cmd |= ((PCI_FUNC(ha->pdev->devfn) & 0xf) << 0x4); in qla4_8xxx_minidump_pex_dma_read()
2061 * Perform rdmem operation using pex-dma. in qla4_8xxx_minidump_pex_dma_read()
2064 while (read_size < m_hdr->read_data_size) { in qla4_8xxx_minidump_pex_dma_read()
2065 if (m_hdr->read_data_size - read_size >= in qla4_8xxx_minidump_pex_dma_read()
2069 size = (m_hdr->read_data_size - read_size); in qla4_8xxx_minidump_pex_dma_read()
2072 dma_free_coherent(&ha->pdev->dev, in qla4_8xxx_minidump_pex_dma_read()
2076 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, size, in qla4_8xxx_minidump_pex_dma_read()
2088 dma_desc.src_addr = m_hdr->read_addr + read_size; in qla4_8xxx_minidump_pex_dma_read()
2091 /* Prepare: Write pex-dma descriptor to MS memory. */ in qla4_8xxx_minidump_pex_dma_read()
2093 (uint64_t)m_hdr->desc_card_addr, in qla4_8xxx_minidump_pex_dma_read()
2098 "%s: Error writing rdmem-dma-init to MS !!!\n", in qla4_8xxx_minidump_pex_dma_read()
2104 "%s: Dma-desc: Instruct for rdmem dma (size 0x%x).\n", in qla4_8xxx_minidump_pex_dma_read()
2106 /* Execute: Start pex-dma operation. */ in qla4_8xxx_minidump_pex_dma_read()
2110 "scsi(%ld): start-pex-dma failed rval=0x%x\n", in qla4_8xxx_minidump_pex_dma_read()
2111 ha->host_no, rval)); in qla4_8xxx_minidump_pex_dma_read()
2126 dma_free_coherent(&ha->pdev->dev, size, rdmem_buffer, in qla4_8xxx_minidump_pex_dma_read()
2147 loop_count = cache_hdr->op_count; in qla4_8xxx_minidump_process_l2tag()
2148 r_addr = cache_hdr->read_addr; in qla4_8xxx_minidump_process_l2tag()
2149 c_addr = cache_hdr->control_addr; in qla4_8xxx_minidump_process_l2tag()
2150 c_value_w = cache_hdr->cache_ctrl.write_value; in qla4_8xxx_minidump_process_l2tag()
2152 t_r_addr = cache_hdr->tag_reg_addr; in qla4_8xxx_minidump_process_l2tag()
2153 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla4_8xxx_minidump_process_l2tag()
2154 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla4_8xxx_minidump_process_l2tag()
2155 p_wait = cache_hdr->cache_ctrl.poll_wait; in qla4_8xxx_minidump_process_l2tag()
2156 p_mask = cache_hdr->cache_ctrl.poll_mask; in qla4_8xxx_minidump_process_l2tag()
2159 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); in qla4_8xxx_minidump_process_l2tag()
2162 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); in qla4_8xxx_minidump_process_l2tag()
2167 ha->isp_ops->rd_reg_indirect(ha, c_addr, in qla4_8xxx_minidump_process_l2tag()
2180 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); in qla4_8xxx_minidump_process_l2tag()
2182 addr += cache_hdr->read_ctrl.read_addr_stride; in qla4_8xxx_minidump_process_l2tag()
2185 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla4_8xxx_minidump_process_l2tag()
2203 ha->fw_dump_tmplt_hdr; in qla4_8xxx_minidump_process_control()
2206 crb_addr = crb_entry->addr; in qla4_8xxx_minidump_process_control()
2207 for (i = 0; i < crb_entry->op_count; i++) { in qla4_8xxx_minidump_process_control()
2208 opcode = crb_entry->crb_ctrl.opcode; in qla4_8xxx_minidump_process_control()
2210 ha->isp_ops->wr_reg_indirect(ha, crb_addr, in qla4_8xxx_minidump_process_control()
2211 crb_entry->value_1); in qla4_8xxx_minidump_process_control()
2215 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2216 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2220 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2221 read_value &= crb_entry->value_2; in qla4_8xxx_minidump_process_control()
2224 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2227 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2230 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2231 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2232 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2236 poll_time = crb_entry->crb_strd.poll_timeout; in qla4_8xxx_minidump_process_control()
2238 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2241 if ((read_value & crb_entry->value_2) == in qla4_8xxx_minidump_process_control()
2242 crb_entry->value_1) { in qla4_8xxx_minidump_process_control()
2249 ha->isp_ops->rd_reg_indirect(ha, in qla4_8xxx_minidump_process_control()
2257 if (crb_entry->crb_strd.state_index_a) { in qla4_8xxx_minidump_process_control()
2258 index = crb_entry->crb_strd.state_index_a; in qla4_8xxx_minidump_process_control()
2259 addr = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2264 ha->isp_ops->rd_reg_indirect(ha, addr, &read_value); in qla4_8xxx_minidump_process_control()
2265 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2266 tmplt_hdr->saved_state_array[index] = read_value; in qla4_8xxx_minidump_process_control()
2271 if (crb_entry->crb_strd.state_index_a) { in qla4_8xxx_minidump_process_control()
2272 index = crb_entry->crb_strd.state_index_a; in qla4_8xxx_minidump_process_control()
2273 addr = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2278 if (crb_entry->crb_ctrl.state_index_v) { in qla4_8xxx_minidump_process_control()
2279 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2281 tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2283 read_value = crb_entry->value_1; in qla4_8xxx_minidump_process_control()
2286 ha->isp_ops->wr_reg_indirect(ha, addr, read_value); in qla4_8xxx_minidump_process_control()
2291 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2292 read_value = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2293 read_value <<= crb_entry->crb_ctrl.shl; in qla4_8xxx_minidump_process_control()
2294 read_value >>= crb_entry->crb_ctrl.shr; in qla4_8xxx_minidump_process_control()
2295 if (crb_entry->value_2) in qla4_8xxx_minidump_process_control()
2296 read_value &= crb_entry->value_2; in qla4_8xxx_minidump_process_control()
2297 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2298 read_value += crb_entry->value_1; in qla4_8xxx_minidump_process_control()
2299 tmplt_hdr->saved_state_array[index] = read_value; in qla4_8xxx_minidump_process_control()
2302 crb_addr += crb_entry->crb_strd.addr_stride; in qla4_8xxx_minidump_process_control()
2318 r_addr = ocm_hdr->read_addr; in qla4_8xxx_minidump_process_rdocm()
2319 r_stride = ocm_hdr->read_addr_stride; in qla4_8xxx_minidump_process_rdocm()
2320 loop_cnt = ocm_hdr->op_count; in qla4_8xxx_minidump_process_rdocm()
2327 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); in qla4_8xxx_minidump_process_rdocm()
2346 r_addr = mux_hdr->read_addr; in qla4_8xxx_minidump_process_rdmux()
2347 s_addr = mux_hdr->select_addr; in qla4_8xxx_minidump_process_rdmux()
2348 s_stride = mux_hdr->select_value_stride; in qla4_8xxx_minidump_process_rdmux()
2349 s_value = mux_hdr->select_value; in qla4_8xxx_minidump_process_rdmux()
2350 loop_cnt = mux_hdr->op_count; in qla4_8xxx_minidump_process_rdmux()
2353 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); in qla4_8xxx_minidump_process_rdmux()
2354 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_rdmux()
2373 loop_count = cache_hdr->op_count; in qla4_8xxx_minidump_process_l1cache()
2374 r_addr = cache_hdr->read_addr; in qla4_8xxx_minidump_process_l1cache()
2375 c_addr = cache_hdr->control_addr; in qla4_8xxx_minidump_process_l1cache()
2376 c_value_w = cache_hdr->cache_ctrl.write_value; in qla4_8xxx_minidump_process_l1cache()
2378 t_r_addr = cache_hdr->tag_reg_addr; in qla4_8xxx_minidump_process_l1cache()
2379 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla4_8xxx_minidump_process_l1cache()
2380 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla4_8xxx_minidump_process_l1cache()
2383 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); in qla4_8xxx_minidump_process_l1cache()
2384 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); in qla4_8xxx_minidump_process_l1cache()
2387 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); in qla4_8xxx_minidump_process_l1cache()
2389 addr += cache_hdr->read_ctrl.read_addr_stride; in qla4_8xxx_minidump_process_l1cache()
2391 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla4_8xxx_minidump_process_l1cache()
2408 s_addr = q_hdr->select_addr; in qla4_8xxx_minidump_process_queue()
2409 r_cnt = q_hdr->rd_strd.read_addr_cnt; in qla4_8xxx_minidump_process_queue()
2410 r_stride = q_hdr->rd_strd.read_addr_stride; in qla4_8xxx_minidump_process_queue()
2411 loop_cnt = q_hdr->op_count; in qla4_8xxx_minidump_process_queue()
2414 ha->isp_ops->wr_reg_indirect(ha, s_addr, qid); in qla4_8xxx_minidump_process_queue()
2415 r_addr = q_hdr->read_addr; in qla4_8xxx_minidump_process_queue()
2417 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_queue()
2421 qid += q_hdr->q_strd.queue_id_stride; in qla4_8xxx_minidump_process_queue()
2440 r_addr = rom_hdr->read_addr; in qla4_82xx_minidump_process_rdrom()
2441 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t); in qla4_82xx_minidump_process_rdrom()
2448 ha->isp_ops->wr_reg_indirect(ha, MD_DIRECT_ROM_WINDOW, in qla4_82xx_minidump_process_rdrom()
2450 ha->isp_ops->rd_reg_indirect(ha, in qla4_82xx_minidump_process_rdrom()
2475 r_addr = m_hdr->read_addr; in __qla4_8xxx_minidump_process_rdmem()
2476 loop_cnt = m_hdr->read_data_size/16; in __qla4_8xxx_minidump_process_rdmem()
2480 __func__, r_addr, m_hdr->read_data_size)); in __qla4_8xxx_minidump_process_rdmem()
2489 if (m_hdr->read_data_size % 16) { in __qla4_8xxx_minidump_process_rdmem()
2492 __func__, m_hdr->read_data_size)); in __qla4_8xxx_minidump_process_rdmem()
2498 __func__, r_addr, m_hdr->read_data_size, loop_cnt)); in __qla4_8xxx_minidump_process_rdmem()
2500 write_lock_irqsave(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2502 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_LO, in __qla4_8xxx_minidump_process_rdmem()
2505 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, in __qla4_8xxx_minidump_process_rdmem()
2508 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); in __qla4_8xxx_minidump_process_rdmem()
2510 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); in __qla4_8xxx_minidump_process_rdmem()
2513 ha->isp_ops->rd_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, in __qla4_8xxx_minidump_process_rdmem()
2523 write_unlock_irqrestore(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2528 ha->isp_ops->rd_reg_indirect(ha, in __qla4_8xxx_minidump_process_rdmem()
2536 write_unlock_irqrestore(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2564 entry_hdr->d_ctrl.driver_flags |= QLA8XXX_DBG_SKIPPED_FLAG; in qla4_8xxx_mark_entry_skipped()
2566 "scsi(%ld): Skipping entry[%d]: ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla4_8xxx_mark_entry_skipped()
2567 ha->host_no, index, entry_hdr->entry_type, in qla4_8xxx_mark_entry_skipped()
2568 entry_hdr->d_ctrl.entry_capture_mask)); in qla4_8xxx_mark_entry_skipped()
2573 ha->fw_dump_skip_size += entry_hdr->entry_capture_size; in qla4_8xxx_mark_entry_skipped()
2588 s_addr = le32_to_cpu(pollrd_hdr->select_addr); in qla83xx_minidump_process_pollrd()
2589 r_addr = le32_to_cpu(pollrd_hdr->read_addr); in qla83xx_minidump_process_pollrd()
2590 s_value = le32_to_cpu(pollrd_hdr->select_value); in qla83xx_minidump_process_pollrd()
2591 s_stride = le32_to_cpu(pollrd_hdr->select_value_stride); in qla83xx_minidump_process_pollrd()
2593 poll_wait = le32_to_cpu(pollrd_hdr->poll_wait); in qla83xx_minidump_process_pollrd()
2594 poll_mask = le32_to_cpu(pollrd_hdr->poll_mask); in qla83xx_minidump_process_pollrd()
2596 for (i = 0; i < le32_to_cpu(pollrd_hdr->op_count); i++) { in qla83xx_minidump_process_pollrd()
2597 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); in qla83xx_minidump_process_pollrd()
2598 poll_wait = le32_to_cpu(pollrd_hdr->poll_wait); in qla83xx_minidump_process_pollrd()
2600 ha->isp_ops->rd_reg_indirect(ha, s_addr, &r_value); in qla83xx_minidump_process_pollrd()
2606 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrd()
2614 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla83xx_minidump_process_pollrd()
2641 addr1 = le32_to_cpu(rddfe->addr_1); in qla4_84xx_minidump_process_rddfe()
2642 value = le32_to_cpu(rddfe->value); in qla4_84xx_minidump_process_rddfe()
2643 stride = le32_to_cpu(rddfe->stride); in qla4_84xx_minidump_process_rddfe()
2644 stride2 = le32_to_cpu(rddfe->stride2); in qla4_84xx_minidump_process_rddfe()
2645 count = le32_to_cpu(rddfe->count); in qla4_84xx_minidump_process_rddfe()
2647 poll = le32_to_cpu(rddfe->poll); in qla4_84xx_minidump_process_rddfe()
2648 mask = le32_to_cpu(rddfe->mask); in qla4_84xx_minidump_process_rddfe()
2649 modify_mask = le32_to_cpu(rddfe->modify_mask); in qla4_84xx_minidump_process_rddfe()
2654 ha->isp_ops->wr_reg_indirect(ha, addr1, (0x40000000 | value)); in qla4_84xx_minidump_process_rddfe()
2658 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2669 ha->isp_ops->rd_reg_indirect(ha, addr2, &temp); in qla4_84xx_minidump_process_rddfe()
2674 ha->isp_ops->wr_reg_indirect(ha, addr2, wrval); in qla4_84xx_minidump_process_rddfe()
2675 ha->isp_ops->wr_reg_indirect(ha, addr1, value); in qla4_84xx_minidump_process_rddfe()
2679 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2691 ha->isp_ops->wr_reg_indirect(ha, addr1, in qla4_84xx_minidump_process_rddfe()
2696 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2709 ha->isp_ops->rd_reg_indirect(ha, addr2, &data); in qla4_84xx_minidump_process_rddfe()
2735 addr1 = le32_to_cpu(rdmdio->addr_1); in qla4_84xx_minidump_process_rdmdio()
2736 addr2 = le32_to_cpu(rdmdio->addr_2); in qla4_84xx_minidump_process_rdmdio()
2737 value1 = le32_to_cpu(rdmdio->value_1); in qla4_84xx_minidump_process_rdmdio()
2738 stride1 = le32_to_cpu(rdmdio->stride_1); in qla4_84xx_minidump_process_rdmdio()
2739 stride2 = le32_to_cpu(rdmdio->stride_2); in qla4_84xx_minidump_process_rdmdio()
2740 count = le32_to_cpu(rdmdio->count); in qla4_84xx_minidump_process_rdmdio()
2742 mask = le32_to_cpu(rdmdio->mask); in qla4_84xx_minidump_process_rdmdio()
2743 value2 = le32_to_cpu(rdmdio->value_2); in qla4_84xx_minidump_process_rdmdio()
2753 addr4 = addr2 - stride1; in qla4_84xx_minidump_process_rdmdio()
2759 addr5 = addr2 - (2 * stride1); in qla4_84xx_minidump_process_rdmdio()
2765 addr6 = addr2 - (3 * stride1); in qla4_84xx_minidump_process_rdmdio()
2776 addr7 = addr2 - (4 * stride1); in qla4_84xx_minidump_process_rdmdio()
2784 stride2 = le32_to_cpu(rdmdio->stride_2); in qla4_84xx_minidump_process_rdmdio()
2806 addr1 = le32_to_cpu(pollwr_hdr->addr_1); in qla4_84xx_minidump_process_pollwr()
2807 addr2 = le32_to_cpu(pollwr_hdr->addr_2); in qla4_84xx_minidump_process_pollwr()
2808 value1 = le32_to_cpu(pollwr_hdr->value_1); in qla4_84xx_minidump_process_pollwr()
2809 value2 = le32_to_cpu(pollwr_hdr->value_2); in qla4_84xx_minidump_process_pollwr()
2811 poll = le32_to_cpu(pollwr_hdr->poll); in qla4_84xx_minidump_process_pollwr()
2814 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); in qla4_84xx_minidump_process_pollwr()
2828 ha->isp_ops->wr_reg_indirect(ha, addr2, value2); in qla4_84xx_minidump_process_pollwr()
2829 ha->isp_ops->wr_reg_indirect(ha, addr1, value1); in qla4_84xx_minidump_process_pollwr()
2833 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); in qla4_84xx_minidump_process_pollwr()
2854 sel_val1 = le32_to_cpu(rdmux2_hdr->select_value_1); in qla83xx_minidump_process_rdmux2()
2855 sel_val2 = le32_to_cpu(rdmux2_hdr->select_value_2); in qla83xx_minidump_process_rdmux2()
2856 sel_addr1 = le32_to_cpu(rdmux2_hdr->select_addr_1); in qla83xx_minidump_process_rdmux2()
2857 sel_addr2 = le32_to_cpu(rdmux2_hdr->select_addr_2); in qla83xx_minidump_process_rdmux2()
2858 sel_val_mask = le32_to_cpu(rdmux2_hdr->select_value_mask); in qla83xx_minidump_process_rdmux2()
2859 read_addr = le32_to_cpu(rdmux2_hdr->read_addr); in qla83xx_minidump_process_rdmux2()
2861 for (i = 0; i < rdmux2_hdr->op_count; i++) { in qla83xx_minidump_process_rdmux2()
2862 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val1); in qla83xx_minidump_process_rdmux2()
2866 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); in qla83xx_minidump_process_rdmux2()
2867 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); in qla83xx_minidump_process_rdmux2()
2871 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val2); in qla83xx_minidump_process_rdmux2()
2875 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); in qla83xx_minidump_process_rdmux2()
2876 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); in qla83xx_minidump_process_rdmux2()
2880 sel_val1 += rdmux2_hdr->select_value_stride; in qla83xx_minidump_process_rdmux2()
2881 sel_val2 += rdmux2_hdr->select_value_stride; in qla83xx_minidump_process_rdmux2()
2898 addr_1 = le32_to_cpu(poll_hdr->addr_1); in qla83xx_minidump_process_pollrdmwr()
2899 addr_2 = le32_to_cpu(poll_hdr->addr_2); in qla83xx_minidump_process_pollrdmwr()
2900 value_1 = le32_to_cpu(poll_hdr->value_1); in qla83xx_minidump_process_pollrdmwr()
2901 value_2 = le32_to_cpu(poll_hdr->value_2); in qla83xx_minidump_process_pollrdmwr()
2902 poll_mask = le32_to_cpu(poll_hdr->poll_mask); in qla83xx_minidump_process_pollrdmwr()
2904 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_1); in qla83xx_minidump_process_pollrdmwr()
2906 poll_wait = le32_to_cpu(poll_hdr->poll_wait); in qla83xx_minidump_process_pollrdmwr()
2908 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); in qla83xx_minidump_process_pollrdmwr()
2914 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrdmwr()
2923 ha->isp_ops->rd_reg_indirect(ha, addr_2, &data); in qla83xx_minidump_process_pollrdmwr()
2924 data &= le32_to_cpu(poll_hdr->modify_mask); in qla83xx_minidump_process_pollrdmwr()
2925 ha->isp_ops->wr_reg_indirect(ha, addr_2, data); in qla83xx_minidump_process_pollrdmwr()
2926 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_2); in qla83xx_minidump_process_pollrdmwr()
2928 poll_wait = le32_to_cpu(poll_hdr->poll_wait); in qla83xx_minidump_process_pollrdmwr()
2930 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); in qla83xx_minidump_process_pollrdmwr()
2936 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrdmwr()
2962 fl_addr = le32_to_cpu(rom_hdr->read_addr); in qla4_83xx_minidump_process_rdrom()
2963 u32_count = le32_to_cpu(rom_hdr->read_data_size)/sizeof(uint32_t); in qla4_83xx_minidump_process_rdrom()
2985 * qla4_8xxx_collect_md_data - Retrieve firmware minidump data.
2999 ha->fw_dump_skip_size = 0; in qla4_8xxx_collect_md_data()
3000 if (!ha->fw_dump) { in qla4_8xxx_collect_md_data()
3002 __func__, ha->host_no); in qla4_8xxx_collect_md_data()
3007 ha->fw_dump_tmplt_hdr; in qla4_8xxx_collect_md_data()
3008 data_ptr = (uint32_t *)((uint8_t *)ha->fw_dump + in qla4_8xxx_collect_md_data()
3009 ha->fw_dump_tmplt_size); in qla4_8xxx_collect_md_data()
3010 data_collected += ha->fw_dump_tmplt_size; in qla4_8xxx_collect_md_data()
3012 num_entry_hdr = tmplt_hdr->num_of_entries; in qla4_8xxx_collect_md_data()
3019 __func__, ha->fw_dump_capture_mask); in qla4_8xxx_collect_md_data()
3021 __func__, ha->fw_dump_size, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3026 tmplt_hdr->driver_timestamp = timestamp; in qla4_8xxx_collect_md_data()
3029 (((uint8_t *)ha->fw_dump_tmplt_hdr) + in qla4_8xxx_collect_md_data()
3030 tmplt_hdr->first_entry_offset); in qla4_8xxx_collect_md_data()
3033 tmplt_hdr->saved_state_array[QLA83XX_SS_OCM_WNDREG_INDEX] = in qla4_8xxx_collect_md_data()
3034 tmplt_hdr->ocm_window_reg[ha->func_num]; in qla4_8xxx_collect_md_data()
3036 /* Walk through the entry headers - validate/perform required action */ in qla4_8xxx_collect_md_data()
3038 if (data_collected > ha->fw_dump_size) { in qla4_8xxx_collect_md_data()
3041 data_collected, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3045 if (!(entry_hdr->d_ctrl.entry_capture_mask & in qla4_8xxx_collect_md_data()
3046 ha->fw_dump_capture_mask)) { in qla4_8xxx_collect_md_data()
3047 entry_hdr->d_ctrl.driver_flags |= in qla4_8xxx_collect_md_data()
3055 (ha->fw_dump_size - data_collected))); in qla4_8xxx_collect_md_data()
3060 switch (entry_hdr->entry_type) { in qla4_8xxx_collect_md_data()
3181 data_collected = (uint8_t *)data_ptr - (uint8_t *)ha->fw_dump; in qla4_8xxx_collect_md_data()
3186 entry_hdr->entry_size); in qla4_8xxx_collect_md_data()
3189 if ((data_collected + ha->fw_dump_skip_size) != ha->fw_dump_size) { in qla4_8xxx_collect_md_data()
3192 data_collected, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3204 * qla4_8xxx_uevent_emit - Send uevent when the firmware dump is ready.
3216 ha->host_no); in qla4_8xxx_uevent_emit()
3223 kobject_uevent_env(&(&ha->pdev->dev)->kobj, KOBJ_CHANGE, envp); in qla4_8xxx_uevent_emit()
3228 if (ql4xenablemd && test_bit(AF_FW_RECOVERY, &ha->flags) && in qla4_8xxx_get_minidump()
3229 !test_bit(AF_82XX_FW_DUMPED, &ha->flags)) { in qla4_8xxx_get_minidump()
3232 set_bit(AF_82XX_FW_DUMPED, &ha->flags); in qla4_8xxx_get_minidump()
3241 * qla4_8xxx_device_bootstrap - Initialize device, set DEV_READY, start fw
3253 need_reset = ha->isp_ops->need_reset(ha); in qla4_8xxx_device_bootstrap()
3257 if (test_bit(AF_FW_RECOVERY, &ha->flags)) in qla4_8xxx_device_bootstrap()
3258 ha->isp_ops->rom_lock_recovery(ha); in qla4_8xxx_device_bootstrap()
3270 ha->isp_ops->rom_lock_recovery(ha); in qla4_8xxx_device_bootstrap()
3278 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_bootstrap()
3283 rval = ha->isp_ops->restart_firmware(ha); in qla4_8xxx_device_bootstrap()
3284 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_bootstrap()
3302 * qla4_82xx_need_reset_handler - Code to start reset sequence
3317 if (test_and_clear_bit(AF_ONLINE, &ha->flags)) { in qla4_82xx_need_reset_handler()
3319 ha->isp_ops->disable_intrs(ha); in qla4_82xx_need_reset_handler()
3323 if (!test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { in qla4_82xx_need_reset_handler()
3326 __func__, ha->host_no)); in qla4_82xx_need_reset_handler()
3329 active_mask = (~(1 << (ha->func_num * 4))); in qla4_82xx_need_reset_handler()
3333 reset_timeout = jiffies + (ha->nx_reset_timeout * HZ); in qla4_82xx_need_reset_handler()
3340 __func__, ha->host_no, drv_state, drv_active); in qla4_82xx_need_reset_handler()
3354 if (test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { in qla4_82xx_need_reset_handler()
3357 __func__, ha->host_no, drv_state, in qla4_82xx_need_reset_handler()
3369 clear_bit(AF_8XXX_RST_OWNER, &ha->flags); in qla4_82xx_need_reset_handler()
3377 ql4_printk(KERN_INFO, ha, "HW State: COLD/RE-INIT\n"); in qla4_82xx_need_reset_handler()
3384 * qla4_8xxx_need_qsnt_handler - Code to start qsnt
3390 ha->isp_ops->idc_lock(ha); in qla4_8xxx_need_qsnt_handler()
3392 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_need_qsnt_handler()
3401 if (drv_active == (1 << (ha->func_num * 4))) { in qla4_82xx_set_idc_ver()
3424 if (drv_active == (1 << ha->func_num)) { in qla4_83xx_set_idc_ver()
3447 idc_ver &= ~(0x03 << (ha->func_num * 2)); in qla4_83xx_set_idc_ver()
3448 idc_ver |= (QLA83XX_IDC_VER_MIN_VALUE << (ha->func_num * 2)); in qla4_83xx_set_idc_ver()
3460 if (test_bit(AF_INIT_DONE, &ha->flags)) in qla4_8xxx_update_idc_reg()
3463 ha->isp_ops->idc_lock(ha); in qla4_8xxx_update_idc_reg()
3472 if ((drv_active == (1 << ha->func_num)) && !ql4xdontresethba) in qla4_8xxx_update_idc_reg()
3484 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_update_idc_reg()
3491 * qla4_8xxx_device_state_handler - Adapter state machine
3492 * @ha: pointer to host adapter structure.
3512 dev_init_timeout = jiffies + (ha->nx_dev_init_timeout * HZ); in qla4_8xxx_device_state_handler()
3514 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3540 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3542 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3558 (ha->nx_dev_init_timeout * HZ); in qla4_8xxx_device_state_handler()
3560 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3562 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3571 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3573 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3576 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3579 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3582 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3585 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3590 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3601 writel(0, &ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
3602 readl(&ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
3604 writel(0, &ha->qla4_82xx_reg->host_int); in qla4_8xxx_load_risc()
3605 readl(&ha->qla4_82xx_reg->host_int); in qla4_8xxx_load_risc()
3614 if (retval == QLA_SUCCESS && !test_bit(AF_IRQ_ATTACHED, &ha->flags)) in qla4_8xxx_load_risc()
3634 return hw->flash_conf_off | faddr; in flash_conf_addr()
3686 * FLT-location structure resides after the last PCI region. in qla4_8xxx_find_flt_start()
3706 struct ql82xx_hw_data *hw = &ha->hw; in qla4_8xxx_get_flt_info()
3708 hw->flt_region_flt = flt_addr; in qla4_8xxx_get_flt_info()
3709 wptr = (uint16_t *)ha->request_ring; in qla4_8xxx_get_flt_info()
3710 flt = (struct qla_flt_header *)ha->request_ring; in qla4_8xxx_get_flt_info()
3714 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_8xxx_get_flt_info()
3718 (uint8_t *)ha->request_ring, in qla4_8xxx_get_flt_info()
3726 if (flt->version != cpu_to_le16(1)) { in qla4_8xxx_get_flt_info()
3729 le16_to_cpu(flt->version), le16_to_cpu(flt->length), in qla4_8xxx_get_flt_info()
3730 le16_to_cpu(flt->checksum))); in qla4_8xxx_get_flt_info()
3734 cnt = (sizeof(struct qla_flt_header) + le16_to_cpu(flt->length)) >> 1; in qla4_8xxx_get_flt_info()
3735 for (chksum = 0; cnt; cnt--) in qla4_8xxx_get_flt_info()
3740 le16_to_cpu(flt->version), le16_to_cpu(flt->length), in qla4_8xxx_get_flt_info()
3746 cnt = le16_to_cpu(flt->length) / sizeof(struct qla_flt_region); in qla4_8xxx_get_flt_info()
3747 for ( ; cnt; cnt--, region++) { in qla4_8xxx_get_flt_info()
3749 start = le32_to_cpu(region->start) >> 2; in qla4_8xxx_get_flt_info()
3752 "end=0x%x size=0x%x.\n", le32_to_cpu(region->code), start, in qla4_8xxx_get_flt_info()
3753 le32_to_cpu(region->end) >> 2, le32_to_cpu(region->size))); in qla4_8xxx_get_flt_info()
3755 switch (le32_to_cpu(region->code) & 0xff) { in qla4_8xxx_get_flt_info()
3757 hw->flt_region_fdt = start; in qla4_8xxx_get_flt_info()
3760 hw->flt_region_boot = start; in qla4_8xxx_get_flt_info()
3764 hw->flt_region_fw = start; in qla4_8xxx_get_flt_info()
3767 hw->flt_region_bootload = start; in qla4_8xxx_get_flt_info()
3770 hw->flt_iscsi_param = start; in qla4_8xxx_get_flt_info()
3773 hw->flt_region_chap = start; in qla4_8xxx_get_flt_info()
3774 hw->flt_chap_size = le32_to_cpu(region->size); in qla4_8xxx_get_flt_info()
3777 hw->flt_region_ddb = start; in qla4_8xxx_get_flt_info()
3778 hw->flt_ddb_size = le32_to_cpu(region->size); in qla4_8xxx_get_flt_info()
3788 hw->flt_region_fdt = FA_FLASH_DESCR_ADDR_82; in qla4_8xxx_get_flt_info()
3789 hw->flt_region_boot = FA_BOOT_CODE_ADDR_82; in qla4_8xxx_get_flt_info()
3790 hw->flt_region_bootload = FA_BOOT_LOAD_ADDR_82; in qla4_8xxx_get_flt_info()
3791 hw->flt_region_fw = FA_RISC_CODE_ADDR_82; in qla4_8xxx_get_flt_info()
3792 hw->flt_region_chap = FA_FLASH_ISCSI_CHAP >> 2; in qla4_8xxx_get_flt_info()
3793 hw->flt_chap_size = FA_FLASH_CHAP_SIZE; in qla4_8xxx_get_flt_info()
3794 hw->flt_region_ddb = FA_FLASH_ISCSI_DDB >> 2; in qla4_8xxx_get_flt_info()
3795 hw->flt_ddb_size = FA_FLASH_DDB_SIZE; in qla4_8xxx_get_flt_info()
3800 loc, hw->flt_region_flt, hw->flt_region_fdt, in qla4_8xxx_get_flt_info()
3801 hw->flt_region_boot, hw->flt_region_bootload, in qla4_8xxx_get_flt_info()
3802 hw->flt_region_fw, hw->flt_region_chap, in qla4_8xxx_get_flt_info()
3803 hw->flt_chap_size, hw->flt_region_ddb, in qla4_8xxx_get_flt_info()
3804 hw->flt_ddb_size)); in qla4_8xxx_get_flt_info()
3819 struct ql82xx_hw_data *hw = &ha->hw; in qla4_82xx_get_fdt_info()
3821 hw->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla4_82xx_get_fdt_info()
3822 hw->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla4_82xx_get_fdt_info()
3824 wptr = (uint16_t *)ha->request_ring; in qla4_82xx_get_fdt_info()
3825 fdt = (struct qla_fdt_layout *)ha->request_ring; in qla4_82xx_get_fdt_info()
3826 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_82xx_get_fdt_info()
3827 hw->flt_region_fdt << 2, OPTROM_BURST_SIZE); in qla4_82xx_get_fdt_info()
3832 if (fdt->sig[0] != 'Q' || fdt->sig[1] != 'L' || fdt->sig[2] != 'I' || in qla4_82xx_get_fdt_info()
3833 fdt->sig[3] != 'D') in qla4_82xx_get_fdt_info()
3842 "checksum=0x%x id=%c version=0x%x.\n", chksum, fdt->sig[0], in qla4_82xx_get_fdt_info()
3843 le16_to_cpu(fdt->version))); in qla4_82xx_get_fdt_info()
3848 mid = le16_to_cpu(fdt->man_id); in qla4_82xx_get_fdt_info()
3849 fid = le16_to_cpu(fdt->id); in qla4_82xx_get_fdt_info()
3850 hw->fdt_wrt_disable = fdt->wrt_disable_bits; in qla4_82xx_get_fdt_info()
3851 hw->fdt_erase_cmd = flash_conf_addr(hw, 0x0300 | fdt->erase_cmd); in qla4_82xx_get_fdt_info()
3852 hw->fdt_block_size = le32_to_cpu(fdt->block_size); in qla4_82xx_get_fdt_info()
3854 if (fdt->unprotect_sec_cmd) { in qla4_82xx_get_fdt_info()
3855 hw->fdt_unprotect_sec_cmd = flash_conf_addr(hw, 0x0300 | in qla4_82xx_get_fdt_info()
3856 fdt->unprotect_sec_cmd); in qla4_82xx_get_fdt_info()
3857 hw->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? in qla4_82xx_get_fdt_info()
3858 flash_conf_addr(hw, 0x0300 | fdt->protect_sec_cmd) : in qla4_82xx_get_fdt_info()
3865 hw->fdt_block_size = FLASH_BLK_SIZE_64K; in qla4_82xx_get_fdt_info()
3869 hw->fdt_erase_cmd, hw->fdt_protect_sec_cmd, in qla4_82xx_get_fdt_info()
3870 hw->fdt_unprotect_sec_cmd, hw->fdt_wrt_disable, in qla4_82xx_get_fdt_info()
3871 hw->fdt_block_size)); in qla4_82xx_get_fdt_info()
3882 wptr = (uint32_t *)ha->request_ring; in qla4_82xx_get_idc_param()
3883 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_82xx_get_idc_param()
3887 ha->nx_dev_init_timeout = ROM_DEV_INIT_TIMEOUT; in qla4_82xx_get_idc_param()
3888 ha->nx_reset_timeout = ROM_DRV_RESET_ACK_TIMEOUT; in qla4_82xx_get_idc_param()
3890 ha->nx_dev_init_timeout = le32_to_cpu(*wptr++); in qla4_82xx_get_idc_param()
3891 ha->nx_reset_timeout = le32_to_cpu(*wptr); in qla4_82xx_get_idc_param()
3895 "ha->nx_dev_init_timeout = %d\n", ha->nx_dev_init_timeout)); in qla4_82xx_get_idc_param()
3897 "ha->nx_reset_timeout = %d\n", ha->nx_reset_timeout)); in qla4_82xx_get_idc_param()
3908 writel(mbx_cmd[i], &ha->qla4_82xx_reg->mailbox_in[i]); in qla4_82xx_queue_mbox_cmd()
3911 writel(mbx_cmd[0], &ha->qla4_82xx_reg->mailbox_in[0]); in qla4_82xx_queue_mbox_cmd()
3912 readl(&ha->qla4_82xx_reg->mailbox_in[0]); in qla4_82xx_queue_mbox_cmd()
3913 writel(HINT_MBX_INT_PENDING, &ha->qla4_82xx_reg->hint); in qla4_82xx_queue_mbox_cmd()
3914 readl(&ha->qla4_82xx_reg->hint); in qla4_82xx_queue_mbox_cmd()
3921 intr_status = readl(&ha->qla4_82xx_reg->host_int); in qla4_82xx_process_mbox_intr()
3923 ha->mbox_status_count = out_count; in qla4_82xx_process_mbox_intr()
3924 intr_status = readl(&ha->qla4_82xx_reg->host_status); in qla4_82xx_process_mbox_intr()
3925 ha->isp_ops->interrupt_service_routine(ha, intr_status); in qla4_82xx_process_mbox_intr()
3927 if (test_bit(AF_INTERRUPTS_ON, &ha->flags) && in qla4_82xx_process_mbox_intr()
3928 (!ha->pdev->msi_enabled && !ha->pdev->msix_enabled)) in qla4_82xx_process_mbox_intr()
3929 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, in qla4_82xx_process_mbox_intr()
3956 * qla4_8xxx_stop_firmware - stops firmware on specified adapter instance
3957 * @ha: pointer to host adapter structure.
3978 DEBUG2(printk("scsi%ld: %s: status = %d\n", ha->host_no, in qla4_8xxx_stop_firmware()
3984 * qla4_82xx_isp_reset - Resets ISP and aborts all outstanding commands.
3985 * @ha: pointer to host adapter structure.
4000 set_bit(AF_8XXX_RST_OWNER, &ha->flags); in qla4_82xx_isp_reset()
4014 clear_bit(AF_FW_RECOVERY, &ha->flags); in qla4_82xx_isp_reset()
4021 * qla4_8xxx_get_sys_info - get adapter MAC address(es) and serial number
4022 * @ha: pointer to host adapter structure.
4033 sys_info = dma_alloc_coherent(&ha->pdev->dev, sizeof(*sys_info), in qla4_8xxx_get_sys_info()
4037 ha->host_no, __func__)); in qla4_8xxx_get_sys_info()
4052 ha->host_no, __func__)); in qla4_8xxx_get_sys_info()
4057 if (((is_qla8032(ha) || is_qla8042(ha)) ? mbox_sts[3] : mbox_sts[4]) < in qla4_8xxx_get_sys_info()
4060 " error (%x)\n", ha->host_no, __func__, mbox_sts[4])); in qla4_8xxx_get_sys_info()
4065 ha->port_num = sys_info->port_num; in qla4_8xxx_get_sys_info()
4066 memcpy(ha->my_mac, &sys_info->mac_addr[0], in qla4_8xxx_get_sys_info()
4067 min(sizeof(ha->my_mac), sizeof(sys_info->mac_addr))); in qla4_8xxx_get_sys_info()
4068 memcpy(ha->serial_number, &sys_info->serial_number, in qla4_8xxx_get_sys_info()
4069 min(sizeof(ha->serial_number), sizeof(sys_info->serial_number))); in qla4_8xxx_get_sys_info()
4070 memcpy(ha->model_name, &sys_info->board_id_str, in qla4_8xxx_get_sys_info()
4071 min(sizeof(ha->model_name), sizeof(sys_info->board_id_str))); in qla4_8xxx_get_sys_info()
4072 ha->phy_port_cnt = sys_info->phys_port_cnt; in qla4_8xxx_get_sys_info()
4073 ha->phy_port_num = sys_info->port_num; in qla4_8xxx_get_sys_info()
4074 ha->iscsi_pci_func_cnt = sys_info->iscsi_pci_func_cnt; in qla4_8xxx_get_sys_info()
4077 ha->host_no, __func__, ha->my_mac, ha->serial_number)); in qla4_8xxx_get_sys_info()
4082 dma_free_coherent(&ha->pdev->dev, sizeof(*sys_info), sys_info, in qla4_8xxx_get_sys_info()
4137 spin_lock_irq(&ha->hardware_lock); in qla4_82xx_enable_intrs()
4138 /* BIT 10 - reset */ in qla4_82xx_enable_intrs()
4139 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla4_82xx_enable_intrs()
4140 spin_unlock_irq(&ha->hardware_lock); in qla4_82xx_enable_intrs()
4141 set_bit(AF_INTERRUPTS_ON, &ha->flags); in qla4_82xx_enable_intrs()
4147 if (test_and_clear_bit(AF_INTERRUPTS_ON, &ha->flags)) in qla4_82xx_disable_intrs()
4150 spin_lock_irq(&ha->hardware_lock); in qla4_82xx_disable_intrs()
4151 /* BIT 10 - set */ in qla4_82xx_disable_intrs()
4152 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla4_82xx_disable_intrs()
4153 spin_unlock_irq(&ha->hardware_lock); in qla4_82xx_disable_intrs()
4161 ret = pci_alloc_irq_vectors(ha->pdev, QLA_MSIX_ENTRIES, in qla4_8xxx_enable_msix()
4165 "MSI-X: Failed to enable support -- %d/%d\n", in qla4_8xxx_enable_msix()
4170 ret = request_irq(pci_irq_vector(ha->pdev, 0), in qla4_8xxx_enable_msix()
4176 ret = request_irq(pci_irq_vector(ha->pdev, 1), in qla4_8xxx_enable_msix()
4184 free_irq(pci_irq_vector(ha->pdev, 0), ha); in qla4_8xxx_enable_msix()
4186 pci_free_irq_vectors(ha->pdev); in qla4_8xxx_enable_msix()
4195 if (!test_bit(AF_IRQ_ATTACHED, &ha->flags)) { in qla4_8xxx_check_init_adapter_retry()