Lines Matching +full:0 +full:x8014
14 #define PCI_DEVICE_ID_QLOGIC_ISPF001 0xF001
18 #define FX00_COMMAND_TYPE_7 0x07 /* Command Type 7 entry for 7XXX */
53 #define STATUS_TYPE_FX00 0x01 /* Status entry. */
80 #define MULTI_STATUS_TYPE_FX00 0x0D
91 #define TSK_MGMT_IOCB_TYPE_FX00 0x05
116 #define ABORT_IOCB_TYPE_FX00 0x08 /* Abort IOCB status. */
136 #define IOCTL_IOSB_TYPE_FX00 0x0C
159 #define STATUS_CONT_TYPE_FX00 0x04
161 #define FX00_IOCB_TYPE 0x0B
203 #define QLAFX00_LINK_STATUS_DOWN 0x10
204 #define QLAFX00_LINK_STATUS_UP 0x11
206 #define QLAFX00_PORT_SPEED_2G 0x2
207 #define QLAFX00_PORT_SPEED_4G 0x4
208 #define QLAFX00_PORT_SPEED_8G 0x8
209 #define QLAFX00_PORT_SPEED_10G 0xa
251 #define OS_TYPE_UNKNOWN 0
321 #define FXDISC_GET_CONFIG_INFO 0x01
322 #define FXDISC_GET_PORT_INFO 0x02
323 #define FXDISC_GET_TGT_NODE_INFO 0x80
324 #define FXDISC_GET_TGT_NODE_LIST 0x81
325 #define FXDISC_REG_HOST_INFO 0x99
326 #define FXDISC_ABORT_IOCTL 0xff
328 #define QLAFX00_HBA_ICNTRL_REG 0x20B08
329 #define QLAFX00_ICR_ENB_MASK 0x80000000
330 #define QLAFX00_ICR_DIS_MASK 0x7fffffff
331 #define QLAFX00_HST_RST_REG 0x18264
332 #define QLAFX00_SOC_TEMP_REG 0x184C4
333 #define QLAFX00_HST_TO_HBA_REG 0x20A04
334 #define QLAFX00_HBA_TO_HOST_REG 0x21B70
335 #define QLAFX00_HST_INT_STS_BITS 0x7
336 #define QLAFX00_BAR1_BASE_ADDR_REG 0x40018
337 #define QLAFX00_PEX0_WIN0_BASE_ADDR_REG 0x41824
339 #define QLAFX00_INTR_MB_CMPLT 0x1
340 #define QLAFX00_INTR_RSP_CMPLT 0x2
341 #define QLAFX00_INTR_ASYNC_CMPLT 0x4
343 #define QLAFX00_MBA_SYSTEM_ERR 0x8002
344 #define QLAFX00_MBA_TEMP_OVER 0x8005
345 #define QLAFX00_MBA_TEMP_NORM 0x8006
346 #define QLAFX00_MBA_TEMP_CRIT 0x8007
347 #define QLAFX00_MBA_LINK_UP 0x8011
348 #define QLAFX00_MBA_LINK_DOWN 0x8012
349 #define QLAFX00_MBA_PORT_UPDATE 0x8014
350 #define QLAFX00_MBA_SHUTDOWN_RQSTD 0x8062
352 #define SOC_SW_RST_CONTROL_REG_CORE0 0x0020800
353 #define SOC_FABRIC_RST_CONTROL_REG 0x0020840
354 #define SOC_FABRIC_CONTROL_REG 0x0020200
355 #define SOC_FABRIC_CONFIG_REG 0x0020204
356 #define SOC_PWR_MANAGEMENT_PWR_DOWN_REG 0x001820C
358 #define SOC_INTERRUPT_SOURCE_I_CONTROL_REG 0x0020B00
359 #define SOC_CORE_TIMER_REG 0x0021850
360 #define SOC_IRQ_ACK_REG 0x00218b4
362 #define CONTINUE_A64_TYPE_FX00 0x03 /* Continuation entry. */
453 #define MAX_LUNS_FX00 0x1024
461 #define FSTATE_FX00_CONFIG_WAIT 0x0000 /* Waiting for driver to issue
464 #define FSTATE_FX00_INITIALIZED 0x1000 /* FW has been initialized by
495 #define QLAFX00_EXTENDED_IO_EN_MASK 0x20
510 ((QLAFX00_RD_REG(ha, QLAFX00_SOC_TEMP_REG) & 0x3FE) >> 1))) / 13825)
527 #define QLAFX00_IOCTL_ICOB_ABORT_SUCCESS 0x68