Lines Matching full:lsb
140 #define LSB(x) ((uint8_t)(x)) macro
1544 * LSB BIT 0 = Enable Hard Loop Id
1545 * LSB BIT 1 = Enable Fairness
1546 * LSB BIT 2 = Enable Full-Duplex
1547 * LSB BIT 3 = Enable Fast Posting
1548 * LSB BIT 4 = Enable Target Mode
1549 * LSB BIT 5 = Disable Initiator Mode
1550 * LSB BIT 6 = Enable ADISC
1551 * LSB BIT 7 = Enable Target Inquiry Data
1589 * LSB BIT 0 = Timer Operation mode bit 0
1590 * LSB BIT 1 = Timer Operation mode bit 1
1591 * LSB BIT 2 = Timer Operation mode bit 2
1592 * LSB BIT 3 = Timer Operation mode bit 3
1593 * LSB BIT 4 = Init Config Mode bit 0
1594 * LSB BIT 5 = Init Config Mode bit 1
1595 * LSB BIT 6 = Init Config Mode bit 2
1596 * LSB BIT 7 = Enable Non part on LIHA failure
1613 * LSB BIT 0 = Enable Read xfr_rdy
1614 * LSB BIT 1 = Soft ID only
1615 * LSB BIT 2 =
1616 * LSB BIT 3 =
1617 * LSB BIT 4 = FCP RSP Payload [0]
1618 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1619 * LSB BIT 6 = Enable Out-of-Order frame handling
1620 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
1731 * LSB BIT 0 = Enable Hard Loop Id
1732 * LSB BIT 1 = Enable Fairness
1733 * LSB BIT 2 = Enable Full-Duplex
1734 * LSB BIT 3 = Enable Fast Posting
1735 * LSB BIT 4 = Enable Target Mode
1736 * LSB BIT 5 = Disable Initiator Mode
1737 * LSB BIT 6 = Enable ADISC
1738 * LSB BIT 7 = Enable Target Inquiry Data
1763 * LSB BIT 0 = Timer Operation mode bit 0
1764 * LSB BIT 1 = Timer Operation mode bit 1
1765 * LSB BIT 2 = Timer Operation mode bit 2
1766 * LSB BIT 3 = Timer Operation mode bit 3
1767 * LSB BIT 4 = Init Config Mode bit 0
1768 * LSB BIT 5 = Init Config Mode bit 1
1769 * LSB BIT 6 = Init Config Mode bit 2
1770 * LSB BIT 7 = Enable Non part on LIHA failure
1787 * LSB BIT 0 = Enable Read xfr_rdy
1788 * LSB BIT 1 = Soft ID only
1789 * LSB BIT 2 =
1790 * LSB BIT 3 =
1791 * LSB BIT 4 = FCP RSP Payload [0]
1792 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1793 * LSB BIT 6 = Enable Out-of-Order frame handling
1794 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
1811 * LSB BIT 0 = Tx Sensitivity 1G bit 0
1812 * LSB BIT 1 = Tx Sensitivity 1G bit 1
1813 * LSB BIT 2 = Tx Sensitivity 1G bit 2
1814 * LSB BIT 3 = Tx Sensitivity 1G bit 3
1815 * LSB BIT 4 = Rx Sensitivity 1G bit 0
1816 * LSB BIT 5 = Rx Sensitivity 1G bit 1
1817 * LSB BIT 6 = Rx Sensitivity 1G bit 2
1818 * LSB BIT 7 = Rx Sensitivity 1G bit 3
1829 * LSB BIT 0 = Output Swing 1G bit 0
1830 * LSB BIT 1 = Output Swing 1G bit 1
1831 * LSB BIT 2 = Output Swing 1G bit 2
1832 * LSB BIT 3 = Output Emphasis 1G bit 0
1833 * LSB BIT 4 = Output Emphasis 1G bit 1
1834 * LSB BIT 5 = Output Swing 2G bit 0
1835 * LSB BIT 6 = Output Swing 2G bit 1
1836 * LSB BIT 7 = Output Swing 2G bit 2
1852 * LSB BIT 0 = Enable spinup delay
1853 * LSB BIT 1 = Disable BIOS
1854 * LSB BIT 2 = Enable Memory Map BIOS
1855 * LSB BIT 3 = Enable Selectable Boot
1856 * LSB BIT 4 = Disable RISC code load
1857 * LSB BIT 5 = Set cache line size 1
1858 * LSB BIT 6 = PCI Parity Disable
1859 * LSB BIT 7 = Enable extended logging
1924 * LSB BIT 0 = External GBIC
1925 * LSB BIT 1 = Risc RAM parity
1926 * LSB BIT 2 = Buffer Plus Module
1927 * LSB BIT 3 = Multi Chip Adapter
1928 * LSB BIT 4 = Internal connector
1929 * LSB BIT 5 =
1930 * LSB BIT 6 =
1931 * LSB BIT 7 =