Lines Matching +full:sierra +full:- +full:phy
2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
18 * 3. Neither the names of the above-listed copyright holders nor the names
100 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_map_queues()
101 struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; in pm8001_map_queues()
103 if (pm8001_ha->number_of_intr > 1) { in pm8001_map_queues()
104 blk_mq_pci_map_queues(qmap, pm8001_ha->pdev, 1); in pm8001_map_queues()
149 * pm8001_phy_init - initiate our adapter phys
151 * @phy_id: phy id.
155 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in pm8001_phy_init() local
156 struct asd_sas_phy *sas_phy = &phy->sas_phy; in pm8001_phy_init()
157 phy->phy_state = PHY_LINK_DISABLE; in pm8001_phy_init()
158 phy->pm8001_ha = pm8001_ha; in pm8001_phy_init()
159 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS; in pm8001_phy_init()
160 phy->maximum_linkrate = SAS_LINK_RATE_6_0_GBPS; in pm8001_phy_init()
161 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; in pm8001_phy_init()
162 sas_phy->iproto = SAS_PROTOCOL_ALL; in pm8001_phy_init()
163 sas_phy->tproto = 0; in pm8001_phy_init()
164 sas_phy->role = PHY_ROLE_INITIATOR; in pm8001_phy_init()
165 sas_phy->oob_mode = OOB_NOT_CONNECTED; in pm8001_phy_init()
166 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; in pm8001_phy_init()
167 sas_phy->id = phy_id; in pm8001_phy_init()
168 sas_phy->sas_addr = (u8 *)&phy->dev_sas_addr; in pm8001_phy_init()
169 sas_phy->frame_rcvd = &phy->frame_rcvd[0]; in pm8001_phy_init()
170 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; in pm8001_phy_init()
171 sas_phy->lldd_phy = phy; in pm8001_phy_init()
175 * pm8001_free - free hba
186 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { in pm8001_free()
187 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_free()
188 (pm8001_ha->memoryMap.region[i].total_len + in pm8001_free()
189 pm8001_ha->memoryMap.region[i].alignment), in pm8001_free()
190 pm8001_ha->memoryMap.region[i].virt_ptr, in pm8001_free()
191 pm8001_ha->memoryMap.region[i].phys_addr); in pm8001_free()
194 PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); in pm8001_free()
196 bitmap_free(pm8001_ha->rsvd_tags); in pm8001_free()
201 * pm8001_tasklet() - tasklet for 64 msi-x interrupt handler
208 struct pm8001_hba_info *pm8001_ha = irq_vector->drv_inst; in pm8001_tasklet()
213 PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id); in pm8001_tasklet()
223 /* Tasklet for non msi-x interrupt handler */ in pm8001_init_tasklet()
224 if ((!pm8001_ha->pdev->msix_cap || !pci_msi_enabled()) || in pm8001_init_tasklet()
225 (pm8001_ha->chip_id == chip_8001)) { in pm8001_init_tasklet()
226 tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet, in pm8001_init_tasklet()
227 (unsigned long)&(pm8001_ha->irq_vector[0])); in pm8001_init_tasklet()
231 tasklet_init(&pm8001_ha->tasklet[i], pm8001_tasklet, in pm8001_init_tasklet()
232 (unsigned long)&(pm8001_ha->irq_vector[i])); in pm8001_init_tasklet()
242 /* For non-msix and msix interrupts */ in pm8001_kill_tasklet()
243 if ((!pm8001_ha->pdev->msix_cap || !pci_msi_enabled()) || in pm8001_kill_tasklet()
244 (pm8001_ha->chip_id == chip_8001)) { in pm8001_kill_tasklet()
245 tasklet_kill(&pm8001_ha->tasklet[0]); in pm8001_kill_tasklet()
250 tasklet_kill(&pm8001_ha->tasklet[i]); in pm8001_kill_tasklet()
259 if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha)) in pm8001_handle_irq()
263 return PM8001_CHIP_DISP->isr(pm8001_ha, irq); in pm8001_handle_irq()
265 tasklet_schedule(&pm8001_ha->tasklet[irq]); in pm8001_handle_irq()
270 * pm8001_interrupt_handler_msix - main MSIX interrupt handler.
280 struct pm8001_hba_info *pm8001_ha = irq_vector->drv_inst; in pm8001_interrupt_handler_msix()
282 return pm8001_handle_irq(pm8001_ha, irq_vector->irq_id); in pm8001_interrupt_handler_msix()
286 * pm8001_interrupt_handler_intx - main INTx interrupt handler.
294 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_interrupt_handler_intx()
303 * pm8001_alloc - initiate our hba structure and 6 DMAs area.
315 spin_lock_init(&pm8001_ha->lock); in pm8001_alloc()
316 spin_lock_init(&pm8001_ha->bitmap_lock); in pm8001_alloc()
317 pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n", in pm8001_alloc()
318 pm8001_ha->chip->n_phy); in pm8001_alloc()
325 count = pm8001_ha->max_q_num; in pm8001_alloc()
327 ib_offset = pm8001_ha->ib_offset = USI_MAX_MEMCNT_BASE; in pm8001_alloc()
328 ci_offset = pm8001_ha->ci_offset = ib_offset + count; in pm8001_alloc()
329 ob_offset = pm8001_ha->ob_offset = ci_offset + count; in pm8001_alloc()
330 pi_offset = pm8001_ha->pi_offset = ob_offset + count; in pm8001_alloc()
331 pm8001_ha->max_memcnt = pi_offset + count; in pm8001_alloc()
333 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_alloc()
335 pm8001_ha->port[i].wide_port_phymap = 0; in pm8001_alloc()
336 pm8001_ha->port[i].port_attached = 0; in pm8001_alloc()
337 pm8001_ha->port[i].port_state = 0; in pm8001_alloc()
338 INIT_LIST_HEAD(&pm8001_ha->port[i].list); in pm8001_alloc()
342 pm8001_ha->memoryMap.region[AAP1].num_elements = 1; in pm8001_alloc()
343 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
344 pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
345 pm8001_ha->memoryMap.region[AAP1].alignment = 32; in pm8001_alloc()
348 pm8001_ha->memoryMap.region[IOP].num_elements = 1; in pm8001_alloc()
349 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
350 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
351 pm8001_ha->memoryMap.region[IOP].alignment = 32; in pm8001_alloc()
354 ibq = &pm8001_ha->inbnd_q_tbl[i]; in pm8001_alloc()
355 spin_lock_init(&ibq->iq_lock); in pm8001_alloc()
357 pm8001_ha->memoryMap.region[ci_offset+i].num_elements = 1; in pm8001_alloc()
358 pm8001_ha->memoryMap.region[ci_offset+i].element_size = 4; in pm8001_alloc()
359 pm8001_ha->memoryMap.region[ci_offset+i].total_len = 4; in pm8001_alloc()
360 pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4; in pm8001_alloc()
362 if ((ent->driver_data) != chip_8001) { in pm8001_alloc()
364 pm8001_ha->memoryMap.region[ib_offset+i].num_elements = in pm8001_alloc()
366 pm8001_ha->memoryMap.region[ib_offset+i].element_size in pm8001_alloc()
368 pm8001_ha->memoryMap.region[ib_offset+i].total_len = in pm8001_alloc()
370 pm8001_ha->memoryMap.region[ib_offset+i].alignment in pm8001_alloc()
373 pm8001_ha->memoryMap.region[ib_offset+i].num_elements = in pm8001_alloc()
375 pm8001_ha->memoryMap.region[ib_offset+i].element_size in pm8001_alloc()
377 pm8001_ha->memoryMap.region[ib_offset+i].total_len = in pm8001_alloc()
379 pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64; in pm8001_alloc()
384 obq = &pm8001_ha->outbnd_q_tbl[i]; in pm8001_alloc()
385 spin_lock_init(&obq->oq_lock); in pm8001_alloc()
387 pm8001_ha->memoryMap.region[pi_offset+i].num_elements = 1; in pm8001_alloc()
388 pm8001_ha->memoryMap.region[pi_offset+i].element_size = 4; in pm8001_alloc()
389 pm8001_ha->memoryMap.region[pi_offset+i].total_len = 4; in pm8001_alloc()
390 pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4; in pm8001_alloc()
392 if (ent->driver_data != chip_8001) { in pm8001_alloc()
394 pm8001_ha->memoryMap.region[ob_offset+i].num_elements = in pm8001_alloc()
396 pm8001_ha->memoryMap.region[ob_offset+i].element_size in pm8001_alloc()
398 pm8001_ha->memoryMap.region[ob_offset+i].total_len = in pm8001_alloc()
400 pm8001_ha->memoryMap.region[ob_offset+i].alignment in pm8001_alloc()
404 pm8001_ha->memoryMap.region[ob_offset+i].num_elements = in pm8001_alloc()
406 pm8001_ha->memoryMap.region[ob_offset+i].element_size in pm8001_alloc()
408 pm8001_ha->memoryMap.region[ob_offset+i].total_len = in pm8001_alloc()
410 pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64; in pm8001_alloc()
415 pm8001_ha->memoryMap.region[NVMD].num_elements = 1; in pm8001_alloc()
416 pm8001_ha->memoryMap.region[NVMD].element_size = 4096; in pm8001_alloc()
417 pm8001_ha->memoryMap.region[NVMD].total_len = 4096; in pm8001_alloc()
420 pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096; in pm8001_alloc()
422 pm8001_ha->memoryMap.region[FORENSIC_MEM].num_elements = 1; in pm8001_alloc()
423 pm8001_ha->memoryMap.region[FORENSIC_MEM].total_len = 0x10000; in pm8001_alloc()
424 pm8001_ha->memoryMap.region[FORENSIC_MEM].element_size = 0x10000; in pm8001_alloc()
425 pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000; in pm8001_alloc()
426 for (i = 0; i < pm8001_ha->max_memcnt; i++) { in pm8001_alloc()
427 struct mpi_mem *region = &pm8001_ha->memoryMap.region[i]; in pm8001_alloc()
429 if (pm8001_mem_alloc(pm8001_ha->pdev, in pm8001_alloc()
430 ®ion->virt_ptr, in pm8001_alloc()
431 ®ion->phys_addr, in pm8001_alloc()
432 ®ion->phys_addr_hi, in pm8001_alloc()
433 ®ion->phys_addr_lo, in pm8001_alloc()
434 region->total_len, in pm8001_alloc()
435 region->alignment) != 0) { in pm8001_alloc()
442 pm8001_ha->devices = kzalloc(PM8001_MAX_DEVICES in pm8001_alloc()
444 if (!pm8001_ha->devices) { in pm8001_alloc()
445 rc = -ENOMEM; in pm8001_alloc()
449 pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED; in pm8001_alloc()
450 pm8001_ha->devices[i].id = i; in pm8001_alloc()
451 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; in pm8001_alloc()
452 atomic_set(&pm8001_ha->devices[i].running_req, 0); in pm8001_alloc()
454 pm8001_ha->flags = PM8001F_INIT_TIME; in pm8001_alloc()
458 for (i = 0; i < pm8001_ha->max_memcnt; i++) { in pm8001_alloc()
459 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { in pm8001_alloc()
460 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_alloc()
461 (pm8001_ha->memoryMap.region[i].total_len + in pm8001_alloc()
462 pm8001_ha->memoryMap.region[i].alignment), in pm8001_alloc()
463 pm8001_ha->memoryMap.region[i].virt_ptr, in pm8001_alloc()
464 pm8001_ha->memoryMap.region[i].phys_addr); in pm8001_alloc()
472 * pm8001_ioremap - remap the pci high physical address to kernel virtual
482 pdev = pm8001_ha->pdev; in pm8001_ioremap()
483 /* map pci mem (PMC pci base 0-3)*/ in pm8001_ioremap()
487 ** bar 0 and 1 - logical BAR0 in pm8001_ioremap()
488 ** bar 2 and 3 - logical BAR1 in pm8001_ioremap()
489 ** bar4 - logical BAR2 in pm8001_ioremap()
490 ** bar5 - logical BAR3 in pm8001_ioremap()
496 pm8001_ha->io_mem[logicalBar].membase = in pm8001_ioremap()
498 pm8001_ha->io_mem[logicalBar].memsize = in pm8001_ioremap()
500 pm8001_ha->io_mem[logicalBar].memvirtaddr = in pm8001_ioremap()
501 ioremap(pm8001_ha->io_mem[logicalBar].membase, in pm8001_ioremap()
502 pm8001_ha->io_mem[logicalBar].memsize); in pm8001_ioremap()
503 if (!pm8001_ha->io_mem[logicalBar].memvirtaddr) { in pm8001_ioremap()
507 return -ENOMEM; in pm8001_ioremap()
511 (u64)pm8001_ha->io_mem[logicalBar].membase, in pm8001_ioremap()
513 pm8001_ha->io_mem[logicalBar].memvirtaddr, in pm8001_ioremap()
514 pm8001_ha->io_mem[logicalBar].memsize); in pm8001_ioremap()
516 pm8001_ha->io_mem[logicalBar].membase = 0; in pm8001_ioremap()
517 pm8001_ha->io_mem[logicalBar].memsize = 0; in pm8001_ioremap()
518 pm8001_ha->io_mem[logicalBar].memvirtaddr = NULL; in pm8001_ioremap()
526 * pm8001_pci_alloc - initialize our ha card structure
539 pm8001_ha = sha->lldd_ha; in pm8001_pci_alloc()
543 pm8001_ha->pdev = pdev; in pm8001_pci_alloc()
544 pm8001_ha->dev = &pdev->dev; in pm8001_pci_alloc()
545 pm8001_ha->chip_id = ent->driver_data; in pm8001_pci_alloc()
546 pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; in pm8001_pci_alloc()
547 pm8001_ha->irq = pdev->irq; in pm8001_pci_alloc()
548 pm8001_ha->sas = sha; in pm8001_pci_alloc()
549 pm8001_ha->shost = shost; in pm8001_pci_alloc()
550 pm8001_ha->id = pm8001_id++; in pm8001_pci_alloc()
551 pm8001_ha->logging_level = logging_level; in pm8001_pci_alloc()
552 pm8001_ha->non_fatal_count = 0; in pm8001_pci_alloc()
554 pm8001_ha->link_rate = (link_rate << 8); in pm8001_pci_alloc()
556 pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 | in pm8001_pci_alloc()
561 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); in pm8001_pci_alloc()
563 if (pm8001_ha->chip_id != chip_8001) in pm8001_pci_alloc()
564 pm8001_ha->iomb_size = IOMB_SIZE_SPCV; in pm8001_pci_alloc()
566 pm8001_ha->iomb_size = IOMB_SIZE_SPC; in pm8001_pci_alloc()
580 * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit
587 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); in pci_go_44()
589 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in pci_go_44()
591 dev_printk(KERN_ERR, &pdev->dev, in pci_go_44()
592 "32-bit DMA enable failed\n"); in pci_go_44()
598 * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them.
610 phy_nr = chip_info->n_phy; in pm8001_prep_sas_ha_init()
620 sha->sas_phy = arr_phy; in pm8001_prep_sas_ha_init()
621 sha->sas_port = arr_port; in pm8001_prep_sas_ha_init()
622 sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); in pm8001_prep_sas_ha_init()
623 if (!sha->lldd_ha) in pm8001_prep_sas_ha_init()
626 shost->transportt = pm8001_stt; in pm8001_prep_sas_ha_init()
627 shost->max_id = PM8001_MAX_DEVICES; in pm8001_prep_sas_ha_init()
628 shost->unique_id = pm8001_id; in pm8001_prep_sas_ha_init()
629 shost->max_cmd_len = 16; in pm8001_prep_sas_ha_init()
636 return -1; in pm8001_prep_sas_ha_init()
640 * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas
651 pm8001_ha = sha->lldd_ha; in pm8001_post_sas_ha_init()
652 for (i = 0; i < chip_info->n_phy; i++) { in pm8001_post_sas_ha_init()
653 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; in pm8001_post_sas_ha_init()
654 sha->sas_port[i] = &pm8001_ha->port[i].sas_port; in pm8001_post_sas_ha_init()
655 sha->sas_phy[i]->sas_addr = in pm8001_post_sas_ha_init()
656 (u8 *)&pm8001_ha->phy[i].dev_sas_addr; in pm8001_post_sas_ha_init()
658 sha->sas_ha_name = DRV_NAME; in pm8001_post_sas_ha_init()
659 sha->dev = pm8001_ha->dev; in pm8001_post_sas_ha_init()
660 sha->strict_wide_ports = 1; in pm8001_post_sas_ha_init()
661 sha->sas_addr = &pm8001_ha->sas_addr[0]; in pm8001_post_sas_ha_init()
662 sha->num_phys = chip_info->n_phy; in pm8001_post_sas_ha_init()
663 sha->shost = shost; in pm8001_post_sas_ha_init()
667 * pm8001_init_sas_add - initialize sas address
686 for (i = 0; i < pm8001_ha->chip->n_phy; i++) in pm8001_init_sas_add()
687 memcpy(&pm8001_ha->phy[i].dev_sas_addr, &dev_sas_addr, in pm8001_init_sas_add()
689 memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, in pm8001_init_sas_add()
699 if (PM8001_CHIP_DISP->fatal_errors(pm8001_ha)) { in pm8001_init_sas_add()
701 return -EIO; in pm8001_init_sas_add()
704 pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); in pm8001_init_sas_add()
705 pm8001_ha->nvmd_completion = &completion; in pm8001_init_sas_add()
707 if (pm8001_ha->chip_id == chip_8001) { in pm8001_init_sas_add()
715 } else if ((pm8001_ha->chip_id == chip_8070 || in pm8001_init_sas_add()
716 pm8001_ha->chip_id == chip_8072) && in pm8001_init_sas_add()
717 pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { in pm8001_init_sas_add()
728 return -ENOMEM; in pm8001_init_sas_add()
730 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); in pm8001_init_sas_add()
734 return -EIO; in pm8001_init_sas_add()
741 return -EIO; in pm8001_init_sas_add()
746 if (pm8001_ha->chip_id == chip_8001) { in pm8001_init_sas_add()
748 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
751 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
753 } else if ((pm8001_ha->chip_id == chip_8070 || in pm8001_init_sas_add()
754 pm8001_ha->chip_id == chip_8072) && in pm8001_init_sas_add()
755 pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { in pm8001_init_sas_add()
756 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
759 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
762 memcpy(sas_add, pm8001_ha->sas_addr, SAS_ADDR_SIZE); in pm8001_init_sas_add()
763 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()
766 memcpy(&pm8001_ha->phy[i].dev_sas_addr, in pm8001_init_sas_add()
768 pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i, in pm8001_init_sas_add()
769 pm8001_ha->phy[i].dev_sas_addr); in pm8001_init_sas_add()
777 * pm8001_get_phy_settings_info : Read phy setting values.
789 pm8001_ha->nvmd_completion = &completion; in pm8001_get_phy_settings_info()
796 return -ENOMEM; in pm8001_get_phy_settings_info()
797 /* Read phy setting values from flash */ in pm8001_get_phy_settings_info()
798 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); in pm8001_get_phy_settings_info()
802 return -ENOMEM; in pm8001_get_phy_settings_info()
824 * pm8001_get_internal_phy_settings - Retrieves the internal PHY settings
826 * @phycfg : PHY config page to populate
832 phycfg->LaneLosCfg = 0x00000132; in pm8001_get_internal_phy_settings()
833 phycfg->LanePgaCfg1 = 0x00203949; in pm8001_get_internal_phy_settings()
834 phycfg->LanePisoCfg1 = 0x000000FF; in pm8001_get_internal_phy_settings()
835 phycfg->LanePisoCfg2 = 0xFF000001; in pm8001_get_internal_phy_settings()
836 phycfg->LanePisoCfg3 = 0xE7011300; in pm8001_get_internal_phy_settings()
837 phycfg->LanePisoCfg4 = 0x631C40C0; in pm8001_get_internal_phy_settings()
838 phycfg->LanePisoCfg5 = 0xF8102036; in pm8001_get_internal_phy_settings()
839 phycfg->LanePisoCfg6 = 0xF74A1000; in pm8001_get_internal_phy_settings()
840 phycfg->LaneBctCtrl = 0x00FB33F8; in pm8001_get_internal_phy_settings()
844 * pm8001_get_external_phy_settings - Retrieves the external PHY settings
846 * @phycfg : PHY config page to populate
852 phycfg->LaneLosCfg = 0x00000132; in pm8001_get_external_phy_settings()
853 phycfg->LanePgaCfg1 = 0x00203949; in pm8001_get_external_phy_settings()
854 phycfg->LanePisoCfg1 = 0x000000FF; in pm8001_get_external_phy_settings()
855 phycfg->LanePisoCfg2 = 0xFF000001; in pm8001_get_external_phy_settings()
856 phycfg->LanePisoCfg3 = 0xE7011300; in pm8001_get_external_phy_settings()
857 phycfg->LanePisoCfg4 = 0x63349140; in pm8001_get_external_phy_settings()
858 phycfg->LanePisoCfg5 = 0xF8102036; in pm8001_get_external_phy_settings()
859 phycfg->LanePisoCfg6 = 0xF80D9300; in pm8001_get_external_phy_settings()
860 phycfg->LaneBctCtrl = 0x00FB33F8; in pm8001_get_external_phy_settings()
864 * pm8001_get_phy_mask - Retrieves the mask that denotes if a PHY is int/ext
866 * @phymask : The PHY mask
871 switch (pm8001_ha->pdev->subsystem_device) { in pm8001_get_phy_mask()
872 case 0x0070: /* H1280 - 8 external 0 internal */ in pm8001_get_phy_mask()
873 case 0x0072: /* H12F0 - 16 external 0 internal */ in pm8001_get_phy_mask()
877 case 0x0071: /* H1208 - 0 external 8 internal */ in pm8001_get_phy_mask()
878 case 0x0073: /* H120F - 0 external 16 internal */ in pm8001_get_phy_mask()
882 case 0x0080: /* H1244 - 4 external 4 internal */ in pm8001_get_phy_mask()
886 case 0x0081: /* H1248 - 4 external 8 internal */ in pm8001_get_phy_mask()
890 case 0x0082: /* H1288 - 8 external 8 internal */ in pm8001_get_phy_mask()
897 pm8001_ha->pdev->subsystem_device); in pm8001_get_phy_mask()
902 * pm8001_set_phy_settings_ven_117c_12G() - Configure ATTO 12Gb PHY settings
920 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_settings_ven_117c_12G()
921 if (phymask & (1 << i)) {/* Internal PHY */ in pm8001_set_phy_settings_ven_117c_12G()
926 } else { /* External PHY */ in pm8001_set_phy_settings_ven_117c_12G()
937 * pm8001_configure_phy_settings - Configures PHY settings based on vendor ID.
942 switch (pm8001_ha->pdev->subsystem_vendor) { in pm8001_configure_phy_settings()
944 if (pm8001_ha->pdev->device == 0x0042) /* 6Gb */ in pm8001_configure_phy_settings()
959 * pm8001_setup_msix - enable MSI-X interrupt
967 /* SPCv controllers supports 64 msi-x */ in pm8001_setup_msix()
968 if (pm8001_ha->chip_id == chip_8001) { in pm8001_setup_msix()
969 rc = pci_alloc_irq_vectors(pm8001_ha->pdev, 1, 1, in pm8001_setup_msix()
980 pm8001_ha->pdev, 2, PM8001_MAX_MSIX_VEC, in pm8001_setup_msix()
989 pm8001_ha->number_of_intr = allocated_irq_vectors; in pm8001_setup_msix()
992 pm8001_ha->max_q_num = allocated_irq_vectors; in pm8001_setup_msix()
996 rc, pm8001_ha->number_of_intr); in pm8001_setup_msix()
1004 int nr_irqs = pm8001_ha->number_of_intr; in pm8001_request_msix()
1006 if (pm8001_ha->chip_id != chip_8001) in pm8001_request_msix()
1011 pm8001_ha->number_of_intr); in pm8001_request_msix()
1013 if (nr_irqs > ARRAY_SIZE(pm8001_ha->intr_drvname)) in pm8001_request_msix()
1014 nr_irqs = ARRAY_SIZE(pm8001_ha->intr_drvname); in pm8001_request_msix()
1017 snprintf(pm8001_ha->intr_drvname[i], in pm8001_request_msix()
1018 sizeof(pm8001_ha->intr_drvname[0]), in pm8001_request_msix()
1019 "%s-%d", pm8001_ha->name, i); in pm8001_request_msix()
1020 pm8001_ha->irq_vector[i].irq_id = i; in pm8001_request_msix()
1021 pm8001_ha->irq_vector[i].drv_inst = pm8001_ha; in pm8001_request_msix()
1023 rc = request_irq(pci_irq_vector(pm8001_ha->pdev, i), in pm8001_request_msix()
1025 pm8001_ha->intr_drvname[i], in pm8001_request_msix()
1026 &(pm8001_ha->irq_vector[i])); in pm8001_request_msix()
1029 free_irq(pci_irq_vector(pm8001_ha->pdev, i), in pm8001_request_msix()
1030 &(pm8001_ha->irq_vector[i])); in pm8001_request_msix()
1032 pci_free_irq_vectors(pm8001_ha->pdev); in pm8001_request_msix()
1041 * pm8001_request_irq - register interrupt
1046 struct pci_dev *pdev = pm8001_ha->pdev; in pm8001_request_irq()
1057 if (!pdev->msix_cap || !pci_msi_enabled()) in pm8001_request_irq()
1064 pm8001_ha->use_msix = true; in pm8001_request_irq()
1070 /* Initialize the INT-X interrupt */ in pm8001_request_irq()
1072 pm8001_ha->use_msix = false; in pm8001_request_irq()
1073 pm8001_ha->irq_vector[0].irq_id = 0; in pm8001_request_irq()
1074 pm8001_ha->irq_vector[0].drv_inst = pm8001_ha; in pm8001_request_irq()
1076 return request_irq(pdev->irq, pm8001_interrupt_handler_intx, in pm8001_request_irq()
1077 IRQF_SHARED, pm8001_ha->name, in pm8001_request_irq()
1078 SHOST_TO_SAS_HA(pm8001_ha->shost)); in pm8001_request_irq()
1083 struct pci_dev *pdev = pm8001_ha->pdev; in pm8001_free_irq()
1086 if (pm8001_ha->use_msix) { in pm8001_free_irq()
1087 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_free_irq()
1090 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_free_irq()
1091 free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); in pm8001_free_irq()
1097 /* INT-X */ in pm8001_free_irq()
1098 free_irq(pm8001_ha->irq, pm8001_ha->sas); in pm8001_free_irq()
1102 * pm8001_pci_probe - probe supported device
1121 dev_printk(KERN_INFO, &pdev->dev, in pm8001_pci_probe()
1144 rc = -ENOMEM; in pm8001_pci_probe()
1147 chip = &pm8001_chips[ent->driver_data]; in pm8001_pci_probe()
1150 rc = -ENOMEM; in pm8001_pci_probe()
1157 rc = -ENOMEM; in pm8001_pci_probe()
1161 /* ent->driver variable is used to differentiate between controllers */ in pm8001_pci_probe()
1164 rc = -ENOMEM; in pm8001_pci_probe()
1168 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_probe()
1169 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); in pm8001_pci_probe()
1181 PM8001_CHIP_DISP->chip_post_init(pm8001_ha); in pm8001_pci_probe()
1183 if (pm8001_ha->number_of_intr > 1) { in pm8001_pci_probe()
1184 shost->nr_hw_queues = pm8001_ha->number_of_intr - 1; in pm8001_pci_probe()
1190 shost->host_tagset = 1; in pm8001_pci_probe()
1193 rc = scsi_add_host(shost, &pdev->dev); in pm8001_pci_probe()
1197 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); in pm8001_pci_probe()
1198 if (pm8001_ha->chip_id != chip_8001) { in pm8001_pci_probe()
1199 for (i = 1; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_probe()
1200 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); in pm8001_pci_probe()
1208 /* phy setting support for motherboard controller */ in pm8001_pci_probe()
1220 list_add_tail(&pm8001_ha->list, &hba_list); in pm8001_pci_probe()
1221 pm8001_ha->flags = PM8001F_RUN_TIME; in pm8001_pci_probe()
1222 scsi_scan_host(pm8001_ha->shost); in pm8001_pci_probe()
1226 scsi_remove_host(pm8001_ha->shost); in pm8001_pci_probe()
1242 * pm8001_init_ccb_tag - allocate memory to CCB and tag.
1247 struct Scsi_Host *shost = pm8001_ha->shost; in pm8001_init_ccb_tag()
1248 struct device *dev = pm8001_ha->dev; in pm8001_init_ccb_tag()
1252 max_out_io = pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io; in pm8001_init_ccb_tag()
1255 shost->can_queue = ccb_count - PM8001_RESERVE_SLOT; in pm8001_init_ccb_tag()
1257 pm8001_ha->rsvd_tags = bitmap_zalloc(PM8001_RESERVE_SLOT, GFP_KERNEL); in pm8001_init_ccb_tag()
1258 if (!pm8001_ha->rsvd_tags) in pm8001_init_ccb_tag()
1262 pm8001_ha->ccb_count = ccb_count; in pm8001_init_ccb_tag()
1263 pm8001_ha->ccb_info = in pm8001_init_ccb_tag()
1265 if (!pm8001_ha->ccb_info) { in pm8001_init_ccb_tag()
1271 pm8001_ha->ccb_info[i].buf_prd = dma_alloc_coherent(dev, in pm8001_init_ccb_tag()
1273 &pm8001_ha->ccb_info[i].ccb_dma_handle, in pm8001_init_ccb_tag()
1275 if (!pm8001_ha->ccb_info[i].buf_prd) { in pm8001_init_ccb_tag()
1280 pm8001_ha->ccb_info[i].task = NULL; in pm8001_init_ccb_tag()
1281 pm8001_ha->ccb_info[i].ccb_tag = PM8001_INVALID_TAG; in pm8001_init_ccb_tag()
1282 pm8001_ha->ccb_info[i].device = NULL; in pm8001_init_ccb_tag()
1288 kfree(pm8001_ha->devices); in pm8001_init_ccb_tag()
1290 return -ENOMEM; in pm8001_init_ccb_tag()
1296 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_pci_remove()
1300 sas_remove_host(pm8001_ha->shost); in pm8001_pci_remove()
1301 list_del(&pm8001_ha->list); in pm8001_pci_remove()
1302 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_remove()
1303 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_remove()
1307 scsi_host_put(pm8001_ha->shost); in pm8001_pci_remove()
1309 for (i = 0; i < pm8001_ha->ccb_count; i++) { in pm8001_pci_remove()
1310 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_pci_remove()
1312 pm8001_ha->ccb_info[i].buf_prd, in pm8001_pci_remove()
1313 pm8001_ha->ccb_info[i].ccb_dma_handle); in pm8001_pci_remove()
1315 kfree(pm8001_ha->ccb_info); in pm8001_pci_remove()
1316 kfree(pm8001_ha->devices); in pm8001_pci_remove()
1319 kfree(sha->sas_phy); in pm8001_pci_remove()
1320 kfree(sha->sas_port); in pm8001_pci_remove()
1327 * pm8001_pci_suspend - power management suspend main entry point
1336 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_pci_suspend()
1340 scsi_block_requests(pm8001_ha->shost); in pm8001_pci_suspend()
1341 if (!pdev->pm_cap) { in pm8001_pci_suspend()
1343 return -ENODEV; in pm8001_pci_suspend()
1345 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_suspend()
1346 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_suspend()
1353 pm8001_ha->name); in pm8001_pci_suspend()
1358 * pm8001_pci_resume - power management resume main entry point
1372 pm8001_ha = sha->lldd_ha; in pm8001_pci_resume()
1376 pdev, pm8001_ha->name, pdev->current_state); in pm8001_pci_resume()
1383 if (pm8001_ha->chip_id == chip_8001) { in pm8001_pci_resume()
1384 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_resume()
1387 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); in pm8001_pci_resume()
1392 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_resume()
1400 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); in pm8001_pci_resume()
1401 if (pm8001_ha->chip_id != chip_8001) { in pm8001_pci_resume()
1402 for (i = 1; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_resume()
1403 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); in pm8001_pci_resume()
1411 if (pm8001_ha->chip_id == chip_8070 || in pm8001_pci_resume()
1412 pm8001_ha->chip_id == chip_8072) { in pm8001_pci_resume()
1418 pm8001_ha->flags = PM8001F_RUN_TIME; in pm8001_pci_resume()
1419 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_pci_resume()
1420 pm8001_ha->phy[i].enable_completion = &completion; in pm8001_pci_resume()
1421 PM8001_CHIP_DISP->phy_start_req(pm8001_ha, i); in pm8001_pci_resume()
1428 scsi_remove_host(pm8001_ha->shost); in pm8001_pci_resume()
1525 * pm8001_init - initialize scsi transport template
1529 int rc = -ENOMEM; in pm8001_init()
1570 "PMC-Sierra PM8001/8006/8081/8088/8089/8074/8076/8077/8070/8072 "