scsi/pm8001/pm8001_hwi.h

66 #define OPC_INB_SMP_ABORT			20	/* 0x014 */
103 #define OPC_OUB_FW_FLASH_UPDATE			20	/* 0x014 */
150  * brief the data structure of PHY Start Command
162  * brief the data structure of PHY Start Command
213  * brief the data structure of SATA Completion Response
225  * brief the data structure of SAS HW Event Notification
238  * brief the data structure of  REGISTER DEVICE Command
254  * brief the data structure of  DEREGISTER DEVICE Command
267  * brief the data structure of DEVICE_REGISTRATION Response
280  * brief the data structure of Local PHY Control Command
291  * brief the data structure of Local Phy Control Response
306  * brief the data structure of PORT Control Command
320  * brief the data structure of HW Event Ack Command
334  * brief the data structure of SSP Completion Response
350  * brief the data structure of SATA EVNET esponse
363  * brief the data structure of SSP EVNET esponse
376  * brief the data structure of General Event Notification Response
389  * brief the data structure of SMP Request Command
415  * brief the data structure of SMP Completion Response
426  *brief the data structure of SSP SMP SATA Abort Command
438  * brief the data structure of SSP SATA SMP Abort Response
450  * brief the data structure of SAS Diagnostic Start/End Command
461  * brief the data structure of SAS Diagnostic Execute Command
479  * brief the data structure of Set Device State Command
490  * brief the data structure of sas_re_initialization
510  * brief the data structure of SATA Start Command
529  * brief the data structure of SSP INI TM Start Command
559  * brief the data structure of SSP INI IO Start Command
576  * brief the data structure of Firmware download
594  * brief the data structure of FW_FLASH_UPDATE Response
606  * brief the data structure of Get NVM Data Command
645  * brief the data structure of Get NVMD Data Response
657  * brief the data structure of SAS Diagnostic Start/End Response
669  * brief the data structure of SAS Diagnostic Execute Response
683  * brief the data structure of Set Device State Response