Lines Matching +full:9 +full:- +full:series
1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
24 #define MYRB_BLKSIZE_BITS 9
164 unsigned int rsvd1:24; /* Bytes 1-3 */
165 unsigned int ldev_sizes[32]; /* Bytes 4-131 */
166 unsigned short flash_age; /* Bytes 132-133 */
170 unsigned char rsvd2:6; /* Byte 134 Bits 2-7 */
189 unsigned short ev_seq; /* Bytes 142-143 */
191 unsigned int rsvd5:24; /* Bytes 145-147 */
196 unsigned char rsvd7:3; /* Byte 151 Bits 0-2 */
198 unsigned char rsvd8:4; /* Byte 151 Bits 4-7 */
203 } dead_drives[21]; /* Bytes 152-194 */
204 unsigned char rsvd9[62]; /* Bytes 195-255 */
237 } hw; /* Bytes 0-3 */
238 /* MajorVersion.MinorVersion-FirmwareType-TurnID */
244 } fw; /* Bytes 4-7 */
245 unsigned int rsvd1; /* Byte 8-11 */
254 unsigned int rsvd3; /* Bytes 20-23 */
255 unsigned int mem_size; /* Bytes 24-27 */
256 unsigned int cache_size; /* Bytes 28-31 */
257 unsigned int flash_size; /* Bytes 32-35 */
258 unsigned int nvram_size; /* Bytes 36-39 */
265 } __packed ram:3; /* Byte 40 Bits 0-2 */
271 } __packed ec:3; /* Byte 40 Bits 3-5 */
276 unsigned short clock_speed; /* Bytes 42-43 */
277 unsigned short mem_speed; /* Bytes 44-45 */
278 unsigned short hw_speed; /* Bytes 46-47 */
279 unsigned char rsvd5[12]; /* Bytes 48-59 */
280 unsigned short max_cmds; /* Bytes 60-61 */
281 unsigned short max_sge; /* Bytes 62-63 */
282 unsigned short max_drv_cmds; /* Bytes 64-65 */
283 unsigned short max_io_desc; /* Bytes 66-67 */
284 unsigned short max_sectors; /* Bytes 68-69 */
289 unsigned short min_freelines; /* Bytes 74-75 */
290 unsigned char rsvd8[8]; /* Bytes 76-83 */
292 unsigned char rsvd9[11]; /* Byte 85-95 */
293 unsigned short pdrv_block_size; /* Bytes 96-97 */
294 unsigned short ldev_block_size; /* Bytes 98-99 */
295 unsigned short max_blocks_per_cmd; /* Bytes 100-101 */
296 unsigned short block_factor; /* Bytes 102-103 */
297 unsigned short cacheline_size; /* Bytes 104-105 */
303 } __packed bus_width:2; /* Byte 106 Bits 0-1 */
308 } __packed bus_speed:2; /* Byte 106 Bits 2-3 */
310 unsigned char rsvd10:3; /* Byte 106 Bits 5-7 */
312 unsigned char rsvd11[5]; /* Byte 107-111 */
313 unsigned short fw_build; /* Bytes 112-113 */
328 unsigned int rsvd13:28; /* Bytes 116-119 */
330 unsigned char rsvd14[8]; /* Bytes 120-127 */
361 unsigned int size; /* Bytes 0-3 */
363 unsigned int raid_level:7; /* Byte 5 Bits 0-6 */
365 unsigned int rsvd:16; /* Bytes 6-7 */
379 unsigned char target:5; /* Byte 2 Bits 0-4 */
380 unsigned char channel:3; /* Byte 2 Bits 5-7 */
381 unsigned char lun:6; /* Byte 3 Bits 0-5 */
382 unsigned char rsvd1:2; /* Byte 3 Bits 6-7 */
383 unsigned short seq_num; /* Bytes 4-5 */
384 unsigned char sense[26]; /* Bytes 6-31 */
394 unsigned int :7; /* Byte 0 Bits 1-7 */
400 } __packed devtype:2; /* Byte 1 Bits 0-1 */
410 unsigned int sync_offset:5; /* Byte 5 Bits 0-4 */
411 unsigned int rsvd3:3; /* Byte 5 Bits 5-7 */
412 unsigned int size; /* Bytes 6-9 */
413 unsigned int rsvd4:16; /* Bytes 10-11 */
420 unsigned int ldev_num; /* Bytes 0-3 */
421 unsigned int ldev_size; /* Bytes 4-7 */
422 unsigned int blocks_left; /* Bytes 8-11 */
429 unsigned int ldev_size; /* Bytes 0-3 */
430 unsigned int blocks_done; /* Bytes 4-7 */
431 unsigned char rsvd1[12]; /* Bytes 8-19 */
432 unsigned int ldev_num; /* Bytes 20-23 */
441 unsigned char rsvd2[6]; /* Bytes 26-31 */
460 unsigned rsvd2:5; /* Byte 0 Bits 2-6 */
465 unsigned rsvd3:2; /* Byte 1 Bits 3-4 */
483 unsigned rsvd5:2; /* Byte 7 Bits 2-3 */
489 unsigned char rsvd7; /* Byte 9 */
498 } __packed speed:2; /* Byte 11 Bits 0-1 */
501 unsigned rsvd8:3; /* Byte 11 Bits 4-6 */
503 } __packed channelparam[6]; /* Bytes 12-17 */
512 unsigned char rsvd10[29]; /* Bytes 23-51 */
515 unsigned rsvd11:3; /* Byte 52 Bits 2-4 */
521 } __packed drive_geometry:2; /* Byte 52 Bits 5-6 */
523 unsigned char rsvd13[9]; /* Bytes 53-61 */
524 unsigned short csum; /* Bytes 62-63 */
531 unsigned target:4; /* Byte 0 Bits 0-3 */
532 unsigned channel:4; /* Byte 0 Bits 4-7 */
538 } __packed data_xfer:2; /* Byte 1 Bits 0-1 */
546 } __packed timeout:2; /* Byte 1 Bits 4-5 */
549 unsigned short xfer_len_lo; /* Bytes 2-3 */
550 u32 dma_addr; /* Bytes 4-7 */
551 unsigned char cdb_len:4; /* Byte 8 Bits 0-3 */
552 unsigned char xfer_len_hi4:4; /* Byte 8 Bits 4-7 */
553 unsigned char sense_len; /* Byte 9 */
554 unsigned char cdb[12]; /* Bytes 10-21 */
555 unsigned char sense[64]; /* Bytes 22-85 */
565 u32 sge_addr; /* Bytes 0-3 */
566 u32 sge_count; /* Bytes 4-7 */
571 * Bytes 13-15 are not used. The structure is padded to 16 bytes for
575 unsigned int words[4]; /* Words 0-3 */
576 unsigned char bytes[16]; /* Bytes 0-15 */
580 unsigned char rsvd[14]; /* Bytes 2-15 */
585 unsigned char rsvd1[6]; /* Bytes 2-7 */
586 u32 addr; /* Bytes 8-11 */
587 unsigned char rsvd2[4]; /* Bytes 12-15 */
593 unsigned char rsvd1[5]; /* Bytes 3-7 */
594 u32 addr; /* Bytes 8-11 */
595 unsigned char rsvd2[4]; /* Bytes 12-15 */
600 unsigned char rsvd1[5]; /* Bytes 2-6 */
601 unsigned char ldev_num:6; /* Byte 7 Bits 0-6 */
603 unsigned char rsvd2[8]; /* Bytes 8-15 */
611 unsigned char rsvd1[3]; /* Bytes 5-7 */
612 u32 addr; /* Bytes 8-11 */
613 unsigned char rsvd2[4]; /* Bytes 12-15 */
620 unsigned short ev_seq; /* Bytes 4-5 */
621 unsigned char rsvd1[2]; /* Bytes 6-7 */
622 u32 addr; /* Bytes 8-11 */
623 unsigned char rsvd2[4]; /* Bytes 12-15 */
628 unsigned char rsvd1[2]; /* Bytes 2-3 */
630 unsigned char rsvd2[3]; /* Bytes 5-7 */
631 u32 addr; /* Bytes 8-11 */
632 unsigned char rsvd3[4]; /* Bytes 12-15 */
637 unsigned short xfer_len; /* Bytes 2-3 */
638 unsigned int lba; /* Bytes 4-7 */
639 u32 addr; /* Bytes 8-11 */
641 unsigned char rsvd[3]; /* Bytes 13-15 */
647 unsigned short xfer_len:11; /* Bytes 2-3 */
648 unsigned char ldev_num:5; /* Byte 3 Bits 3-7 */
650 unsigned int lba; /* Bytes 4-7 */
651 u32 addr; /* Bytes 8-11 */
652 unsigned char sg_count:6; /* Byte 12 Bits 0-5 */
658 } __packed sg_type:2; /* Byte 12 Bits 6-7 */
659 unsigned char rsvd[3]; /* Bytes 13-15 */
666 u32 cmd_mbox_addr; /* Bytes 4-7 */
667 u32 stat_mbox_addr; /* Bytes 8-11 */
668 unsigned char rsvd2[4]; /* Bytes 12-15 */
677 unsigned char rsvd:7; /* Byte 1 Bits 0-6 */
679 unsigned short status; /* Bytes 2-3 */
776 * DAC960 LA Series Controller Interface Register Offsets.
803 * DAC960 LA Series Inbound Door Bell Register.
815 * DAC960 LA Series Outbound Door Bell Register.
823 * DAC960 LA Series Interrupt Mask Register.
828 * DAC960 LA Series Error Status Register.
833 * DAC960 PG Series Controller Interface Register Offsets.
860 * DAC960 PG Series Inbound Door Bell Register.
872 * DAC960 PG Series Outbound Door Bell Register.
880 * DAC960 PG Series Interrupt Mask Register.
887 * DAC960 PG Series Error Status Register.
892 * DAC960 PD Series Controller Interface Register Offsets.
919 * DAC960 PD Series Inbound Door Bell Register.
930 * DAC960 PD Series Outbound Door Bell Register.
936 * DAC960 PD Series Interrupt Enable Register.
941 * DAC960 PD Series Error Status Register.