Lines Matching +full:3 +full:gbps

72 					 /* ports 1-3 follow after this */
79 					 /* ports 1-3 follow after this */
84 					 /* ports 1-3 follow after this */
91 					 /* phys 1-3 follow after this */
94 					 /* phys 1-3 follow after this */
123 	VSR_PHY_MODE11		= 0x0B * 4, /* Event Counter 3 */
144 	MVS_IRQ_COM_IN_I2O_IOP3        = (1 << 3),
180 		 * bit 2: 6Gbps support
181 		 * bit 1: 3Gbps support
182 		 * bit 0: 1.5Gbps support
184 		u32 speed_support:3;
188 		 * bit 5: G1 (1.5Gbps) Without SSC
189 		 * bit 4: G1 (1.5Gbps) with SSC
190 		 * bit 3: G2 (3.0Gbps) Without SSC
191 		 * bit 2: G2 (3.0Gbps) with SSC
192 		 * bit 1: G3 (6.0Gbps) without SSC
193 		 * bit 0: G3 (6.0Gbps) with SSC
196 		/* 8h: 1.5Gbps 9h: 3Gbps Ah: 6Gbps */
237 	MVS_SGPIO_CFG0_INVSCLK	= (1 << 3),	/* invert signal? */
273 	MVS_SGPIO_DCTRL_LOC_SHIFT	= 3,
281 	LED_BLINKA_INV	= 3,
289 				MVS_SGPIO_DCTRL_ACT_SHIFT) << (8 * 3) | \