Lines Matching +full:cdr +full:- +full:mode

1 /* SPDX-License-Identifier: GPL-2.0-only */
7  * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
17 /* enhanced mode registers (BAR4) */
53 					 /* ports 1-3 follow after this */
56 					 /* ports 5-7 follow after this */
60 					 /* ports 1-3 follow after this */
62 					 /* ports 5-7 follow after this */
68 					 /* ports 1-3 follow after this */
71 					 /* ports 5-7 follow after this */
75 					 /* ports 1-3 follow after this */
78 					 /* ports 5-7 follow after this */
98 	VSR_PHY_MODE6		= 0x06, /* CDR */
103 	VSR_PHY_MODE11		= 0x0B, /* Phy Mode */
119 	__le64			addr;		/* 64-bit buffer address */
121 	__le32			len;		/* 16-bit length */