1028 	u8 pgsz = tgt_dev->dev_spec.pcie_inf.pgsz ? : MPI3MR_DEFAULT_PGSZEXP;  in mpi3mr_configure_nvme_dev()
1030 	lim->max_hw_sectors = tgt_dev->dev_spec.pcie_inf.mdts / 512;  in mpi3mr_configure_nvme_dev()
1038 	    (tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_configure_tgt_dev()
1221 		tgtdev->dev_spec.sas_sata_inf.dev_info = dev_info;  in mpi3mr_update_tgtdev()
1222 		tgtdev->dev_spec.sas_sata_inf.sas_address =  in mpi3mr_update_tgtdev()
1224 		tgtdev->dev_spec.sas_sata_inf.phy_id = sasinf->phy_num;  in mpi3mr_update_tgtdev()
1225 		tgtdev->dev_spec.sas_sata_inf.attached_phy_id =  in mpi3mr_update_tgtdev()
1240 		if (tgtdev->dev_spec.sas_sata_inf.hba_port)  in mpi3mr_update_tgtdev()
1241 			tgtdev->dev_spec.sas_sata_inf.hba_port->port_id =  in mpi3mr_update_tgtdev()
1251 		tgtdev->dev_spec.pcie_inf.dev_info = dev_info;  in mpi3mr_update_tgtdev()
1252 		tgtdev->dev_spec.pcie_inf.capb =  in mpi3mr_update_tgtdev()
1254 		tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS;  in mpi3mr_update_tgtdev()
1256 		tgtdev->dev_spec.pcie_inf.pgsz = 12;  in mpi3mr_update_tgtdev()
1258 			tgtdev->dev_spec.pcie_inf.mdts =  in mpi3mr_update_tgtdev()
1260 			tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size;  in mpi3mr_update_tgtdev()
1261 			tgtdev->dev_spec.pcie_inf.reset_to =  in mpi3mr_update_tgtdev()
1264 			tgtdev->dev_spec.pcie_inf.abort_to =  in mpi3mr_update_tgtdev()
1268 		if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024))  in mpi3mr_update_tgtdev()
1269 			tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024);  in mpi3mr_update_tgtdev()
1296 		tgtdev->dev_spec.vd_inf.state = vdinf->vd_state;  in mpi3mr_update_tgtdev()
1300 		tgtdev->dev_spec.vd_inf.tg_id = vdinf_io_throttle_group;  in mpi3mr_update_tgtdev()
1301 		tgtdev->dev_spec.vd_inf.tg_high =  in mpi3mr_update_tgtdev()
1303 		tgtdev->dev_spec.vd_inf.tg_low =  in mpi3mr_update_tgtdev()
1308 			tg->high = tgtdev->dev_spec.vd_inf.tg_high;  in mpi3mr_update_tgtdev()
1309 			tg->low = tgtdev->dev_spec.vd_inf.tg_low;  in mpi3mr_update_tgtdev()
1311 			    tgtdev->dev_spec.vd_inf.tg_qd_reduction;  in mpi3mr_update_tgtdev()
1316 		tgtdev->dev_spec.vd_inf.tg = tg;  in mpi3mr_update_tgtdev()
3856 		if (cmd_priv && tgtdev->dev_spec.pcie_inf.abort_to)  in mpi3mr_issue_tm()
3857 			timeout = tgtdev->dev_spec.pcie_inf.abort_to;  in mpi3mr_issue_tm()
3858 		else if (!cmd_priv && tgtdev->dev_spec.pcie_inf.reset_to)  in mpi3mr_issue_tm()
3859 			timeout = tgtdev->dev_spec.pcie_inf.reset_to;  in mpi3mr_issue_tm()
4698 			    ((tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_target_alloc()
4701 			    ((tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_target_alloc()
4708 				scsi_tgt_priv_data->throttle_group = tgt_dev->dev_spec.vd_inf.tg;  in mpi3mr_target_alloc()