Lines Matching +full:smp +full:- +full:offset
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
299 /* OFFSET 0x18 */
303 /* OFFSET 0x1C */
306 /* OFFSET 0x20 */
315 /* OFFSET 0x24 */
318 /* OFFSET 0x28 */
322 /* OFFSET 0x2C */
327 * struct stp_task_context - This is the SCU hardware definition for an STP
333 /* OFFSET 0x18 */
341 /* OFFSET 0x1C */
344 /* OFFSET 0x20 */
347 /* OFFSET 0x24 */
350 /* OFFSET 0x28 */
354 /* OFFSET 0x2C */
359 * struct smp_task_context - This is the SCU hardware definition for an SMP
365 /* OFFSET 0x18 */
371 /* OFFSET 0x1C */
375 /* OFFSET 0x20 */
378 /* OFFSET 0x24 */
381 /* OFFSET 0x28 */
384 /* OFFSET 0x2C */
389 * struct primitive_task_context - This is the SCU hardware definition used
395 /* OFFSET 0x18 */
401 /* OFFSET 0x1C */
407 /* OFFSET 0x20 */
410 /* OFFSET 0x24 */
413 /* OFFSET 0x28 */
416 /* OFFSET 0x2C */
429 struct smp_task_context smp; member
435 * struct scu_sgl_element - This structure represents a single SCU defined SGL
469 * struct scu_sgl_element_pair - This structure is the SCU hardware definition
477 /* OFFSET 0x60-0x68 */
483 /* OFFSET 0x6C-0x74 */
489 /* OFFSET 0x78-0x7C */
505 * struct transport_snapshot - This structure is the SCU hardware scratch area
512 /* OFFSET 0x48 */
515 /* OFFSET 0x4C */
518 /* OFFSET 0x50 */
522 /* OFFSET 0x54 */
525 /* OFFSET 0x58 */
531 * struct scu_task_context - This structure defines the contents of the SCU
538 /* OFFSET 0x00 ------ */
541 * - SCU_TASK_PRIORITY_NORMAL
542 * - SCU_TASK_PRIORITY_HEAD_OF_Q
543 * - SCU_TASK_PRIORITY_HIGH
560 * This field muse be programed when generating an SMP response since the SMP
561 * connection remains open until the SMP response is generated.
572 * - SCU_TASK_CONTEXT_PROTOCOL_SMP
573 * - SCU_TASK_CONTEXT_PROTOCOL_SSP
574 * - SCU_TASK_CONTEXT_PROTOCOL_STP
575 * - SCU_TASK_CONTEXT_PROTOCOL_NONE
605 /* OFFSET 0x04 */
619 * - SCU_SATA_WRITE_DATA_DIRECTION
620 * - SCU_SATA_READ_DATA_DIRECTION
626 * - SCU_COMMAND_CODE_INITIATOR_NEW_TASK
627 * - SCU_COMMAND_CODE_ACTIVE_TASK
628 * - SCU_COMMAND_CODE_PRIMITIVE_SEQ_TASK
629 * - SCU_COMMAND_CODE_TARGET_RAW_FRAMES
635 * This bit is only valid for SSP & SMP target devices.
643 * - SCU_TASK_TYPE_IOREAD
644 * - SCU_TASK_TYPE_IOWRITE
645 * - SCU_TASK_TYPE_SMP_REQUEST
646 * - SCU_TASK_TYPE_RESPONSE
647 * - SCU_TASK_TYPE_RAW_FRAME
648 * - SCU_TASK_TYPE_PRIMITIVE
651 * - SCU_TASK_TYPE_DMA_IN
652 * - SCU_TASK_TYPE_FPDMAQ_READ
653 * - SCU_TASK_TYPE_PACKET_DMA_IN
654 * - SCU_TASK_TYPE_SATA_RAW_FRAME
655 * - SCU_TASK_TYPE_DMA_OUT
656 * - SCU_TASK_TYPE_FPDMAQ_WRITE
657 * - SCU_TASK_TYPE_PACKET_DMA_OUT
661 /* OFFSET 0x08 */
722 /* OFFSET 0x0C */
730 * @todo What we support mirrored SMP response frame?
751 /* OFFSET 0x10 */
775 /* OFFSET 0x14 */
786 /* OFFSET 0x18-0x2C */
792 /* OFFSET 0x30-0x34 */
805 /* OFFSET 0x38-0x3C */
818 /* OFFSET 0x40 */
837 * This field is set the maximum number of retries for a STP non-data FIS
849 * - 0x00 The entire IO
850 * - 0x01 32k
851 * - 0x02 64k
852 * - 0x04 128k
853 * - 0x08 256k
862 /* OFFSET 0x44 */
865 /* OFFSET 0x48-0x58 */
868 /* OFFSET 0x5C */
878 /* OFFSET 0x60-0x7C */
883 /* OFFSET 0x80-0x9C */
889 /* OFFSET 0xA0-BC */
892 /* OFFSET 0xC0 */
895 /* OFFSET 0xC4-0xCC */
898 /* OFFSET 0xD0 */
902 /* OFFSET 0xD4 */
906 /* OFFSET 0xD8 */
909 /* OFFSET 0xDC */
915 /* OFFSET 0xE0 */
920 /* OFFSET 0xE4 */
943 /* OFFSET 0xE8 */
947 /* OFFSET 0xEC */
950 /* OFFSET 0xF0 */
954 /* OFFSET 0xF4 */
957 /* OFFSET 0xF8 */
960 /* OFFSET 0xFC */