Lines Matching refs:EXSI_REG_BASE_ADR
1789 #define EXSI_REG_BASE_ADR REG_BASE_ADDR_EXSI macro
1791 #define EXSICNFGR (EXSI_REG_BASE_ADR + 0x00)
1812 #define EXSICNTRLR (EXSI_REG_BASE_ADR + 0x04)
1817 #define PMSTATR (EXSI_REG_BASE_ADR + 0x10)
1823 #define FLCNFGR (EXSI_REG_BASE_ADR + 0x14)
1835 #define SRCNFGR (EXSI_REG_BASE_ADR + 0x18)
1848 #define NVCNFGR (EXSI_REG_BASE_ADR + 0x1C)
1860 #define XRCNFGR (EXSI_REG_BASE_ADR + 0x20)
1872 #define XREGADDR (EXSI_REG_BASE_ADR + 0x24)
1878 #define XREGDATAR (EXSI_REG_BASE_ADR + 0x28)
1882 #define GPIOOER (EXSI_REG_BASE_ADR + 0x40)
1884 #define GPIOODENR (EXSI_REG_BASE_ADR + 0x44)
1886 #define GPIOINVR (EXSI_REG_BASE_ADR + 0x48)
1888 #define GPIODATAOR (EXSI_REG_BASE_ADR + 0x4C)
1890 #define GPIODATAIR (EXSI_REG_BASE_ADR + 0x50)
1892 #define GPIOCNFGR (EXSI_REG_BASE_ADR + 0x54)
1896 #define SCNTRLR (EXSI_REG_BASE_ADR + 0xA0)
1904 #define SRATER (EXSI_REG_BASE_ADR + 0xA4)
1906 #define SADDRR (EXSI_REG_BASE_ADR + 0xA8)
1910 #define SDATAOR (EXSI_REG_BASE_ADR + 0xAC)
1912 #define SDATAOR0 (EXSI_REG_BASE_ADR + 0xAC)
1913 #define SDATAOR1 (EXSI_REG_BASE_ADR + 0xAD)
1914 #define SDATAOR2 (EXSI_REG_BASE_ADR + 0xAE)
1915 #define SDATAOR3 (EXSI_REG_BASE_ADR + 0xAF)
1917 #define SDATAIR (EXSI_REG_BASE_ADR + 0xB0)
1919 #define SDATAIR0 (EXSI_REG_BASE_ADR + 0xB0)
1920 #define SDATAIR1 (EXSI_REG_BASE_ADR + 0xB1)
1921 #define SDATAIR2 (EXSI_REG_BASE_ADR + 0xB2)
1922 #define SDATAIR3 (EXSI_REG_BASE_ADR + 0xB3)
1924 #define ASISTAT0R (EXSI_REG_BASE_ADR + 0xD0)
1929 #define ASISTAT1R (EXSI_REG_BASE_ADR + 0xD4)
1932 #define ASIERRADDR (EXSI_REG_BASE_ADR + 0xD8)
1933 #define ASIERRDATAR (EXSI_REG_BASE_ADR + 0xDC)
1934 #define ASIERRSTATR (EXSI_REG_BASE_ADR + 0xE0)