Lines Matching +full:0 +full:xb8002000

16 #define AIC9410_DEV_REV_B0            0x8
19 #define REG_BASE_ADDR                 0xB8000000
20 #define REG_BASE_ADDR_CSEQCIO         0xB8002000
21 #define REG_BASE_ADDR_EXSI            0xB8042800
23 #define MBAR0_SWA_SIZE                0x58
25 #define MBAR0_SWC_SIZE                0x8
28 #define OCM_BASE_ADDR                 0xA0000000
29 #define OCM_MAX_SIZE                  0x20000
37 #define PCI_CONF_MBAR1                0x6C
38 #define PCI_CONF_MBAR0_SWA            0x70
39 #define PCI_CONF_MBAR0_SWB            0x74
40 #define PCI_CONF_MBAR0_SWC            0x78
41 #define PCI_CONF_MBAR_KEY             0x7C
42 #define PCI_CONF_FLSH_BAR             0xB8
108 					     offs) & 0xFF;  in asd_ddbsite_read_byte()
132 		rval = (val << 8) | (rval & 0xFF);  in asd_ddbsite_write_byte()
134 		rval = (rval & 0xFF00) | val;  in asd_ddbsite_write_byte()
161 					     offs) & 0xFF;  in asd_scbsite_read_byte()
185 		rval = (val << 8) | (rval & 0xFF);  in asd_scbsite_write_byte()
187 		rval = (rval & 0xFF00) | val;  in asd_scbsite_write_byte()
203  * Return 0 on success; -EFAULT on parity error; -EAGAIN if the old value
222 		return 0;	  /* success */  in asd_ddbsite_update_word()
237 		nval = (_newval << 8) | (nval & 0xFF);  in asd_ddbsite_update_byte()
238 		oval = (_oldval << 8) | (nval & 0xFF);  in asd_ddbsite_update_byte()
240 		if ((nval & 0xFF) != _oldval)  in asd_ddbsite_update_byte()
242 		nval = (nval & 0xFF00) | _newval;  in asd_ddbsite_update_byte()
243 		oval = (nval & 0xFF00) | _oldval;  in asd_ddbsite_update_byte()
257 	/* DCHREVISION returns 0, possibly broken */  in asd_get_cmdctx_size()
258 	u32 ctxmemsize = asd_read_reg_dword(asd_ha, LmMnINT(0,0)) & CTXMEMSIZE;  in asd_get_cmdctx_size()
264 	u32 ctxmemsize = asd_read_reg_dword(asd_ha, LmMnINT(0,0)) & CTXMEMSIZE;  in asd_get_devctx_size()