Lines Matching +full:0 +full:x00100
60 #define FALSE 0
63 #define ALL_CHANNELS '\0'
64 #define ALL_TARGETS_MASK 0xFFFF
65 #define INITIATOR_WILDCARD (~0)
66 #define SCB_LIST_NULL 0xFF00
68 #define QOUTFIFO_ENTRY_VALID 0x80
69 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
76 #define SCB_IS_SCSIBUS_B(ahd, scb) (0)
88 (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb)))
91 ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \
92 && (((scb)->flags & SCB_SILENT) != 0))
95 (((scb)->flags & SCB_SILENT) != 0)
114 #define AHD_TMODE_ENABLE 0
127 } while (0)
133 } while (0)
135 #define AHD_NEVER_COL_IDX 0xFFFF
155 #define AHD_MAXTRANSFER_SIZE 0x00ffffff /* limited by 24bit counter */
199 AHD_NONE = 0x0000,
200 AHD_CHIPID_MASK = 0x00FF,
201 AHD_AIC7901 = 0x0001,
202 AHD_AIC7902 = 0x0002,
203 AHD_AIC7901A = 0x0003,
204 AHD_PCI = 0x0100, /* Bus type PCI */
205 AHD_PCIX = 0x0200, /* Bus type PCIX */
206 AHD_BUS_MASK = 0x0F00
213 AHD_FENONE = 0x00000,
214 AHD_WIDE = 0x00001,/* Wide Channel */
215 AHD_AIC79XXB_SLOWCRC = 0x00002,/* SLOWCRC bit should be set */
216 AHD_MULTI_FUNC = 0x00100,/* Multi-Function/Channel Device */
217 AHD_TARGETMODE = 0x01000,/* Has tested target mode support */
218 AHD_MULTIROLE = 0x02000,/* Space for two roles at a time */
219 AHD_RTI = 0x04000,/* Retained Training Support */
220 AHD_NEW_IOCELL_OPTS = 0x08000,/* More Signal knobs in the IOCELL */
221 AHD_NEW_DFCNTRL_OPTS = 0x10000,/* SCSIENWRDIS bit */
222 AHD_FAST_CDB_DELIVERY = 0x20000,/* CDB acks released to Output Sync */
223 AHD_REMOVABLE = 0x00000,/* Hot-Swap supported - None so far*/
233 AHD_BUGNONE = 0x0000,
238 AHD_SENT_SCB_UPDATE_BUG = 0x0001,
240 AHD_ABORT_LQI_BUG = 0x0002,
242 AHD_PKT_BITBUCKET_BUG = 0x0004,
244 AHD_LONG_SETIMO_BUG = 0x0008,
246 AHD_NLQICRC_DELAYED_BUG = 0x0010,
248 AHD_SCSIRST_BUG = 0x0020,
250 AHD_PCIX_CHIPRST_BUG = 0x0040,
252 AHD_PCIX_MMAPIO_BUG = 0x0080,
254 AHD_PCIX_SCBRAM_RD_BUG = 0x0100,
263 AHD_LQO_ATNO_BUG = 0x0200,
265 AHD_AUTOFLUSH_BUG = 0x0400,
267 AHD_CLRLQO_AUTOCLR_BUG = 0x0800,
269 AHD_PKTIZED_STATUS_BUG = 0x1000,
271 AHD_PKT_LUN_BUG = 0x2000,
276 AHD_NONPACKFIFO_BUG = 0x4000,
284 AHD_MDFF_WSCBPTR_BUG = 0x8000,
286 AHD_REG_SLOW_SETTLE_BUG = 0x10000,
292 AHD_SET_MODE_BUG = 0x20000,
294 AHD_BUSFREEREV_BUG = 0x40000,
298 * sync factor 0x7, and the offset if off by a factor of 2.
300 AHD_PACED_NEGTABLE_BUG = 0x80000,
302 AHD_LQOOVERRUN_BUG = 0x100000,
307 AHD_INTCOLLISION_BUG = 0x200000,
317 AHD_EARLY_REQ_BUG = 0x400000,
321 AHD_FAINT_LED_BUG = 0x800000
330 AHD_FNONE = 0x00000,
331 AHD_BOOT_CHANNEL = 0x00001,/* We were set as the boot channel. */
332 AHD_USEDEFAULTS = 0x00004,/*
338 AHD_SEQUENCER_DEBUG = 0x00008,
339 AHD_RESET_BUS_A = 0x00010,
340 AHD_EXTENDED_TRANS_A = 0x00020,
341 AHD_TERM_ENB_A = 0x00040,
342 AHD_SPCHK_ENB_A = 0x00080,
343 AHD_STPWLEVEL_A = 0x00100,
344 AHD_INITIATORROLE = 0x00200,/*
348 AHD_TARGETROLE = 0x00400,/*
352 AHD_RESOURCE_SHORTAGE = 0x00800,
353 AHD_TQINFIFO_BLOCKED = 0x01000,/* Blocked waiting for ATIOs */
354 AHD_INT50_SPEEDFLEX = 0x02000,/*
358 AHD_BIOS_ENABLED = 0x04000,
359 AHD_ALL_INTERRUPTS = 0x08000,
360 AHD_39BIT_ADDRESSING = 0x10000,/* Use 39 bit addressing scheme. */
361 AHD_64BIT_ADDRESSING = 0x20000,/* Use 64 bit addressing scheme. */
362 AHD_CURRENT_SENSING = 0x40000,
363 AHD_SCB_CONFIG_USED = 0x80000,/* No SEEPROM but SCB had info. */
364 AHD_HP_BOARD = 0x100000,
365 AHD_BUS_RESET_ACTIVE = 0x200000,
366 AHD_UPDATE_PEND_CMDS = 0x400000,
367 AHD_RUNNING_QOUTFIFO = 0x800000,
368 AHD_HAD_FIRST_SEL = 0x1000000
444 /*0*/ union {
489 #define SG_PTR_MASK 0xFFFFFFF8
494 * Our Id (bits 0-3) Their ID (bits 4-7)
529 #define AHD_DMA_LAST_SEG 0x80000000
530 #define AHD_SG_HIGH_ADDR_MASK 0x7F000000
531 #define AHD_SG_LEN_MASK 0x00FFFFFF
551 SCB_FLAG_NONE = 0x00000,
552 SCB_TRANSMISSION_ERROR = 0x00001,/*
562 SCB_OTHERTCL_TIMEOUT = 0x00002,/*
570 SCB_DEVICE_RESET = 0x00004,
571 SCB_SENSE = 0x00008,
572 SCB_CDB32_PTR = 0x00010,
573 SCB_RECOVERY_SCB = 0x00020,
574 SCB_AUTO_NEGOTIATE = 0x00040,/* Negotiate to achieve goal. */
575 SCB_NEGOTIATE = 0x00080,/* Negotiation forced for command. */
576 SCB_ABORT = 0x00100,
577 SCB_ACTIVE = 0x00200,
578 SCB_TARGET_IMMEDIATE = 0x00400,
579 SCB_PACKETIZED = 0x00800,
580 SCB_EXPECT_PPR_BUSFREE = 0x01000,
581 SCB_PKT_SENSE = 0x02000,
582 SCB_EXTERNAL_RESET = 0x04000,/* Device was reset externally */
583 SCB_ON_COL_LIST = 0x08000,
584 SCB_SILENT = 0x10000 /*
679 * bytes terminated by 0xFF. The remainder
704 #define EVENT_TYPE_BUS_RESET 0xFF
729 #define AHD_TRANS_CUR 0x01 /* Modify current neogtiation status */
730 #define AHD_TRANS_ACTIVE 0x03 /* Assume this target is on the bus */
731 #define AHD_TRANS_GOAL 0x04 /* Modify negotiation goal */
732 #define AHD_TRANS_USER 0x08 /* Modify user negotiation settings */
733 #define AHD_PERIOD_10MHz 0x19
735 #define AHD_WIDTH_UNKNOWN 0xFF
736 #define AHD_PERIOD_UNKNOWN 0xFF
737 #define AHD_OFFSET_UNKNOWN 0xFF
738 #define AHD_PPR_OPTS_UNKNOWN 0xFF
782 #define AHD_SYNCRATE_160 0x8
783 #define AHD_SYNCRATE_PACED 0x8
784 #define AHD_SYNCRATE_DT 0x9
785 #define AHD_SYNCRATE_ULTRA2 0xa
786 #define AHD_SYNCRATE_ULTRA 0xc
787 #define AHD_SYNCRATE_FAST 0x19
789 #define AHD_SYNCRATE_SYNC 0x32
790 #define AHD_SYNCRATE_MIN 0x60
791 #define AHD_SYNCRATE_ASYNC 0xFF
795 #define AHD_ASYNC_XFER_PERIOD 0x44
804 #define AHD_SYNCRATE_REVA_120 0x8
805 #define AHD_SYNCRATE_REVA_160 0x7
824 uint16_t device_flags[16]; /* words 0-15 */
825 #define CFXFER 0x003F /* synchronous transfer rate */
826 #define CFXFER_ASYNC 0x3F
827 #define CFQAS 0x0040 /* Negotiate QAS */
828 #define CFPACKETIZED 0x0080 /* Negotiate Packetized Transfers */
829 #define CFSTART 0x0100 /* send start unit SCSI command */
830 #define CFINCBIOS 0x0200 /* include in BIOS scan */
831 #define CFDISC 0x0400 /* enable disconnection */
832 #define CFMULTILUNDEV 0x0800 /* Probe multiple luns in BIOS scan */
833 #define CFWIDEB 0x1000 /* wide bus device */
834 #define CFHOSTMANAGED 0x8000 /* Managed by a RAID controller */
840 #define CFSUPREM 0x0001 /* support all removeable drives */
841 #define CFSUPREMB 0x0002 /* support removeable boot drives */
842 #define CFBIOSSTATE 0x000C /* BIOS Action State */
843 #define CFBS_DISABLED 0x00
844 #define CFBS_ENABLED 0x04
845 #define CFBS_DISABLED_SCAN 0x08
846 #define CFENABLEDV 0x0010 /* Perform Domain Validation */
847 #define CFCTRL_A 0x0020 /* BIOS displays Ctrl-A message */
848 #define CFSPARITY 0x0040 /* SCSI parity */
849 #define CFEXTEND 0x0080 /* extended translation enabled */
850 #define CFBOOTCD 0x0100 /* Support Bootable CD-ROM */
851 #define CFMSG_LEVEL 0x0600 /* BIOS Message Level */
852 #define CFMSG_VERBOSE 0x0000
853 #define CFMSG_SILENT 0x0200
854 #define CFMSG_DIAG 0x0400
855 #define CFRESETB 0x0800 /* reset SCSI bus at boot */
856 /* UNUSED 0xf000 */
862 #define CFAUTOTERM 0x0001 /* Perform Auto termination */
863 #define CFSTERM 0x0002 /* SCSI low byte termination */
864 #define CFWSTERM 0x0004 /* SCSI high byte termination */
865 #define CFSEAUTOTERM 0x0008 /* Ultra2 Perform secondary Auto Term*/
866 #define CFSELOWTERM 0x0010 /* Ultra2 secondary low term */
867 #define CFSEHIGHTERM 0x0020 /* Ultra2 secondary high term */
868 #define CFSTPWLEVEL 0x0040 /* Termination level control */
869 #define CFBIOSAUTOTERM 0x0080 /* Perform Auto termination */
870 #define CFTERM_MENU 0x0100 /* BIOS displays termination menu */
871 #define CFCLUSTERENB 0x8000 /* Cluster Enable */
877 #define CFSCSIID 0x000f /* host adapter SCSI ID */
878 /* UNUSED 0x00f0 */
879 #define CFBRTIME 0xff00 /* bus release time/PCI Latency Time */
885 #define CFMAXTARG 0x00ff /* maximum targets */
886 #define CFBOOTLUN 0x0f00 /* Lun to boot from */
887 #define CFBOOTID 0xf000 /* Target to boot from */
890 #define CFSIGNATURE 0x400
899 #define VPDMASTERBIOS 0x0001
900 #define VPDBOOTHOST 0x0002
929 #define FLXADDR_TERMCTL 0x0
930 #define FLX_TERMCTL_ENSECHIGH 0x8
931 #define FLX_TERMCTL_ENSECLOW 0x4
932 #define FLX_TERMCTL_ENPRIHIGH 0x2
933 #define FLX_TERMCTL_ENPRILOW 0x1
934 #define FLXADDR_ROMSTAT_CURSENSECTL 0x1
935 #define FLX_ROMSTAT_SEECFG 0xF0
936 #define FLX_ROMSTAT_EECFG 0x0F
937 #define FLX_ROMSTAT_SEE_93C66 0x00
938 #define FLX_ROMSTAT_SEE_NONE 0xF0
939 #define FLX_ROMSTAT_EE_512x8 0x0
940 #define FLX_ROMSTAT_EE_1MBx8 0x1
941 #define FLX_ROMSTAT_EE_2MBx8 0x2
942 #define FLX_ROMSTAT_EE_4MBx8 0x3
943 #define FLX_ROMSTAT_EE_16MBx8 0x4
944 #define CURSENSE_ENB 0x1
945 #define FLXADDR_FLEXSTAT 0x2
946 #define FLX_FSTAT_BUSY 0x1
947 #define FLXADDR_CURRENT_STAT 0x4
948 #define FLX_CSTAT_SEC_HIGH 0xC0
949 #define FLX_CSTAT_SEC_LOW 0x30
950 #define FLX_CSTAT_PRI_HIGH 0x0C
951 #define FLX_CSTAT_PRI_LOW 0x03
952 #define FLX_CSTAT_MASK 0x03
954 #define FLX_CSTAT_OKAY 0x0
955 #define FLX_CSTAT_OVER 0x1
956 #define FLX_CSTAT_UNDER 0x2
957 #define FLX_CSTAT_INVALID 0x3
970 MSG_FLAG_NONE = 0x00,
971 MSG_FLAG_EXPECT_PPR_BUSFREE = 0x01,
972 MSG_FLAG_IU_REQ_CHANGED = 0x02,
973 MSG_FLAG_EXPECT_IDE_BUSFREE = 0x04,
974 MSG_FLAG_EXPECT_QASREJ_BUSFREE = 0x08,
975 MSG_FLAG_PACKETIZED = 0x10
979 MSG_TYPE_NONE = 0x00,
980 MSG_TYPE_INITIATOR_MSGOUT = 0x01,
981 MSG_TYPE_INITIATOR_MSGIN = 0x02,
982 MSG_TYPE_TARGET_MSGOUT = 0x03,
983 MSG_TYPE_TARGET_MSGIN = 0x04
1035 #define AHD_MK_MSK(x) (0x01 << (x))
1042 #define AHD_MODE_ANY_MSK (~0)
1262 } while (0)
1269 } while (0)
1276 } while (0)
1299 #define AHD_PCI_IOADDR0 PCIR_BAR(0) /* I/O BAR*/
1322 #define AHD_EISA_SLOT_OFFSET 0xc00
1323 #define AHD_EISA_IOSIZE 0x100
1430 #define AHD_TMODE_ENABLE 0
1436 #define AHD_SHOW_MISC 0x00001
1437 #define AHD_SHOW_SENSE 0x00002
1438 #define AHD_SHOW_RECOVERY 0x00004
1439 #define AHD_DUMP_SEEPROM 0x00008
1440 #define AHD_SHOW_TERMCTL 0x00010
1441 #define AHD_SHOW_MEMORY 0x00020
1442 #define AHD_SHOW_MESSAGES 0x00040
1443 #define AHD_SHOW_MODEPTR 0x00080
1444 #define AHD_SHOW_SELTO 0x00100
1445 #define AHD_SHOW_FIFOS 0x00200
1446 #define AHD_SHOW_QFULL 0x00400
1447 #define AHD_SHOW_DV 0x00800
1448 #define AHD_SHOW_MASKED_ERRORS 0x01000
1449 #define AHD_SHOW_QUEUE 0x02000
1450 #define AHD_SHOW_TQIN 0x04000
1451 #define AHD_SHOW_SG 0x08000
1452 #define AHD_SHOW_INT_COALESCING 0x10000
1453 #define AHD_DEBUG_SEQUENCER 0x20000