Lines Matching +full:0 +full:xf001

17 #define IPA_PDU_HEADER_SIZE	0x40
18 #define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
19 #define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
20 #define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
21 #define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
23 #define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
35 #define IPA_CMD_INITIATOR_HOST 0x00
36 #define IPA_CMD_INITIATOR_OSA 0x01
37 #define IPA_CMD_PRIM_VERSION_NO 0x01
83 #define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
86 QETH_LINK_TYPE_FAST_ETH = 0x01,
87 QETH_LINK_TYPE_HSTR = 0x02,
88 QETH_LINK_TYPE_GBIT_ETH = 0x03,
89 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
90 QETH_LINK_TYPE_25GBIT_ETH = 0x12,
91 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
92 QETH_LINK_TYPE_LANE_TR = 0x82,
93 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
94 QETH_LINK_TYPE_LANE = 0x88,
99 NO_ROUTER = 0,
109 IPA_CMD_STARTLAN = 0x01,
110 IPA_CMD_STOPLAN = 0x02,
111 IPA_CMD_SETVMAC = 0x21,
112 IPA_CMD_DELVMAC = 0x22,
113 IPA_CMD_SETGMAC = 0x23,
114 IPA_CMD_DELGMAC = 0x24,
115 IPA_CMD_SETVLAN = 0x25,
116 IPA_CMD_DELVLAN = 0x26,
117 IPA_CMD_VNICC = 0x2a,
118 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
119 IPA_CMD_SETIP = 0xb1,
120 IPA_CMD_QIPASSIST = 0xb2,
121 IPA_CMD_SETASSPARMS = 0xb3,
122 IPA_CMD_SETIPM = 0xb4,
123 IPA_CMD_DELIPM = 0xb5,
124 IPA_CMD_SETRTG = 0xb6,
125 IPA_CMD_DELIP = 0xb7,
126 IPA_CMD_SETADAPTERPARMS = 0xb8,
127 IPA_CMD_SET_DIAG_ASS = 0xb9,
128 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
129 IPA_CMD_CREATE_ADDR = 0xc3,
130 IPA_CMD_DESTROY_ADDR = 0xc4,
131 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
132 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
133 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
134 IPA_CMD_UNKNOWN = 0x00
138 IPA_CMD_ASS_START = 0x0001,
139 IPA_CMD_ASS_STOP = 0x0002,
140 IPA_CMD_ASS_CONFIGURE = 0x0003,
141 IPA_CMD_ASS_ENABLE = 0x0004,
145 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
146 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
147 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
148 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
149 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
150 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
151 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
159 IPA_RC_SUCCESS = 0x0000,
160 IPA_RC_NOTSUPP = 0x0001,
161 IPA_RC_IP_TABLE_FULL = 0x0002,
162 IPA_RC_UNKNOWN_ERROR = 0x0003,
163 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
164 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
165 IPA_RC_INVALID_FORMAT = 0x0006,
166 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
167 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
168 IPA_RC_DUP_IPV6_HOME = 0x0010,
169 IPA_RC_UNREGISTERED_ADDR = 0x0011,
170 IPA_RC_NO_ID_AVAILABLE = 0x0012,
171 IPA_RC_ID_NOT_FOUND = 0x0013,
172 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
173 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
174 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
175 IPA_RC_INVALID_IP_VERSION = 0x0020,
176 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
177 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
178 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
179 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
180 IPA_RC_L2_DUP_MAC = 0x2005,
181 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
182 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
183 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
184 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
185 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
186 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
187 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
188 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
189 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
190 IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050,
191 IPA_RC_VNICC_VNICBP = 0x20B0,
192 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
193 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
194 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
195 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
196 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
197 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
198 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
199 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
200 IPA_RC_DATA_MISMATCH = 0xe001,
201 IPA_RC_INVALID_MTU_SIZE = 0xe002,
202 IPA_RC_INVALID_LANTYPE = 0xe003,
203 IPA_RC_INVALID_LANNUM = 0xe004,
204 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
205 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
206 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
207 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
208 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
209 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
210 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
211 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
212 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
213 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
214 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
215 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
216 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
217 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
218 IPA_RC_LAN_OFFLINE = 0xe080,
219 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
220 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
221 IPA_RC_FFFF = 0xffff
224 #define IPA_RC_VNICC_OOSEQ 0x0005
236 IPA_ARP_PROCESSING = 0x00000001L,
237 IPA_INBOUND_CHECKSUM = 0x00000002L,
238 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
239 /* RESERVED = 0x00000008L,*/
240 IPA_FILTERING = 0x00000010L,
241 IPA_IPV6 = 0x00000020L,
242 IPA_MULTICASTING = 0x00000040L,
243 IPA_IP_REASSEMBLY = 0x00000080L,
244 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
245 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
246 IPA_SETADAPTERPARMS = 0x00000400L,
247 IPA_VLAN_PRIO = 0x00000800L,
248 IPA_PASSTHRU = 0x00001000L,
249 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
250 IPA_FULL_VLAN = 0x00004000L,
251 IPA_INBOUND_PASSTHRU = 0x00008000L,
252 IPA_SOURCE_MAC = 0x00010000L,
253 IPA_OSA_MC_ROUTER = 0x00020000L,
254 IPA_QUERY_ARP_ASSIST = 0x00040000L,
255 IPA_INBOUND_TSO = 0x00080000L,
256 IPA_OUTBOUND_TSO = 0x00100000L,
257 IPA_INBOUND_CHECKSUM_V6 = 0x00400000L,
258 IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L,
263 QETH_IPA_SETDELIP_DEFAULT = 0x00L, /* default */
264 QETH_IPA_SETIP_VIPA_FLAG = 0x01L, /* no grat. ARP */
265 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L, /* nofail on grat. ARP */
266 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
267 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
268 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
273 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
274 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
275 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
276 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
277 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
278 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
279 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
280 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
281 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
282 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
283 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
284 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
285 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
286 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
287 IPA_SETADP_QUERY_OAT = 0x00080000L,
288 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
291 CHANGE_ADDR_READ_MAC = 0,
298 CHANGE_ADDR_READ_ADDR = 0,
304 SET_PROMISC_MODE_OFF = 0,
308 ISOLATION_MODE_NONE = 0x00000000L,
309 ISOLATION_MODE_FWD = 0x00000001L,
310 ISOLATION_MODE_DROP = 0x00000002L,
313 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
314 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
315 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
316 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
317 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
318 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
319 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
320 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
321 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
324 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
325 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
326 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
327 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
328 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
329 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
332 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
333 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
336 CARD_INFO_PORTS_10M = 0x00000005,
337 CARD_INFO_PORTS_100M = 0x00000006,
338 CARD_INFO_PORTS_1G = 0x00000007,
339 CARD_INFO_PORTS_10G = 0x00000008,
340 CARD_INFO_PORTS_25G = 0x0000000A,
399 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
400 QETH_IPA_CHECKSUM_UDP = 0x0008,
401 QETH_IPA_CHECKSUM_TCP = 0x0010,
402 QETH_IPA_CHECKSUM_LP2LP = 0x0020
406 QETH_IPA_LARGE_SEND_TCP = 0x00000001,
479 #define QETH_QOAT_PHYS_SPEED_UNKNOWN 0x00
480 #define QETH_QOAT_PHYS_SPEED_10M_HALF 0x01
481 #define QETH_QOAT_PHYS_SPEED_10M_FULL 0x02
482 #define QETH_QOAT_PHYS_SPEED_100M_HALF 0x03
483 #define QETH_QOAT_PHYS_SPEED_100M_FULL 0x04
484 #define QETH_QOAT_PHYS_SPEED_1000M_HALF 0x05
485 #define QETH_QOAT_PHYS_SPEED_1000M_FULL 0x06
486 // n/a 0x07
487 #define QETH_QOAT_PHYS_SPEED_10G_FULL 0x08
488 // n/a 0x09
489 #define QETH_QOAT_PHYS_SPEED_25G_FULL 0x0A
491 #define QETH_QOAT_PHYS_MEDIA_COPPER 0x01
492 #define QETH_QOAT_PHYS_MEDIA_FIBRE_SHORT 0x02
493 #define QETH_QOAT_PHYS_MEDIA_FIBRE_LONG 0x04
502 #define QETH_QOAT_REPLY_TYPE_PHYS_IF 0x0004
512 #define QETH_QOAT_SCOPE_INTERFACE 0x00000001
534 #define QETH_SWITCH_FORW_802_1 0x00000001
535 #define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
536 #define QETH_SWITCH_CAP_RTE 0x00000004
537 #define QETH_SWITCH_CAP_ECP 0x00000008
538 #define QETH_SWITCH_CAP_VDP 0x00000010
549 #define QETH_SETADP_FLAGS_VIRTUAL_MAC 0x80 /* for CHANGE_ADDR_READ_MAC */
589 QETH_DIAGS_CMD_QUERY = 0x0001,
590 QETH_DIAGS_CMD_TRAP = 0x0002,
591 QETH_DIAGS_CMD_TRACE = 0x0004,
592 QETH_DIAGS_CMD_NOLOG = 0x0008,
593 QETH_DIAGS_CMD_DUMP = 0x0010,
597 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
601 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
602 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
603 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
604 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
605 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
609 QETH_DIAGS_TRAP_ARM = 0x01,
610 QETH_DIAGS_TRAP_DISARM = 0x02,
611 QETH_DIAGS_TRAP_CAPTURE = 0x04,
634 #define IPA_VNICC_QUERY_CHARS 0x00000000L
635 #define IPA_VNICC_QUERY_CMDS 0x00000001L
636 #define IPA_VNICC_ENABLE 0x00000002L
637 #define IPA_VNICC_DISABLE 0x00000004L
638 #define IPA_VNICC_SET_TIMEOUT 0x00000008L
639 #define IPA_VNICC_GET_TIMEOUT 0x00000010L
642 #define QETH_VNICC_FLOODING 0x80000000
643 #define QETH_VNICC_MCAST_FLOODING 0x40000000
644 #define QETH_VNICC_LEARNING 0x20000000
645 #define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000
646 #define QETH_VNICC_TAKEOVER_LEARNING 0x08000000
647 #define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000
648 #define QETH_VNICC_RX_BCAST 0x02000000
651 #define QETH_VNICC_ALL 0xff000000
696 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
697 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
698 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
699 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
700 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
701 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
770 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
771 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
772 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80, /* else addition */
857 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
858 QETH_IPA_ARP_RC_FAILED = 0x0001,
859 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
860 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
861 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
862 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
876 #define CM_ENABLE_SIZE 0x63
877 #define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
878 #define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
879 #define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
882 (PDU_ENCAPSULATION(buffer) + 0x13)
886 #define CM_SETUP_SIZE 0x64
887 #define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
888 #define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
889 #define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
892 (PDU_ENCAPSULATION(buffer) + 0x1a)
895 #define ULP_ENABLE_SIZE 0x6b
896 #define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
897 #define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
898 #define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
899 #define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
901 (PDU_ENCAPSULATION(buffer) + 0x13)
903 (PDU_ENCAPSULATION(buffer) + 0x1f)
905 (PDU_ENCAPSULATION(buffer) + 0x17)
907 (PDU_ENCAPSULATION(buffer) + 0x2b)
909 #define QETH_MPC_PROT_L2 0x08
910 #define QETH_MPC_PROT_L3 0x03
911 #define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
912 #define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
915 #define ULP_SETUP_SIZE 0x6c
916 #define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
917 #define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
918 #define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
919 #define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
920 #define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
923 (PDU_ENCAPSULATION(buffer) + 0x1a)
927 #define DM_ACT_SIZE 0x55
928 #define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
929 #define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
934 #define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
935 #define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
939 #define IDX_ACTIVATE_SIZE 0x22
940 #define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
941 #define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
942 #define QETH_IDX_ACT_INVAL_FRAME 0x40
943 #define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
944 #define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
945 #define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
946 #define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
947 #define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
948 #define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
949 #define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
950 #define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
951 #define QETH_IDX_ACT_ERR_EXCL 0x19
952 #define QETH_IDX_ACT_ERR_AUTH 0x1E
953 #define QETH_IDX_ACT_ERR_AUTH_USER 0x20
955 #define QETH_IDX_TERMINATE 0xc0
956 #define QETH_IDX_TERMINATE_MASK 0xc0
957 #define QETH_IDX_TERM_BAD_TRANSPORT 0x41
958 #define QETH_IDX_TERM_BAD_TRANSPORT_VM 0xf6
961 (buffer + *(buffer + (*(buffer + 0x0b)) + \
962 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
966 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))