140 	u16 isr;  member
408 	unsigned int isr = readl_relaxed(rtc->base + regs->isr);  in stm32_rtc_enter_init_mode()  local
410 	if (!(isr & STM32_RTC_ISR_INITF)) {  in stm32_rtc_enter_init_mode()
411 		isr |= STM32_RTC_ISR_INIT;  in stm32_rtc_enter_init_mode()
412 		writel_relaxed(isr, rtc->base + regs->isr);  in stm32_rtc_enter_init_mode()
420 		return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr, isr,  in stm32_rtc_enter_init_mode()
421 							 (isr & STM32_RTC_ISR_INITF),  in stm32_rtc_enter_init_mode()
431 	unsigned int isr = readl_relaxed(rtc->base + regs->isr);  in stm32_rtc_exit_init_mode()  local
433 	isr &= ~STM32_RTC_ISR_INIT;  in stm32_rtc_exit_init_mode()
434 	writel_relaxed(isr, rtc->base + regs->isr);  in stm32_rtc_exit_init_mode()
440 	unsigned int isr = readl_relaxed(rtc->base + regs->isr);  in stm32_rtc_wait_sync()  local
442 	isr &= ~STM32_RTC_ISR_RSF;  in stm32_rtc_wait_sync()
443 	writel_relaxed(isr, rtc->base + regs->isr);  in stm32_rtc_wait_sync()
449 	return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,  in stm32_rtc_wait_sync()
450 						 isr,  in stm32_rtc_wait_sync()
451 						 (isr & STM32_RTC_ISR_RSF),  in stm32_rtc_wait_sync()
729 	unsigned int cr, isr, alrmar;  in stm32_rtc_set_alarm()  local
767 	ret = readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,  in stm32_rtc_set_alarm()
768 						isr,  in stm32_rtc_set_alarm()
769 						(isr & STM32_RTC_ISR_ALRAWF),  in stm32_rtc_set_alarm()
801 	writel_relaxed(readl_relaxed(rtc->base + regs->isr) & ~flags,  in stm32_rtc_clear_events()
802 		       rtc->base + regs->isr);  in stm32_rtc_clear_events()
816 		.isr = 0x0C,
842 		.isr = 0x0C,
877 		.isr = 0x0C, /* named RTC_ICSR on stm32mp1 */
903 		.isr = 0x0C, /* named RTC_ICSR on stm32mp25 */
1197 	if (!(readl_relaxed(rtc->base + regs->isr) & STM32_RTC_ISR_INITS))  in stm32_rtc_probe()