1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Reset driver for the StarFive JH71X0 SoCs
12 #include <linux/reset-controller.h>
15 #include "reset-starfive-jh71x0.h"
19 	/* protect registers against concurrent read-modify-write */
37 	u32 mask = BIT(id % 32);  in jh71x0_reset_update()  local
38 	void __iomem *reg_assert = data->assert + offset * sizeof(u32);  in jh71x0_reset_update()
39 	void __iomem *reg_status = data->status + offset * sizeof(u32);  in jh71x0_reset_update()
40 	u32 done = data->asserted ? data->asserted[offset] & mask : 0;  in jh71x0_reset_update()
46 		done ^= mask;  in jh71x0_reset_update()
48 	spin_lock_irqsave(&data->lock, flags);  in jh71x0_reset_update()
52 		value |= mask;  in jh71x0_reset_update()
54 		value &= ~mask;  in jh71x0_reset_update()
58 	ret = readl_poll_timeout_atomic(reg_status, value, (value & mask) == done, 0, 1000);  in jh71x0_reset_update()
60 	spin_unlock_irqrestore(&data->lock, flags);  in jh71x0_reset_update()
93 	u32 mask = BIT(id % 32);  in jh71x0_reset_status()  local
94 	void __iomem *reg_status = data->status + offset * sizeof(u32);  in jh71x0_reset_status()
97 	if (!data->asserted)  in jh71x0_reset_status()
98 		return !(value & mask);  in jh71x0_reset_status()
100 	return !((value ^ data->asserted[offset]) & mask);  in jh71x0_reset_status()
106 	.reset		= jh71x0_reset_reset,
119 		return -ENOMEM;  in reset_starfive_jh71x0_register()
121 	data->rcdev.ops = &jh71x0_reset_ops;  in reset_starfive_jh71x0_register()
122 	data->rcdev.owner = owner;  in reset_starfive_jh71x0_register()
123 	data->rcdev.nr_resets = nr_resets;  in reset_starfive_jh71x0_register()
124 	data->rcdev.dev = dev;  in reset_starfive_jh71x0_register()
125 	data->rcdev.of_node = of_node;  in reset_starfive_jh71x0_register()
127 	spin_lock_init(&data->lock);  in reset_starfive_jh71x0_register()
128 	data->assert = assert;  in reset_starfive_jh71x0_register()
129 	data->status = status;  in reset_starfive_jh71x0_register()
130 	data->asserted = asserted;  in reset_starfive_jh71x0_register()
132 	return devm_reset_controller_register(dev, &data->rcdev);  in reset_starfive_jh71x0_register()