Lines Matching +full:co +full:- +full:located

1 # SPDX-License-Identifier: GPL-2.0-only
12 	  via GPIOs or SoC-internal reset controller modules.
79 	  Registers are located in a shared register region called OLB. EyeQ6H
87 	  GPIOs.  Typically for OF platforms this driver expects "reset-gpios"
90 	  If compiled as module, it will be called reset-gpio.
132 	  Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
221 	  Raspberry Pi 4's co-processor controls some of the board's HW
224 	  interfacing with RPi4's co-processor and model these firmware
255 	   - Altera SoCFPGAs
256 	   - ASPEED BMC SoCs
257 	   - Bitmain BM1880 SoC
258 	   - Realtek SoCs
259 	   - RCC reset controller in STM32 MCUs
260 	   - Allwinner SoCs
261 	   - SiFive FU740 SoCs
262 	   - Sophgo SoCs
289 	tristate "TI System Control Interface (TI-SCI) reset driver"
302 	  memory-mapped reset registers as part of a syscon device node. If
303 	  you wish to use the reset framework for such memory-mapped devices,
320 	  It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
321 	  switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
325 	  called reset-tn48m.