Lines Matching +full:single +full:- +full:core
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2022 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
9 #include <linux/dma-mapping.h>
19 #include <linux/omap-mailbox.h>
33 /* R5 TI-SCI Processor Configuration Flags */
47 /* R5 TI-SCI Processor Control Flags */
50 /* R5 TI-SCI Processor Status Flags */
59 * struct k3_r5_mem - internal memory structure
77 * Single-CPU mode : AM64x SoCs only
78 * Single-Core mode : AM62x, AM62A SoCs
88 * struct k3_r5_soc_data - match data to handle SoC variations
90 * @tcm_ecc_autoinit: flag to denote the auto-initialization of TCMs for ECC
91 * @single_cpu_mode: flag to denote if SoC/IP supports Single-CPU mode
92 * @is_single_core: flag to denote if SoC/IP has only single core R5
102 * struct k3_r5_cluster - K3 R5F Cluster structure
104 * @mode: Mode to configure the Cluster - Split or LockStep
106 * @core_transition: wait queue to sync core state changes
107 * @soc_data: SoC-specific feature data for a R5FSS
118 * struct k3_r5_core - K3 R5 core structure
121 * @rproc: rproc handle representing this core
123 * @sram: on-chip SRAM memory regions data
125 * @num_sram: number of on-chip SRAM memory regions
127 * @tsp: TI-SCI processor control handle
128 * @ti_sci: TI-SCI handle
129 * @ti_sci_id: TI-SCI device identifier
133 * @released_from_reset: flag to signal when core is out of reset
154 * struct k3_r5_rproc - K3 remote processor state
160 * @core: cached pointer to r5 core structure being used
170 struct k3_r5_core *core; member
176 * k3_r5_rproc_mbox_callback() - inbound mailbox message handler
183 * and we let remoteproc core handle it.
185 * In addition to virtqueue indices, we also have some out-of-band values
193 struct device *dev = kproc->rproc->dev.parent; in k3_r5_rproc_mbox_callback()
194 const char *name = kproc->rproc->name; in k3_r5_rproc_mbox_callback()
197 /* Do not forward message from a detached core */ in k3_r5_rproc_mbox_callback()
198 if (kproc->rproc->state == RPROC_DETACHED) in k3_r5_rproc_mbox_callback()
218 if (msg > kproc->rproc->max_notifyid) { in k3_r5_rproc_mbox_callback()
223 if (rproc_vq_interrupt(kproc->rproc, msg) == IRQ_NONE) in k3_r5_rproc_mbox_callback()
231 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_kick()
232 struct device *dev = rproc->dev.parent; in k3_r5_rproc_kick()
236 /* Do not forward message to a detached core */ in k3_r5_rproc_kick()
237 if (kproc->rproc->state == RPROC_DETACHED) in k3_r5_rproc_kick()
241 ret = mbox_send_message(kproc->mbox, (void *)msg); in k3_r5_rproc_kick()
247 static int k3_r5_split_reset(struct k3_r5_core *core) in k3_r5_split_reset() argument
251 ret = reset_control_assert(core->reset); in k3_r5_split_reset()
253 dev_err(core->dev, "local-reset assert failed, ret = %d\n", in k3_r5_split_reset()
258 ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_split_reset()
259 core->ti_sci_id); in k3_r5_split_reset()
261 dev_err(core->dev, "module-reset assert failed, ret = %d\n", in k3_r5_split_reset()
263 if (reset_control_deassert(core->reset)) in k3_r5_split_reset()
264 dev_warn(core->dev, "local-reset deassert back failed\n"); in k3_r5_split_reset()
270 static int k3_r5_split_release(struct k3_r5_core *core) in k3_r5_split_release() argument
274 ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci, in k3_r5_split_release()
275 core->ti_sci_id); in k3_r5_split_release()
277 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_split_release()
282 ret = reset_control_deassert(core->reset); in k3_r5_split_release()
284 dev_err(core->dev, "local-reset deassert failed, ret = %d\n", in k3_r5_split_release()
286 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_split_release()
287 core->ti_sci_id)) in k3_r5_split_release()
288 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_split_release()
296 struct k3_r5_core *core; in k3_r5_lockstep_reset() local
300 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
301 ret = reset_control_assert(core->reset); in k3_r5_lockstep_reset()
303 dev_err(core->dev, "local-reset assert failed, ret = %d\n", in k3_r5_lockstep_reset()
305 core = list_prev_entry(core, elem); in k3_r5_lockstep_reset()
311 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
312 ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_reset()
313 core->ti_sci_id); in k3_r5_lockstep_reset()
315 dev_err(core->dev, "module-reset assert failed, ret = %d\n", in k3_r5_lockstep_reset()
324 list_for_each_entry_continue_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
325 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_reset()
326 core->ti_sci_id)) in k3_r5_lockstep_reset()
327 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_lockstep_reset()
329 core = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_reset()
331 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset()
332 if (reset_control_deassert(core->reset)) in k3_r5_lockstep_reset()
333 dev_warn(core->dev, "local-reset deassert back failed\n"); in k3_r5_lockstep_reset()
341 struct k3_r5_core *core; in k3_r5_lockstep_release() local
345 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
346 ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci, in k3_r5_lockstep_release()
347 core->ti_sci_id); in k3_r5_lockstep_release()
349 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_lockstep_release()
351 core = list_next_entry(core, elem); in k3_r5_lockstep_release()
357 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
358 ret = reset_control_deassert(core->reset); in k3_r5_lockstep_release()
360 dev_err(core->dev, "module-reset deassert failed, ret = %d\n", in k3_r5_lockstep_release()
369 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
370 if (reset_control_assert(core->reset)) in k3_r5_lockstep_release()
371 dev_warn(core->dev, "local-reset assert back failed\n"); in k3_r5_lockstep_release()
373 core = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_release()
375 list_for_each_entry_from(core, &cluster->cores, elem) { in k3_r5_lockstep_release()
376 if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci, in k3_r5_lockstep_release()
377 core->ti_sci_id)) in k3_r5_lockstep_release()
378 dev_warn(core->dev, "module-reset assert back failed\n"); in k3_r5_lockstep_release()
384 static inline int k3_r5_core_halt(struct k3_r5_core *core) in k3_r5_core_halt() argument
386 return ti_sci_proc_set_control(core->tsp, in k3_r5_core_halt()
390 static inline int k3_r5_core_run(struct k3_r5_core *core) in k3_r5_core_run() argument
392 return ti_sci_proc_set_control(core->tsp, in k3_r5_core_run()
398 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_request_mbox()
399 struct mbox_client *client = &kproc->client; in k3_r5_rproc_request_mbox()
400 struct device *dev = kproc->dev; in k3_r5_rproc_request_mbox()
403 client->dev = dev; in k3_r5_rproc_request_mbox()
404 client->tx_done = NULL; in k3_r5_rproc_request_mbox()
405 client->rx_callback = k3_r5_rproc_mbox_callback; in k3_r5_rproc_request_mbox()
406 client->tx_block = false; in k3_r5_rproc_request_mbox()
407 client->knows_txdone = false; in k3_r5_rproc_request_mbox()
409 kproc->mbox = mbox_request_channel(client, 0); in k3_r5_rproc_request_mbox()
410 if (IS_ERR(kproc->mbox)) in k3_r5_rproc_request_mbox()
411 return dev_err_probe(dev, PTR_ERR(kproc->mbox), in k3_r5_rproc_request_mbox()
415 * Ping the remote processor, this is only for sanity-sake for now; in k3_r5_rproc_request_mbox()
421 ret = mbox_send_message(kproc->mbox, (void *)RP_MBOX_ECHO_REQUEST); in k3_r5_rproc_request_mbox()
424 mbox_free_channel(kproc->mbox); in k3_r5_rproc_request_mbox()
433 * execution from DDR requires the initial boot-strapping code to be run
436 * invoked by remoteproc core before any firmware loading, and is followed
439 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to
442 * private to each core. Only Core0 needs to be unhalted for running the
449 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_prepare()
450 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_prepare()
451 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_prepare() local
452 struct device *dev = kproc->dev; in k3_r5_rproc_prepare()
458 ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, &stat); in k3_r5_rproc_prepare()
463 /* Re-use LockStep-mode reset logic for Single-CPU mode */ in k3_r5_rproc_prepare()
464 ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_prepare()
465 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_rproc_prepare()
466 k3_r5_lockstep_release(cluster) : k3_r5_split_release(core); in k3_r5_rproc_prepare()
474 * Newer IP revisions like on J7200 SoCs support h/w auto-initialization in k3_r5_rproc_prepare()
477 * auto-init, but account for it in case it is disabled in k3_r5_rproc_prepare()
479 if (cluster->soc_data->tcm_ecc_autoinit && !mem_init_dis) { in k3_r5_rproc_prepare()
485 * Zero out both TCMs unconditionally (access from v8 Arm core is not in k3_r5_rproc_prepare()
490 memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size); in k3_r5_rproc_prepare()
493 memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size); in k3_r5_rproc_prepare()
504 * .unprepare() ops is invoked by the remoteproc core after the remoteproc is
507 * The Single-CPU mode on applicable SoCs (eg: AM64x) combines the TCMs from
509 * both cores, but with only Core0 unhalted. This function re-uses the same
516 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_unprepare()
517 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_unprepare()
518 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_unprepare() local
519 struct device *dev = kproc->dev; in k3_r5_rproc_unprepare()
522 /* Re-use LockStep-mode reset logic for Single-CPU mode */ in k3_r5_rproc_unprepare()
523 ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_unprepare()
524 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_rproc_unprepare()
525 k3_r5_lockstep_reset(cluster) : k3_r5_split_reset(core); in k3_r5_rproc_unprepare()
534 * 1. Configure the boot vector for R5F core(s)
535 * 2. Unhalt/Run the R5F core(s)
539 * unhalt both the cores to start the execution - Core1 needs to be unhalted
540 * first followed by Core0. The Split-mode requires that Core0 to be maintained
544 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
546 * flow as Split-mode for this. This callback is invoked only in remoteproc
551 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_start()
552 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_start()
553 struct device *dev = kproc->dev; in k3_r5_rproc_start()
554 struct k3_r5_core *core0, *core; in k3_r5_rproc_start() local
558 boot_addr = rproc->bootaddr; in k3_r5_rproc_start()
560 dev_dbg(dev, "booting R5F core using boot addr = 0x%x\n", boot_addr); in k3_r5_rproc_start()
563 core = kproc->core; in k3_r5_rproc_start()
564 ret = ti_sci_proc_set_config(core->tsp, boot_addr, 0, 0); in k3_r5_rproc_start()
569 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_start()
570 list_for_each_entry_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_start()
571 ret = k3_r5_core_run(core); in k3_r5_rproc_start()
576 /* do not allow core 1 to start before core 0 */ in k3_r5_rproc_start()
577 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, in k3_r5_rproc_start()
579 if (core != core0 && core0->rproc->state == RPROC_OFFLINE) { in k3_r5_rproc_start()
580 dev_err(dev, "%s: can not start core 1 before core 0\n", in k3_r5_rproc_start()
582 return -EPERM; in k3_r5_rproc_start()
585 ret = k3_r5_core_run(core); in k3_r5_rproc_start()
589 core->released_from_reset = true; in k3_r5_rproc_start()
590 wake_up_interruptible(&cluster->core_transition); in k3_r5_rproc_start()
596 list_for_each_entry_continue(core, &cluster->cores, elem) { in k3_r5_rproc_start()
597 if (k3_r5_core_halt(core)) in k3_r5_rproc_start()
598 dev_warn(core->dev, "core halt back failed\n"); in k3_r5_rproc_start()
605 * 1. Halt R5F core(s)
610 * performed first on Core0 followed by Core1. The Split-mode requires that
614 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
616 * flow as Split-mode for this.
619 * core is running, but is needed to make sure the core won't run after
621 * be done here, but is preferred to be done in the .unprepare() ops - this
629 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_stop()
630 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_stop()
631 struct device *dev = kproc->dev; in k3_r5_rproc_stop()
632 struct k3_r5_core *core1, *core = kproc->core; in k3_r5_rproc_stop() local
636 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_stop()
637 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
638 ret = k3_r5_core_halt(core); in k3_r5_rproc_stop()
640 core = list_prev_entry(core, elem); in k3_r5_rproc_stop()
645 /* do not allow core 0 to stop before core 1 */ in k3_r5_rproc_stop()
646 core1 = list_last_entry(&cluster->cores, struct k3_r5_core, in k3_r5_rproc_stop()
648 if (core != core1 && core1->rproc->state != RPROC_OFFLINE) { in k3_r5_rproc_stop()
649 dev_err(dev, "%s: can not stop core 0 before core 1\n", in k3_r5_rproc_stop()
651 ret = -EPERM; in k3_r5_rproc_stop()
655 ret = k3_r5_core_halt(core); in k3_r5_rproc_stop()
663 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_rproc_stop()
664 if (k3_r5_core_run(core)) in k3_r5_rproc_stop()
665 dev_warn(core->dev, "core run back failed\n"); in k3_r5_rproc_stop()
672 * Attach to a running R5F remote processor (IPC-only mode)
676 * no need to issue any TI-SCI commands to boot the R5F cores in IPC-only mode.
677 * This callback is invoked only in IPC-only mode and exists because
683 * Detach from a running R5F remote processor (IPC-only mode)
686 * left in booted state in IPC-only mode. This callback is invoked only in
687 * IPC-only mode and exists for sanity sake.
693 * to provide the resource table for the booted R5F in IPC-only mode. The K3 R5F
694 * firmwares follow a design-by-contract approach and are expected to have the
699 * IPC-only mode.
704 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_get_loaded_rsc_table()
705 struct device *dev = kproc->dev; in k3_r5_get_loaded_rsc_table()
707 if (!kproc->rmem[0].cpu_addr) { in k3_r5_get_loaded_rsc_table()
708 dev_err(dev, "memory-region #1 does not exist, loaded rsc table can't be found"); in k3_r5_get_loaded_rsc_table()
709 return ERR_PTR(-ENOMEM); in k3_r5_get_loaded_rsc_table()
713 * NOTE: The resource table size is currently hard-coded to a maximum in k3_r5_get_loaded_rsc_table()
717 * the hard-coded value suffices to support the IPC-only mode. in k3_r5_get_loaded_rsc_table()
720 return (struct resource_table *)kproc->rmem[0].cpu_addr; in k3_r5_get_loaded_rsc_table()
729 * either by the remoteproc core for loading, or by any rpmsg bus drivers.
733 struct k3_r5_rproc *kproc = rproc->priv; in k3_r5_rproc_da_to_va()
734 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_da_to_va() local
745 for (i = 0; i < core->num_mems; i++) { in k3_r5_rproc_da_to_va()
746 bus_addr = core->mem[i].bus_addr; in k3_r5_rproc_da_to_va()
747 dev_addr = core->mem[i].dev_addr; in k3_r5_rproc_da_to_va()
748 size = core->mem[i].size; in k3_r5_rproc_da_to_va()
750 /* handle R5-view addresses of TCMs */ in k3_r5_rproc_da_to_va()
752 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
753 va = core->mem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
757 /* handle SoC-view addresses of TCMs */ in k3_r5_rproc_da_to_va()
759 offset = da - bus_addr; in k3_r5_rproc_da_to_va()
760 va = core->mem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
765 /* handle any SRAM regions using SoC-view addresses */ in k3_r5_rproc_da_to_va()
766 for (i = 0; i < core->num_sram; i++) { in k3_r5_rproc_da_to_va()
767 dev_addr = core->sram[i].dev_addr; in k3_r5_rproc_da_to_va()
768 size = core->sram[i].size; in k3_r5_rproc_da_to_va()
771 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
772 va = core->sram[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
778 for (i = 0; i < kproc->num_rmems; i++) { in k3_r5_rproc_da_to_va()
779 dev_addr = kproc->rmem[i].dev_addr; in k3_r5_rproc_da_to_va()
780 size = kproc->rmem[i].size; in k3_r5_rproc_da_to_va()
783 offset = da - dev_addr; in k3_r5_rproc_da_to_va()
784 va = kproc->rmem[i].cpu_addr + offset; in k3_r5_rproc_da_to_va()
802 * Internal R5F Core configuration
804 * Each R5FSS has a cluster-level setting for configuring the processor
805 * subsystem either in a safety/fault-tolerant LockStep mode or a performance
806 * oriented Split mode on most SoCs. A fewer SoCs support a non-safety mode
807 * as an alternate for LockStep mode that exercises only a single R5F core
808 * called Single-CPU mode. Each R5F core has a number of settings to either
809 * enable/disable each of the TCMs, control which TCM appears at the R5F core's
811 * corresponding core are released. These settings are all protected and managed
814 * This function is used to pre-configure these settings for each R5F core, and
820 * once (in LockStep mode or Single-CPU modes) or twice (in Split mode). Support
821 * for LockStep-mode is dictated by an eFUSE register bit, and the config
824 * supports a Single-CPU mode. All cluster level settings like Cluster mode and
832 * This is overcome by switching to Split-mode initially and then programming
838 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_configure()
839 struct device *dev = kproc->dev; in k3_r5_rproc_configure()
840 struct k3_r5_core *core0, *core, *temp; in k3_r5_rproc_configure() local
848 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure()
849 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_rproc_configure()
850 cluster->mode == CLUSTER_MODE_SINGLECPU || in k3_r5_rproc_configure()
851 cluster->mode == CLUSTER_MODE_SINGLECORE) { in k3_r5_rproc_configure()
852 core = core0; in k3_r5_rproc_configure()
854 core = kproc->core; in k3_r5_rproc_configure()
857 ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, in k3_r5_rproc_configure()
868 /* Override to single CPU mode if set in status flag */ in k3_r5_rproc_configure()
869 if (single_cpu && cluster->mode == CLUSTER_MODE_SPLIT) { in k3_r5_rproc_configure()
870 dev_err(cluster->dev, "split-mode not permitted, force configuring for single-cpu mode\n"); in k3_r5_rproc_configure()
871 cluster->mode = CLUSTER_MODE_SINGLECPU; in k3_r5_rproc_configure()
875 if (!lockstep_en && cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_configure()
876 dev_err(cluster->dev, "lockstep mode not permitted, force configuring for split-mode\n"); in k3_r5_rproc_configure()
877 cluster->mode = CLUSTER_MODE_SPLIT; in k3_r5_rproc_configure()
882 if (core == core0) { in k3_r5_rproc_configure()
885 * Single-CPU configuration bit can only be configured in k3_r5_rproc_configure()
890 if (cluster->mode == CLUSTER_MODE_SINGLECPU || in k3_r5_rproc_configure()
891 cluster->mode == CLUSTER_MODE_SINGLECORE) { in k3_r5_rproc_configure()
895 * LockStep configuration bit is Read-only on Split-mode in k3_r5_rproc_configure()
905 if (core->atcm_enable) in k3_r5_rproc_configure()
910 if (core->btcm_enable) in k3_r5_rproc_configure()
915 if (core->loczrama) in k3_r5_rproc_configure()
920 if (cluster->mode == CLUSTER_MODE_LOCKSTEP) { in k3_r5_rproc_configure()
926 list_for_each_entry(temp, &cluster->cores, elem) { in k3_r5_rproc_configure()
931 if (temp != core) { in k3_r5_rproc_configure()
935 ret = ti_sci_proc_set_config(temp->tsp, boot_vec, in k3_r5_rproc_configure()
943 ret = ti_sci_proc_set_config(core->tsp, boot_vec, in k3_r5_rproc_configure()
946 ret = k3_r5_core_halt(core); in k3_r5_rproc_configure()
950 ret = ti_sci_proc_set_config(core->tsp, boot_vec, in k3_r5_rproc_configure()
960 struct device *dev = kproc->dev; in k3_r5_reserved_mem_init()
967 num_rmems = of_property_count_elems_of_size(np, "memory-region", in k3_r5_reserved_mem_init()
972 return -EINVAL; in k3_r5_reserved_mem_init()
977 return -EINVAL; in k3_r5_reserved_mem_init()
988 num_rmems--; in k3_r5_reserved_mem_init()
989 kproc->rmem = kcalloc(num_rmems, sizeof(*kproc->rmem), GFP_KERNEL); in k3_r5_reserved_mem_init()
990 if (!kproc->rmem) { in k3_r5_reserved_mem_init()
991 ret = -ENOMEM; in k3_r5_reserved_mem_init()
997 rmem_np = of_parse_phandle(np, "memory-region", i + 1); in k3_r5_reserved_mem_init()
999 ret = -EINVAL; in k3_r5_reserved_mem_init()
1006 ret = -EINVAL; in k3_r5_reserved_mem_init()
1011 kproc->rmem[i].bus_addr = rmem->base; in k3_r5_reserved_mem_init()
1015 * the 32-bit processor addresses to 64-bit bus addresses. The in k3_r5_reserved_mem_init()
1017 * is currently not supported, so 64-bit address regions are not in k3_r5_reserved_mem_init()
1019 * addresses/supported memory regions are restricted to 32-bit in k3_r5_reserved_mem_init()
1022 kproc->rmem[i].dev_addr = (u32)rmem->base; in k3_r5_reserved_mem_init()
1023 kproc->rmem[i].size = rmem->size; in k3_r5_reserved_mem_init()
1024 kproc->rmem[i].cpu_addr = ioremap_wc(rmem->base, rmem->size); in k3_r5_reserved_mem_init()
1025 if (!kproc->rmem[i].cpu_addr) { in k3_r5_reserved_mem_init()
1027 i + 1, &rmem->base, &rmem->size); in k3_r5_reserved_mem_init()
1028 ret = -ENOMEM; in k3_r5_reserved_mem_init()
1033 i + 1, &kproc->rmem[i].bus_addr, in k3_r5_reserved_mem_init()
1034 kproc->rmem[i].size, kproc->rmem[i].cpu_addr, in k3_r5_reserved_mem_init()
1035 kproc->rmem[i].dev_addr); in k3_r5_reserved_mem_init()
1037 kproc->num_rmems = num_rmems; in k3_r5_reserved_mem_init()
1042 for (i--; i >= 0; i--) in k3_r5_reserved_mem_init()
1043 iounmap(kproc->rmem[i].cpu_addr); in k3_r5_reserved_mem_init()
1044 kfree(kproc->rmem); in k3_r5_reserved_mem_init()
1054 for (i = 0; i < kproc->num_rmems; i++) in k3_r5_reserved_mem_exit()
1055 iounmap(kproc->rmem[i].cpu_addr); in k3_r5_reserved_mem_exit()
1056 kfree(kproc->rmem); in k3_r5_reserved_mem_exit()
1058 of_reserved_mem_device_release(kproc->dev); in k3_r5_reserved_mem_exit()
1062 * Each R5F core within a typical R5FSS instance has a total of 64 KB of TCMs,
1064 * cores are usable in Split-mode, but only the Core0 TCMs can be used in
1065 * LockStep-mode. The newer revisions of the R5FSS IP maximizes these TCMs by
1067 * otherwise been unusable (Eg: LockStep-mode on J7200 SoCs, Single-CPU mode on
1076 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_adjust_tcm_sizes()
1077 struct k3_r5_core *core = kproc->core; in k3_r5_adjust_tcm_sizes() local
1078 struct device *cdev = core->dev; in k3_r5_adjust_tcm_sizes()
1081 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_adjust_tcm_sizes()
1082 cluster->mode == CLUSTER_MODE_SINGLECPU || in k3_r5_adjust_tcm_sizes()
1083 cluster->mode == CLUSTER_MODE_SINGLECORE || in k3_r5_adjust_tcm_sizes()
1084 !cluster->soc_data->tcm_is_double) in k3_r5_adjust_tcm_sizes()
1087 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_adjust_tcm_sizes()
1088 if (core == core0) { in k3_r5_adjust_tcm_sizes()
1089 WARN_ON(core->mem[0].size != SZ_64K); in k3_r5_adjust_tcm_sizes()
1090 WARN_ON(core->mem[1].size != SZ_64K); in k3_r5_adjust_tcm_sizes()
1092 core->mem[0].size /= 2; in k3_r5_adjust_tcm_sizes()
1093 core->mem[1].size /= 2; in k3_r5_adjust_tcm_sizes()
1096 core->mem[0].size, core->mem[1].size); in k3_r5_adjust_tcm_sizes()
1101 * This function checks and configures a R5F core for IPC-only or remoteproc
1102 * mode. The driver is configured to be in IPC-only mode for a R5F core when
1103 * the core has been loaded and started by a bootloader. The IPC-only mode is
1105 * and ensuring that the core is running. Any incomplete steps at bootloader
1108 * In IPC-only mode, the driver state flags for ATCM, BTCM and LOCZRAMA settings
1115 struct k3_r5_cluster *cluster = kproc->cluster; in k3_r5_rproc_configure_mode()
1116 struct k3_r5_core *core = kproc->core; in k3_r5_rproc_configure_mode() local
1117 struct device *cdev = core->dev; in k3_r5_rproc_configure_mode()
1123 enum cluster_mode mode = cluster->mode; in k3_r5_rproc_configure_mode()
1127 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure_mode()
1129 ret = core->ti_sci->ops.dev_ops.is_on(core->ti_sci, core->ti_sci_id, in k3_r5_rproc_configure_mode()
1137 …dev_warn(cdev, "R5F core may have been powered on by a different host, programmed state (%d) != ac… in k3_r5_rproc_configure_mode()
1141 reset_ctrl_status = reset_control_status(core->reset); in k3_r5_rproc_configure_mode()
1149 * Skip the waiting mechanism for sequential power-on of cores if the in k3_r5_rproc_configure_mode()
1150 * core has already been booted by another entity. in k3_r5_rproc_configure_mode()
1152 core->released_from_reset = c_state; in k3_r5_rproc_configure_mode()
1154 ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, in k3_r5_rproc_configure_mode()
1175 * IPC-only mode detection requires both local and module resets to in k3_r5_rproc_configure_mode()
1176 * be deasserted and R5F core to be unhalted. Local reset status is in k3_r5_rproc_configure_mode()
1181 dev_info(cdev, "configured R5F for IPC-only mode\n"); in k3_r5_rproc_configure_mode()
1182 kproc->rproc->state = RPROC_DETACHED; in k3_r5_rproc_configure_mode()
1184 /* override rproc ops with only required IPC-only mode ops */ in k3_r5_rproc_configure_mode()
1185 kproc->rproc->ops->prepare = NULL; in k3_r5_rproc_configure_mode()
1186 kproc->rproc->ops->unprepare = NULL; in k3_r5_rproc_configure_mode()
1187 kproc->rproc->ops->start = NULL; in k3_r5_rproc_configure_mode()
1188 kproc->rproc->ops->stop = NULL; in k3_r5_rproc_configure_mode()
1189 kproc->rproc->ops->attach = k3_r5_rproc_attach; in k3_r5_rproc_configure_mode()
1190 kproc->rproc->ops->detach = k3_r5_rproc_detach; in k3_r5_rproc_configure_mode()
1191 kproc->rproc->ops->get_loaded_rsc_table = in k3_r5_rproc_configure_mode()
1201 ret = -EINVAL; in k3_r5_rproc_configure_mode()
1204 /* fixup TCMs, cluster & core flags to actual values in IPC-only mode */ in k3_r5_rproc_configure_mode()
1206 if (core == core0) in k3_r5_rproc_configure_mode()
1207 cluster->mode = mode; in k3_r5_rproc_configure_mode()
1208 core->atcm_enable = atcm_enable; in k3_r5_rproc_configure_mode()
1209 core->btcm_enable = btcm_enable; in k3_r5_rproc_configure_mode()
1210 core->loczrama = loczrama; in k3_r5_rproc_configure_mode()
1211 core->mem[0].dev_addr = loczrama ? 0 : K3_R5_TCM_DEV_ADDR; in k3_r5_rproc_configure_mode()
1212 core->mem[1].dev_addr = loczrama ? K3_R5_TCM_DEV_ADDR : 0; in k3_r5_rproc_configure_mode()
1221 struct device *dev = &pdev->dev; in k3_r5_cluster_rproc_init()
1223 struct k3_r5_core *core, *core1; in k3_r5_cluster_rproc_init() local
1229 core1 = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_init()
1230 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_init()
1231 cdev = core->dev; in k3_r5_cluster_rproc_init()
1234 dev_err(dev, "failed to parse firmware-name property, ret = %d\n", in k3_r5_cluster_rproc_init()
1242 ret = -ENOMEM; in k3_r5_cluster_rproc_init()
1247 rproc->has_iommu = false; in k3_r5_cluster_rproc_init()
1249 rproc->recovery_disabled = true; in k3_r5_cluster_rproc_init()
1251 kproc = rproc->priv; in k3_r5_cluster_rproc_init()
1252 kproc->cluster = cluster; in k3_r5_cluster_rproc_init()
1253 kproc->core = core; in k3_r5_cluster_rproc_init()
1254 kproc->dev = cdev; in k3_r5_cluster_rproc_init()
1255 kproc->rproc = rproc; in k3_r5_cluster_rproc_init()
1256 core->rproc = rproc; in k3_r5_cluster_rproc_init()
1291 /* create only one rproc in lockstep, single-cpu or in k3_r5_cluster_rproc_init()
1292 * single core mode in k3_r5_cluster_rproc_init()
1294 if (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_cluster_rproc_init()
1295 cluster->mode == CLUSTER_MODE_SINGLECPU || in k3_r5_cluster_rproc_init()
1296 cluster->mode == CLUSTER_MODE_SINGLECORE) in k3_r5_cluster_rproc_init()
1302 * So, wait for current core to power up before proceeding in k3_r5_cluster_rproc_init()
1303 * to next core and put timeout of 2sec for each core. in k3_r5_cluster_rproc_init()
1309 ret = wait_event_interruptible_timeout(cluster->core_transition, in k3_r5_cluster_rproc_init()
1310 core->released_from_reset, in k3_r5_cluster_rproc_init()
1314 "Timed out waiting for %s core to power up!\n", in k3_r5_cluster_rproc_init()
1315 rproc->name); in k3_r5_cluster_rproc_init()
1323 if (rproc->state == RPROC_ATTACHED) { in k3_r5_cluster_rproc_init()
1326 dev_err(kproc->dev, "failed to detach rproc, ret = %d\n", in k3_r5_cluster_rproc_init()
1337 /* undo core0 upon any failures on core1 in split-mode */ in k3_r5_cluster_rproc_init()
1338 if (cluster->mode == CLUSTER_MODE_SPLIT && core == core1) { in k3_r5_cluster_rproc_init()
1339 core = list_prev_entry(core, elem); in k3_r5_cluster_rproc_init()
1340 rproc = core->rproc; in k3_r5_cluster_rproc_init()
1341 kproc = rproc->priv; in k3_r5_cluster_rproc_init()
1351 struct k3_r5_core *core; in k3_r5_cluster_rproc_exit() local
1356 * lockstep mode and single-cpu modes have only one rproc associated in k3_r5_cluster_rproc_exit()
1357 * with first core, whereas split-mode has two rprocs associated with in k3_r5_cluster_rproc_exit()
1358 * each core, and requires that core1 be powered down first in k3_r5_cluster_rproc_exit()
1360 core = (cluster->mode == CLUSTER_MODE_LOCKSTEP || in k3_r5_cluster_rproc_exit()
1361 cluster->mode == CLUSTER_MODE_SINGLECPU) ? in k3_r5_cluster_rproc_exit()
1362 list_first_entry(&cluster->cores, struct k3_r5_core, elem) : in k3_r5_cluster_rproc_exit()
1363 list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_cluster_rproc_exit()
1365 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_cluster_rproc_exit()
1366 rproc = core->rproc; in k3_r5_cluster_rproc_exit()
1367 kproc = rproc->priv; in k3_r5_cluster_rproc_exit()
1369 if (rproc->state == RPROC_ATTACHED) { in k3_r5_cluster_rproc_exit()
1372 dev_err(kproc->dev, "failed to detach rproc, ret = %d\n", ret); in k3_r5_cluster_rproc_exit()
1377 mbox_free_channel(kproc->mbox); in k3_r5_cluster_rproc_exit()
1386 struct k3_r5_core *core) in k3_r5_core_of_get_internal_memories() argument
1389 struct device *dev = &pdev->dev; in k3_r5_core_of_get_internal_memories()
1395 core->mem = devm_kcalloc(dev, num_mems, sizeof(*core->mem), GFP_KERNEL); in k3_r5_core_of_get_internal_memories()
1396 if (!core->mem) in k3_r5_core_of_get_internal_memories()
1397 return -ENOMEM; in k3_r5_core_of_get_internal_memories()
1405 return -EINVAL; in k3_r5_core_of_get_internal_memories()
1407 if (!devm_request_mem_region(dev, res->start, in k3_r5_core_of_get_internal_memories()
1412 return -EBUSY; in k3_r5_core_of_get_internal_memories()
1416 * TCMs are designed in general to support RAM-like backing in k3_r5_core_of_get_internal_memories()
1417 * memories. So, map these as Normal Non-Cached memories. This in k3_r5_core_of_get_internal_memories()
1422 core->mem[i].cpu_addr = devm_ioremap_wc(dev, res->start, in k3_r5_core_of_get_internal_memories()
1424 if (!core->mem[i].cpu_addr) { in k3_r5_core_of_get_internal_memories()
1426 return -ENOMEM; in k3_r5_core_of_get_internal_memories()
1428 core->mem[i].bus_addr = res->start; in k3_r5_core_of_get_internal_memories()
1439 core->mem[i].dev_addr = core->loczrama ? in k3_r5_core_of_get_internal_memories()
1442 core->mem[i].dev_addr = core->loczrama ? in k3_r5_core_of_get_internal_memories()
1445 core->mem[i].size = resource_size(res); in k3_r5_core_of_get_internal_memories()
1448 mem_names[i], &core->mem[i].bus_addr, in k3_r5_core_of_get_internal_memories()
1449 core->mem[i].size, core->mem[i].cpu_addr, in k3_r5_core_of_get_internal_memories()
1450 core->mem[i].dev_addr); in k3_r5_core_of_get_internal_memories()
1452 core->num_mems = num_mems; in k3_r5_core_of_get_internal_memories()
1458 struct k3_r5_core *core) in k3_r5_core_of_get_sram_memories() argument
1460 struct device_node *np = pdev->dev.of_node; in k3_r5_core_of_get_sram_memories()
1461 struct device *dev = &pdev->dev; in k3_r5_core_of_get_sram_memories()
1469 dev_dbg(dev, "device does not use reserved on-chip memories, num_sram = %d\n", in k3_r5_core_of_get_sram_memories()
1474 core->sram = devm_kcalloc(dev, num_sram, sizeof(*core->sram), GFP_KERNEL); in k3_r5_core_of_get_sram_memories()
1475 if (!core->sram) in k3_r5_core_of_get_sram_memories()
1476 return -ENOMEM; in k3_r5_core_of_get_sram_memories()
1481 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1485 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1491 return -EINVAL; in k3_r5_core_of_get_sram_memories()
1493 core->sram[i].bus_addr = res.start; in k3_r5_core_of_get_sram_memories()
1494 core->sram[i].dev_addr = res.start; in k3_r5_core_of_get_sram_memories()
1495 core->sram[i].size = resource_size(&res); in k3_r5_core_of_get_sram_memories()
1496 core->sram[i].cpu_addr = devm_ioremap_wc(dev, res.start, in k3_r5_core_of_get_sram_memories()
1498 if (!core->sram[i].cpu_addr) { in k3_r5_core_of_get_sram_memories()
1501 return -ENOMEM; in k3_r5_core_of_get_sram_memories()
1505 i, &core->sram[i].bus_addr, in k3_r5_core_of_get_sram_memories()
1506 core->sram[i].size, core->sram[i].cpu_addr, in k3_r5_core_of_get_sram_memories()
1507 core->sram[i].dev_addr); in k3_r5_core_of_get_sram_memories()
1509 core->num_sram = num_sram; in k3_r5_core_of_get_sram_memories()
1516 struct device *dev = &pdev->dev; in k3_r5_core_of_init()
1518 struct k3_r5_core *core; in k3_r5_core_of_init() local
1522 return -ENOMEM; in k3_r5_core_of_init()
1524 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); in k3_r5_core_of_init()
1525 if (!core) { in k3_r5_core_of_init()
1526 ret = -ENOMEM; in k3_r5_core_of_init()
1530 core->dev = dev; in k3_r5_core_of_init()
1532 * Use SoC Power-on-Reset values as default if no DT properties are in k3_r5_core_of_init()
1535 core->atcm_enable = 0; in k3_r5_core_of_init()
1536 core->btcm_enable = 1; in k3_r5_core_of_init()
1537 core->loczrama = 1; in k3_r5_core_of_init()
1539 ret = of_property_read_u32(np, "ti,atcm-enable", &core->atcm_enable); in k3_r5_core_of_init()
1540 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1541 dev_err(dev, "invalid format for ti,atcm-enable, ret = %d\n", in k3_r5_core_of_init()
1546 ret = of_property_read_u32(np, "ti,btcm-enable", &core->btcm_enable); in k3_r5_core_of_init()
1547 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1548 dev_err(dev, "invalid format for ti,btcm-enable, ret = %d\n", in k3_r5_core_of_init()
1553 ret = of_property_read_u32(np, "ti,loczrama", &core->loczrama); in k3_r5_core_of_init()
1554 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1559 core->ti_sci = devm_ti_sci_get_by_phandle(dev, "ti,sci"); in k3_r5_core_of_init()
1560 if (IS_ERR(core->ti_sci)) { in k3_r5_core_of_init()
1561 ret = PTR_ERR(core->ti_sci); in k3_r5_core_of_init()
1562 if (ret != -EPROBE_DEFER) { in k3_r5_core_of_init()
1563 dev_err(dev, "failed to get ti-sci handle, ret = %d\n", in k3_r5_core_of_init()
1566 core->ti_sci = NULL; in k3_r5_core_of_init()
1570 ret = of_property_read_u32(np, "ti,sci-dev-id", &core->ti_sci_id); in k3_r5_core_of_init()
1572 dev_err(dev, "missing 'ti,sci-dev-id' property\n"); in k3_r5_core_of_init()
1576 core->reset = devm_reset_control_get_exclusive(dev, NULL); in k3_r5_core_of_init()
1577 if (IS_ERR_OR_NULL(core->reset)) { in k3_r5_core_of_init()
1578 ret = PTR_ERR_OR_ZERO(core->reset); in k3_r5_core_of_init()
1580 ret = -ENODEV; in k3_r5_core_of_init()
1581 if (ret != -EPROBE_DEFER) { in k3_r5_core_of_init()
1588 core->tsp = ti_sci_proc_of_get_tsp(dev, core->ti_sci); in k3_r5_core_of_init()
1589 if (IS_ERR(core->tsp)) { in k3_r5_core_of_init()
1590 ret = PTR_ERR(core->tsp); in k3_r5_core_of_init()
1591 dev_err(dev, "failed to construct ti-sci proc control, ret = %d\n", in k3_r5_core_of_init()
1596 ret = k3_r5_core_of_get_internal_memories(pdev, core); in k3_r5_core_of_init()
1603 ret = k3_r5_core_of_get_sram_memories(pdev, core); in k3_r5_core_of_init()
1609 ret = ti_sci_proc_request(core->tsp); in k3_r5_core_of_init()
1615 platform_set_drvdata(pdev, core); in k3_r5_core_of_init()
1631 struct k3_r5_core *core = platform_get_drvdata(pdev); in k3_r5_core_of_exit() local
1632 struct device *dev = &pdev->dev; in k3_r5_core_of_exit()
1635 ret = ti_sci_proc_release(core->tsp); in k3_r5_core_of_exit()
1647 struct k3_r5_core *core, *temp; in k3_r5_cluster_of_exit() local
1649 list_for_each_entry_safe_reverse(core, temp, &cluster->cores, elem) { in k3_r5_cluster_of_exit()
1650 list_del(&core->elem); in k3_r5_cluster_of_exit()
1651 cpdev = to_platform_device(core->dev); in k3_r5_cluster_of_exit()
1659 struct device *dev = &pdev->dev; in k3_r5_cluster_of_init()
1663 struct k3_r5_core *core; in k3_r5_cluster_of_init() local
1669 ret = -ENODEV; in k3_r5_cluster_of_init()
1670 dev_err(dev, "could not get R5 core platform device\n"); in k3_r5_cluster_of_init()
1679 put_device(&cpdev->dev); in k3_r5_cluster_of_init()
1684 core = platform_get_drvdata(cpdev); in k3_r5_cluster_of_init()
1685 put_device(&cpdev->dev); in k3_r5_cluster_of_init()
1686 list_add_tail(&core->elem, &cluster->cores); in k3_r5_cluster_of_init()
1698 struct device *dev = &pdev->dev; in k3_r5_probe()
1705 data = of_device_get_match_data(&pdev->dev); in k3_r5_probe()
1707 dev_err(dev, "SoC-specific data is not defined\n"); in k3_r5_probe()
1708 return -ENODEV; in k3_r5_probe()
1713 return -ENOMEM; in k3_r5_probe()
1715 cluster->dev = dev; in k3_r5_probe()
1716 cluster->soc_data = data; in k3_r5_probe()
1717 INIT_LIST_HEAD(&cluster->cores); in k3_r5_probe()
1718 init_waitqueue_head(&cluster->core_transition); in k3_r5_probe()
1720 ret = of_property_read_u32(np, "ti,cluster-mode", &cluster->mode); in k3_r5_probe()
1721 if (ret < 0 && ret != -EINVAL) { in k3_r5_probe()
1722 dev_err(dev, "invalid format for ti,cluster-mode, ret = %d\n", in k3_r5_probe()
1727 if (ret == -EINVAL) { in k3_r5_probe()
1729 * default to most common efuse configurations - Split-mode on AM64x in k3_r5_probe()
1730 * and LockStep-mode on all others in k3_r5_probe()
1731 * default to most common efuse configurations - in k3_r5_probe()
1732 * Split-mode on AM64x in k3_r5_probe()
1733 * Single core on AM62x in k3_r5_probe()
1734 * LockStep-mode on all others in k3_r5_probe()
1736 if (!data->is_single_core) in k3_r5_probe()
1737 cluster->mode = data->single_cpu_mode ? in k3_r5_probe()
1740 cluster->mode = CLUSTER_MODE_SINGLECORE; in k3_r5_probe()
1743 if ((cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) || in k3_r5_probe()
1744 (cluster->mode == CLUSTER_MODE_SINGLECORE && !data->is_single_core)) { in k3_r5_probe()
1745 dev_err(dev, "Cluster mode = %d is not supported on this SoC\n", cluster->mode); in k3_r5_probe()
1746 return -EINVAL; in k3_r5_probe()
1750 if (num_cores != 2 && !data->is_single_core) { in k3_r5_probe()
1753 return -ENODEV; in k3_r5_probe()
1756 if (num_cores != 1 && data->is_single_core) { in k3_r5_probe()
1757 dev_err(dev, "SoC supports only single core R5 but num_cores is set to %d\n", in k3_r5_probe()
1759 return -ENODEV; in k3_r5_probe()
1824 { .compatible = "ti,am654-r5fss", .data = &am65_j721e_soc_data, },
1825 { .compatible = "ti,j721e-r5fss", .data = &am65_j721e_soc_data, },
1826 { .compatible = "ti,j7200-r5fss", .data = &j7200_j721s2_soc_data, },
1827 { .compatible = "ti,am64-r5fss", .data = &am64_soc_data, },
1828 { .compatible = "ti,am62-r5fss", .data = &am62_soc_data, },
1829 { .compatible = "ti,j721s2-r5fss", .data = &j7200_j721s2_soc_data, },
1846 MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");