Lines Matching +full:no +full:- +full:pbl +full:- +full:x8
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
53 /* PBL/MBA interface registers */
79 #define AXI_IDLE_REG 0x8
87 #define QACCEPT_DENY_REG 0x8
274 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
298 dev_err(qproc->dev, in q6v5_regulator_enable()
309 dev_err(qproc->dev, in q6v5_regulator_enable()
317 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
324 for (; i >= 0; i--) { in q6v5_regulator_enable()
369 for (i--; i >= 0; i--) in q6v5_clk_enable()
403 for (i--; i >= 0; i--) { in q6v5_pds_enable()
429 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
456 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
459 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
460 memcpy(mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
461 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
469 struct q6v5 *qproc = rproc->priv; in q6v5_load()
473 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
474 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
475 return -EINVAL; in q6v5_load()
478 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_load()
480 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_load()
481 &qproc->mba_phys, qproc->mba_size); in q6v5_load()
482 return -EBUSY; in q6v5_load()
485 memcpy(mba_region, fw->data, fw->size); in q6v5_load()
496 if (qproc->has_alt_reset) { in q6v5_reset_assert()
497 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
498 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
499 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
500 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
510 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
511 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
513 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
514 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
515 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
517 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
518 } else if (qproc->has_ext_cntl_regs) { in q6v5_reset_assert()
519 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5_reset_assert()
520 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
521 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
522 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
523 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
525 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
535 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
536 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
537 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
538 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
539 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
540 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
541 } else if (qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_reset_deassert()
542 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
544 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
557 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
562 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
578 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
588 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
598 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
602 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
605 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
606 qproc->mba_size)) in q6v5_dump_mba_logs()
609 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_dump_mba_logs()
616 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
627 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
628 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
630 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
632 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
636 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
637 return -ETIMEDOUT; in q6v5proc_reset()
640 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
641 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
643 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
645 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
648 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
655 } else if (qproc->version == MSS_SC7180 || qproc->version == MSS_SC7280) { in q6v5proc_reset()
656 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
658 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
660 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
664 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
665 return -ETIMEDOUT; in q6v5proc_reset()
669 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
671 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
673 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
677 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
678 return -ETIMEDOUT; in q6v5proc_reset()
681 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
682 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
684 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
686 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
687 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
692 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
693 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
696 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
699 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
705 } else if (qproc->version == MSS_MSM8909 || in q6v5proc_reset()
706 qproc->version == MSS_MSM8953 || in q6v5proc_reset()
707 qproc->version == MSS_MSM8996 || in q6v5proc_reset()
708 qproc->version == MSS_MSM8998 || in q6v5proc_reset()
709 qproc->version == MSS_SDM660) { in q6v5proc_reset()
711 if (qproc->version != MSS_MSM8909 && in q6v5proc_reset()
712 qproc->version != MSS_MSM8953) in q6v5proc_reset()
715 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
718 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
720 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
723 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
725 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
728 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
732 dev_err(qproc->dev, in q6v5proc_reset()
737 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
739 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
740 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
743 if (qproc->version == MSS_SDM660) { in q6v5proc_reset()
744 ret = readl_relaxed_poll_timeout(qproc->reg_base + QDSP6V62SS_BHS_STATUS, in q6v5proc_reset()
747 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
748 dev_err(qproc->dev, "BHS_EN_REST_ACK not set!\n"); in q6v5proc_reset()
749 return -ETIMEDOUT; in q6v5proc_reset()
755 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
757 if (qproc->version != MSS_MSM8909) { in q6v5proc_reset()
761 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
763 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
767 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
770 if (qproc->version == MSS_MSM8953 || in q6v5proc_reset()
771 qproc->version == MSS_MSM8996) { in q6v5proc_reset()
779 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
780 for (; i >= 0; i--) { in q6v5proc_reset()
782 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
788 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
793 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
796 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
801 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
806 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
808 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
811 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
813 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
816 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
818 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
819 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
825 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
828 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
830 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
832 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
834 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
838 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
841 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
843 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
846 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
848 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
851 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
853 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
856 /* Wait for PBL status */ in q6v5proc_reset()
858 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
859 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
861 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
862 ret = -EINVAL; in q6v5proc_reset()
875 if (!qproc->has_qaccept_regs) in q6v5proc_enable_qchannel()
878 if (qproc->has_ext_cntl_regs) { in q6v5proc_enable_qchannel()
879 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5proc_enable_qchannel()
880 regmap_write(qproc->conn_map, qproc->force_clk_on, 1); in q6v5proc_enable_qchannel()
882 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5proc_enable_qchannel()
885 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5proc_enable_qchannel()
886 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
896 dev_err(qproc->dev, "qchannel enable failed\n"); in q6v5proc_enable_qchannel()
897 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
910 if (!qproc->has_qaccept_regs) in q6v5proc_disable_qchannel()
914 nretry--; in q6v5proc_disable_qchannel()
920 /* Request Q-channel transaction takedown */ in q6v5proc_disable_qchannel()
924 * If the request is denied, reset the Q-channel takedown request, in q6v5proc_disable_qchannel()
930 retry--; in q6v5proc_disable_qchannel()
950 dev_err(qproc->dev, "qchannel takedown failed\n"); in q6v5proc_disable_qchannel()
974 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
992 metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev); in q6v5_mpss_init_image()
996 if (qproc->mdata_phys) { in q6v5_mpss_init_image()
997 if (size > qproc->mdata_size) { in q6v5_mpss_init_image()
998 ret = -EINVAL; in q6v5_mpss_init_image()
999 dev_err(qproc->dev, "metadata size outside memory range\n"); in q6v5_mpss_init_image()
1003 phys = qproc->mdata_phys; in q6v5_mpss_init_image()
1004 ptr = memremap(qproc->mdata_phys, size, MEMREMAP_WC); in q6v5_mpss_init_image()
1006 ret = -EBUSY; in q6v5_mpss_init_image()
1007 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_mpss_init_image()
1008 &qproc->mdata_phys, size); in q6v5_mpss_init_image()
1012 ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
1014 ret = -ENOMEM; in q6v5_mpss_init_image()
1015 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
1022 if (qproc->mdata_phys) in q6v5_mpss_init_image()
1030 dev_err(qproc->dev, in q6v5_mpss_init_image()
1032 ret = -EAGAIN; in q6v5_mpss_init_image()
1036 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
1037 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
1040 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
1041 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
1043 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
1049 dev_warn(qproc->dev, in q6v5_mpss_init_image()
1053 if (!qproc->mdata_phys) in q6v5_mpss_init_image()
1054 dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); in q6v5_mpss_init_image()
1063 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
1066 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
1069 if (!phdr->p_memsz) in q6v5_phdr_valid()
1081 ret = qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
1085 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1087 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
1091 ret = q6v5_regulator_enable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1092 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1094 dev_err(qproc->dev, "failed to enable fallback proxy supplies\n"); in q6v5_mba_load()
1098 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1099 qproc->proxy_reg_count); in q6v5_mba_load()
1101 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
1105 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1106 qproc->proxy_clk_count); in q6v5_mba_load()
1108 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
1112 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
1113 qproc->active_reg_count); in q6v5_mba_load()
1115 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
1119 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1120 qproc->reset_clk_count); in q6v5_mba_load()
1122 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
1128 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
1132 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1133 qproc->active_clk_count); in q6v5_mba_load()
1135 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
1139 ret = q6v5proc_enable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1141 dev_err(qproc->dev, "failed to enable axi bridge\n"); in q6v5_mba_load()
1149 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
1150 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
1152 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
1157 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
1158 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
1160 dev_err(qproc->dev, in q6v5_mba_load()
1165 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
1166 if (qproc->dp_size) { in q6v5_mba_load()
1167 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
1168 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
1175 if (qproc->has_mba_logs) in q6v5_mba_load()
1176 qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE); in q6v5_mba_load()
1179 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
1180 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
1184 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
1185 ret = -EINVAL; in q6v5_mba_load()
1189 qproc->dump_mba_loaded = true; in q6v5_mba_load()
1193 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
1194 if (qproc->has_vq6) in q6v5_mba_load()
1195 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_load()
1196 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
1197 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
1198 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_load()
1199 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_load()
1200 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1203 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
1204 false, qproc->mba_phys, in q6v5_mba_load()
1205 qproc->mba_size); in q6v5_mba_load()
1207 dev_err(qproc->dev, in q6v5_mba_load()
1214 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1215 qproc->active_clk_count); in q6v5_mba_load()
1219 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1220 qproc->reset_clk_count); in q6v5_mba_load()
1222 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1223 qproc->active_reg_count); in q6v5_mba_load()
1225 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1226 qproc->proxy_clk_count); in q6v5_mba_load()
1228 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1229 qproc->proxy_reg_count); in q6v5_mba_load()
1231 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1232 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1234 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1236 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1246 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1247 qproc->dp_size = 0; in q6v5_mba_reclaim()
1249 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1250 if (qproc->has_vq6) in q6v5_mba_reclaim()
1251 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_reclaim()
1252 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1253 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1254 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1258 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1261 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1264 if (qproc->has_ext_cntl_regs) { in q6v5_mba_reclaim()
1265 regmap_write(qproc->conn_map, qproc->rscc_disable, 1); in q6v5_mba_reclaim()
1267 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5_mba_reclaim()
1270 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5_mba_reclaim()
1272 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->crypto_clk_off, val, in q6v5_mba_reclaim()
1275 dev_err(qproc->dev, "failed to enable crypto clock\n"); in q6v5_mba_reclaim()
1278 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_reclaim()
1279 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_reclaim()
1280 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_reclaim()
1284 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1285 qproc->reset_clk_count); in q6v5_mba_reclaim()
1286 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1287 qproc->active_clk_count); in q6v5_mba_reclaim()
1288 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1289 qproc->active_reg_count); in q6v5_mba_reclaim()
1294 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1295 qproc->mba_phys, in q6v5_mba_reclaim()
1296 qproc->mba_size); in q6v5_mba_reclaim()
1299 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1301 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1302 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1303 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1304 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1305 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_reclaim()
1306 qproc->fallback_proxy_reg_count); in q6v5_mba_reclaim()
1307 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1308 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1314 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1318 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1350 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1352 return -EINVAL; in q6v5_mpss_load()
1354 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1356 return -ENOMEM; in q6v5_mpss_load()
1358 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1360 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1365 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1367 ret = q6v5_mpss_init_image(qproc, fw, qproc->hexagon_mdt_image); in q6v5_mpss_load()
1371 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1374 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1380 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1383 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1384 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1386 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1387 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1390 if (qproc->version == MSS_MSM8953) { in q6v5_mpss_load()
1391 ret = qcom_scm_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1393 dev_err(qproc->dev, in q6v5_mpss_load()
1403 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1404 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1407 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1408 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1410 dev_err(qproc->dev, in q6v5_mpss_load()
1412 ret = -EAGAIN; in q6v5_mpss_load()
1416 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1417 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1419 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1425 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1426 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1427 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1428 ret = -EINVAL; in q6v5_mpss_load()
1432 if (phdr->p_filesz > phdr->p_memsz) { in q6v5_mpss_load()
1433 dev_err(qproc->dev, in q6v5_mpss_load()
1436 ret = -EINVAL; in q6v5_mpss_load()
1440 ptr = memremap(qproc->mpss_phys + offset, phdr->p_memsz, MEMREMAP_WC); in q6v5_mpss_load()
1442 dev_err(qproc->dev, in q6v5_mpss_load()
1443 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1444 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1448 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1449 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1450 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1451 dev_err(qproc->dev, in q6v5_mpss_load()
1454 ret = -EINVAL; in q6v5_mpss_load()
1459 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1460 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1462 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1463 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1464 ptr, phdr->p_filesz); in q6v5_mpss_load()
1466 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1471 if (seg_fw->size != phdr->p_filesz) { in q6v5_mpss_load()
1472 dev_err(qproc->dev, in q6v5_mpss_load()
1475 ret = -EINVAL; in q6v5_mpss_load()
1484 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1485 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1486 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1489 size += phdr->p_memsz; in q6v5_mpss_load()
1491 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1493 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1494 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1495 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1497 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1499 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1501 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1508 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1509 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1511 dev_err(qproc->dev, in q6v5_mpss_load()
1513 ret = -EAGAIN; in q6v5_mpss_load()
1518 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1519 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1521 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1523 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1538 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1539 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1543 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1547 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1549 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1550 qproc->mpss_size); in qcom_q6v5_dump_segment()
1555 ptr = memremap(qproc->mpss_phys + offset + cp_offset, size, MEMREMAP_WC); in qcom_q6v5_dump_segment()
1564 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1567 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1568 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1570 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1572 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1573 qproc->mpss_size); in qcom_q6v5_dump_segment()
1581 struct q6v5 *qproc = rproc->priv; in q6v5_start()
1589 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1590 qproc->dp_size ? "" : "out"); in q6v5_start()
1596 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1597 if (ret == -ETIMEDOUT) { in q6v5_start()
1598 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1602 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1603 false, qproc->mba_phys, in q6v5_start()
1604 qproc->mba_size); in q6v5_start()
1606 dev_err(qproc->dev, in q6v5_start()
1610 qproc->current_dump_size = 0; in q6v5_start()
1623 struct q6v5 *qproc = rproc->priv; in q6v5_stop()
1626 ret = qcom_q6v5_request_stop(&qproc->q6v5, qproc->sysmon); in q6v5_stop()
1627 if (ret == -ETIMEDOUT) in q6v5_stop()
1628 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1642 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1646 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1648 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1649 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1655 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1657 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1659 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1665 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1666 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1672 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1681 struct q6v5 *qproc = rproc->priv; in q6v5_panic()
1683 return qcom_q6v5_panic(&qproc->q6v5); in q6v5_panic()
1698 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1699 qproc->proxy_clk_count); in qcom_msa_handover()
1700 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1701 qproc->proxy_reg_count); in qcom_msa_handover()
1702 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in qcom_msa_handover()
1703 qproc->fallback_proxy_reg_count); in qcom_msa_handover()
1704 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1713 qproc->reg_base = devm_platform_ioremap_resource_byname(pdev, "qdsp6"); in q6v5_init_mem()
1714 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1715 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1717 qproc->rmb_base = devm_platform_ioremap_resource_byname(pdev, "rmb"); in q6v5_init_mem()
1718 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1719 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1721 if (qproc->has_vq6) in q6v5_init_mem()
1724 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1725 "qcom,halt-regs", halt_cell_cnt, 0, &args); in q6v5_init_mem()
1727 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1728 return -EINVAL; in q6v5_init_mem()
1731 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1733 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1734 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1736 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1737 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1738 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1740 if (qproc->has_vq6) in q6v5_init_mem()
1741 qproc->halt_vq6 = args.args[3]; in q6v5_init_mem()
1743 if (qproc->has_qaccept_regs) { in q6v5_init_mem()
1744 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1745 "qcom,qaccept-regs", in q6v5_init_mem()
1748 dev_err(&pdev->dev, "failed to parse qaccept-regs\n"); in q6v5_init_mem()
1749 return -EINVAL; in q6v5_init_mem()
1752 qproc->qaccept_mdm = args.args[0]; in q6v5_init_mem()
1753 qproc->qaccept_cx = args.args[1]; in q6v5_init_mem()
1754 qproc->qaccept_axi = args.args[2]; in q6v5_init_mem()
1757 if (qproc->has_ext_cntl_regs) { in q6v5_init_mem()
1758 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1759 "qcom,ext-regs", in q6v5_init_mem()
1762 dev_err(&pdev->dev, "failed to parse ext-regs index 0\n"); in q6v5_init_mem()
1763 return -EINVAL; in q6v5_init_mem()
1766 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1768 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1769 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1771 qproc->force_clk_on = args.args[0]; in q6v5_init_mem()
1772 qproc->rscc_disable = args.args[1]; in q6v5_init_mem()
1774 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1775 "qcom,ext-regs", in q6v5_init_mem()
1778 dev_err(&pdev->dev, "failed to parse ext-regs index 1\n"); in q6v5_init_mem()
1779 return -EINVAL; in q6v5_init_mem()
1782 qproc->axim1_clk_off = args.args[0]; in q6v5_init_mem()
1783 qproc->crypto_clk_off = args.args[1]; in q6v5_init_mem()
1786 if (qproc->has_spare_reg) { in q6v5_init_mem()
1787 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1788 "qcom,spare-regs", in q6v5_init_mem()
1791 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1792 return -EINVAL; in q6v5_init_mem()
1795 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1797 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1798 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1800 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1819 if (rc != -EPROBE_DEFER) in q6v5_init_clocks()
1845 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1853 for (i--; i >= 0; i--) in q6v5_pds_attach()
1870 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1872 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1873 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1874 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1877 if (qproc->has_alt_reset || qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_init_reset()
1878 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1880 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1881 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1882 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1896 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1897 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1899 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1901 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1902 "memory-region", 0); in q6v5_alloc_memory_region()
1904 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1909 dev_err(qproc->dev, "no mba memory-region specified\n"); in q6v5_alloc_memory_region()
1910 return -EINVAL; in q6v5_alloc_memory_region()
1916 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1917 return -EINVAL; in q6v5_alloc_memory_region()
1920 qproc->mba_phys = rmem->base; in q6v5_alloc_memory_region()
1921 qproc->mba_size = rmem->size; in q6v5_alloc_memory_region()
1924 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1925 "memory-region", 1); in q6v5_alloc_memory_region()
1927 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1928 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1933 dev_err(qproc->dev, "no mpss memory-region specified\n"); in q6v5_alloc_memory_region()
1934 return -EINVAL; in q6v5_alloc_memory_region()
1940 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1941 return -EINVAL; in q6v5_alloc_memory_region()
1944 qproc->mpss_phys = qproc->mpss_reloc = rmem->base; in q6v5_alloc_memory_region()
1945 qproc->mpss_size = rmem->size; in q6v5_alloc_memory_region()
1948 node = of_parse_phandle(qproc->dev->of_node, "memory-region", 2); in q6v5_alloc_memory_region()
1950 child = of_get_child_by_name(qproc->dev->of_node, "metadata"); in q6v5_alloc_memory_region()
1951 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1960 dev_err(qproc->dev, "unable to resolve metadata region\n"); in q6v5_alloc_memory_region()
1961 return -EINVAL; in q6v5_alloc_memory_region()
1964 qproc->mdata_phys = rmem->base; in q6v5_alloc_memory_region()
1965 qproc->mdata_size = rmem->size; in q6v5_alloc_memory_region()
1979 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1981 return -EINVAL; in q6v5_probe()
1983 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1984 return -EPROBE_DEFER; in q6v5_probe()
1986 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1987 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1989 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
1990 dev_err(&pdev->dev, "unable to read mba firmware-name\n"); in q6v5_probe()
1994 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
1997 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
1998 return -ENOMEM; in q6v5_probe()
2001 rproc->auto_boot = false; in q6v5_probe()
2004 qproc = rproc->priv; in q6v5_probe()
2005 qproc->dev = &pdev->dev; in q6v5_probe()
2006 qproc->rproc = rproc; in q6v5_probe()
2007 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
2008 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
2009 1, &qproc->hexagon_mdt_image); in q6v5_probe()
2010 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
2011 dev_err(&pdev->dev, "unable to read mpss firmware-name\n"); in q6v5_probe()
2017 qproc->has_qaccept_regs = desc->has_qaccept_regs; in q6v5_probe()
2018 qproc->has_ext_cntl_regs = desc->has_ext_cntl_regs; in q6v5_probe()
2019 qproc->has_vq6 = desc->has_vq6; in q6v5_probe()
2020 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
2029 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
2030 desc->proxy_clk_names); in q6v5_probe()
2032 dev_err(&pdev->dev, "Failed to get proxy clocks.\n"); in q6v5_probe()
2035 qproc->proxy_clk_count = ret; in q6v5_probe()
2037 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
2038 desc->reset_clk_names); in q6v5_probe()
2040 dev_err(&pdev->dev, "Failed to get reset clocks.\n"); in q6v5_probe()
2043 qproc->reset_clk_count = ret; in q6v5_probe()
2045 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
2046 desc->active_clk_names); in q6v5_probe()
2048 dev_err(&pdev->dev, "Failed to get active clocks.\n"); in q6v5_probe()
2051 qproc->active_clk_count = ret; in q6v5_probe()
2053 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
2054 desc->proxy_supply); in q6v5_probe()
2056 dev_err(&pdev->dev, "Failed to get proxy regulators.\n"); in q6v5_probe()
2059 qproc->proxy_reg_count = ret; in q6v5_probe()
2061 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
2062 desc->active_supply); in q6v5_probe()
2064 dev_err(&pdev->dev, "Failed to get active regulators.\n"); in q6v5_probe()
2067 qproc->active_reg_count = ret; in q6v5_probe()
2069 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
2070 desc->proxy_pd_names); in q6v5_probe()
2072 if (ret == -ENODATA && desc->fallback_proxy_supply) { in q6v5_probe()
2073 ret = q6v5_regulator_init(&pdev->dev, in q6v5_probe()
2074 qproc->fallback_proxy_regs, in q6v5_probe()
2075 desc->fallback_proxy_supply); in q6v5_probe()
2077 dev_err(&pdev->dev, "Failed to get fallback proxy regulators.\n"); in q6v5_probe()
2080 qproc->fallback_proxy_reg_count = ret; in q6v5_probe()
2082 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
2085 qproc->proxy_pd_count = ret; in q6v5_probe()
2088 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
2093 qproc->version = desc->version; in q6v5_probe()
2094 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
2095 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
2097 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem", in q6v5_probe()
2102 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2103 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2104 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
2105 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2106 qcom_add_pdm_subdev(rproc, &qproc->pdm_subdev); in q6v5_probe()
2107 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
2108 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
2109 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
2110 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
2118 node = of_get_compatible_child(pdev->dev.of_node, "qcom,bam-dmux"); in q6v5_probe()
2119 qproc->bam_dmux = of_platform_device_create(node, NULL, &pdev->dev); in q6v5_probe()
2125 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
2127 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
2128 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2129 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
2131 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
2139 struct rproc *rproc = qproc->rproc; in q6v5_remove()
2141 if (qproc->bam_dmux) in q6v5_remove()
2142 of_platform_device_destroy(&qproc->bam_dmux->dev, NULL); in q6v5_remove()
2145 qcom_q6v5_deinit(&qproc->q6v5); in q6v5_remove()
2146 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
2147 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
2148 qcom_remove_pdm_subdev(rproc, &qproc->pdm_subdev); in q6v5_remove()
2149 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
2150 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
2152 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
2519 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2520 { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss},
2521 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2522 { .compatible = "qcom,msm8953-mss-pil", .data = &msm8953_mss},
2523 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2524 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2525 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2526 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2527 { .compatible = "qcom,sc7280-mss-pil", .data = &sc7280_mss},
2528 { .compatible = "qcom,sdm660-mss-pil", .data = &sdm660_mss},
2529 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2538 .name = "qcom-q6v5-mss",
2544 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");