Lines Matching +full:de +full:- +full:asserting
1 // SPDX-License-Identifier: GPL-2.0
125 struct device *dev = adsp->dev; in qcom_rproc_pds_attach()
133 if (dev->pm_domain) in qcom_rproc_pds_attach()
139 ret = dev_pm_domain_attach_list(dev, &pd_data, &adsp->pd_list); in qcom_rproc_pds_attach()
150 struct device *dev = adsp->dev; in qcom_rproc_pds_detach()
151 struct dev_pm_domain_list *pds = adsp->pd_list; in qcom_rproc_pds_detach()
155 if (dev->pm_domain || pds) in qcom_rproc_pds_detach()
156 pm_runtime_disable(adsp->dev); in qcom_rproc_pds_detach()
161 struct device *dev = adsp->dev; in qcom_rproc_pds_enable()
162 struct dev_pm_domain_list *pds = adsp->pd_list; in qcom_rproc_pds_enable()
165 if (!dev->pm_domain && !pds) in qcom_rproc_pds_enable()
168 if (dev->pm_domain) in qcom_rproc_pds_enable()
171 while (pds && i < pds->num_pds) { in qcom_rproc_pds_enable()
172 dev_pm_genpd_set_performance_state(pds->pd_devs[i], INT_MAX); in qcom_rproc_pds_enable()
179 i--; in qcom_rproc_pds_enable()
180 dev_pm_genpd_set_performance_state(pds->pd_devs[i], 0); in qcom_rproc_pds_enable()
183 if (dev->pm_domain) in qcom_rproc_pds_enable()
192 struct device *dev = adsp->dev; in qcom_rproc_pds_disable()
193 struct dev_pm_domain_list *pds = adsp->pd_list; in qcom_rproc_pds_disable()
196 if (!dev->pm_domain && !pds) in qcom_rproc_pds_disable()
199 if (dev->pm_domain) in qcom_rproc_pds_disable()
202 while (pds && i < pds->num_pds) { in qcom_rproc_pds_disable()
203 dev_pm_genpd_set_performance_state(pds->pd_devs[i], 0); in qcom_rproc_pds_disable()
214 regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 1); in qcom_wpss_shutdown()
217 regmap_read_poll_timeout(adsp->halt_map, in qcom_wpss_shutdown()
218 adsp->halt_lpass + LPASS_HALTACK_REG, val, in qcom_wpss_shutdown()
222 reset_control_assert(adsp->pdc_sync_reset); in qcom_wpss_shutdown()
225 reset_control_assert(adsp->restart); in qcom_wpss_shutdown()
227 /* wait after asserting subsystem restart from AOSS */ in qcom_wpss_shutdown()
231 reset_control_deassert(adsp->restart); in qcom_wpss_shutdown()
233 /* De-assert the WPSS PDC Reset */ in qcom_wpss_shutdown()
234 reset_control_deassert(adsp->pdc_sync_reset); in qcom_wpss_shutdown()
238 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_wpss_shutdown()
240 regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 0); in qcom_wpss_shutdown()
243 regmap_read_poll_timeout(adsp->halt_map, in qcom_wpss_shutdown()
244 adsp->halt_lpass + LPASS_HALTACK_REG, val, in qcom_wpss_shutdown()
257 val = readl(adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
259 writel(val, adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
261 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_adsp_shutdown()
264 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
265 adsp->halt_lpass + LPASS_PWR_ON_REG, &val); in qcom_adsp_shutdown()
269 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
270 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, in qcom_adsp_shutdown()
275 regmap_write(adsp->halt_map, in qcom_adsp_shutdown()
276 adsp->halt_lpass + LPASS_HALTREQ_REG, 1); in qcom_adsp_shutdown()
281 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
282 adsp->halt_lpass + LPASS_HALTACK_REG, &val); in qcom_adsp_shutdown()
289 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
290 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, &val); in qcom_adsp_shutdown()
292 dev_err(adsp->dev, "port failed halt\n"); in qcom_adsp_shutdown()
296 reset_control_assert(adsp->pdc_sync_reset); in qcom_adsp_shutdown()
298 reset_control_assert(adsp->restart); in qcom_adsp_shutdown()
299 /* wait after asserting subsystem restart from AOSS */ in qcom_adsp_shutdown()
303 regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 0); in qcom_adsp_shutdown()
305 /* De-assert the LPASS PDC Reset */ in qcom_adsp_shutdown()
306 reset_control_deassert(adsp->pdc_sync_reset); in qcom_adsp_shutdown()
308 reset_control_deassert(adsp->restart); in qcom_adsp_shutdown()
309 /* wait after de-asserting subsystem restart from AOSS */ in qcom_adsp_shutdown()
317 struct qcom_adsp *adsp = rproc->priv; in adsp_load()
320 ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, 0, in adsp_load()
321 adsp->mem_region, adsp->mem_phys, in adsp_load()
322 adsp->mem_size, &adsp->mem_reloc); in adsp_load()
326 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); in adsp_load()
333 struct qcom_adsp *adsp = rproc->priv; in adsp_unmap_carveout()
335 if (adsp->has_iommu) in adsp_unmap_carveout()
336 iommu_unmap(rproc->domain, adsp->mem_phys, adsp->mem_size); in adsp_unmap_carveout()
341 struct qcom_adsp *adsp = rproc->priv; in adsp_map_carveout()
347 if (!adsp->has_iommu) in adsp_map_carveout()
350 if (!rproc->domain) in adsp_map_carveout()
351 return -EINVAL; in adsp_map_carveout()
353 ret = of_parse_phandle_with_args(adsp->dev->of_node, "iommus", "#iommu-cells", 0, &args); in adsp_map_carveout()
360 iova = adsp->mem_phys | (sid << 32); in adsp_map_carveout()
362 ret = iommu_map(rproc->domain, iova, adsp->mem_phys, in adsp_map_carveout()
363 adsp->mem_size, IOMMU_READ | IOMMU_WRITE, in adsp_map_carveout()
366 dev_err(adsp->dev, "Unable to map ADSP Physical Memory\n"); in adsp_map_carveout()
375 struct qcom_adsp *adsp = rproc->priv; in adsp_start()
379 ret = qcom_q6v5_prepare(&adsp->q6v5); in adsp_start()
385 dev_err(adsp->dev, "ADSP smmu mapping failed\n"); in adsp_start()
389 ret = clk_prepare_enable(adsp->xo); in adsp_start()
397 ret = clk_bulk_prepare_enable(adsp->num_clks, adsp->clks); in adsp_start()
399 dev_err(adsp->dev, "adsp clk_enable failed\n"); in adsp_start()
404 writel(1, adsp->qdsp6ss_base + QDSP6SS_XO_CBCR); in adsp_start()
407 writel(1, adsp->qdsp6ss_base + QDSP6SS_SLEEP_CBCR); in adsp_start()
410 writel(1, adsp->qdsp6ss_base + QDSP6SS_CORE_CBCR); in adsp_start()
413 writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); in adsp_start()
415 if (adsp->lpass_efuse) in adsp_start()
416 writel(LPASS_EFUSE_Q6SS_EVB_SEL, adsp->lpass_efuse); in adsp_start()
418 /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ in adsp_start()
419 writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); in adsp_start()
422 writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); in adsp_start()
425 ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, in adsp_start()
428 dev_err(adsp->dev, "failed to bootup adsp\n"); in adsp_start()
432 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5 * HZ)); in adsp_start()
433 if (ret == -ETIMEDOUT) { in adsp_start()
434 dev_err(adsp->dev, "start timed out\n"); in adsp_start()
441 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in adsp_start()
445 clk_disable_unprepare(adsp->xo); in adsp_start()
449 qcom_q6v5_unprepare(&adsp->q6v5); in adsp_start()
458 clk_disable_unprepare(adsp->xo); in qcom_adsp_pil_handover()
464 struct qcom_adsp *adsp = rproc->priv; in adsp_stop()
468 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon); in adsp_stop()
469 if (ret == -ETIMEDOUT) in adsp_stop()
470 dev_err(adsp->dev, "timed out on wait\n"); in adsp_stop()
472 ret = adsp->shutdown(adsp); in adsp_stop()
474 dev_err(adsp->dev, "failed to shutdown: %d\n", ret); in adsp_stop()
478 handover = qcom_q6v5_unprepare(&adsp->q6v5); in adsp_stop()
480 qcom_adsp_pil_handover(&adsp->q6v5); in adsp_stop()
487 struct qcom_adsp *adsp = rproc->priv; in adsp_da_to_va()
490 offset = da - adsp->mem_reloc; in adsp_da_to_va()
491 if (offset < 0 || offset + len > adsp->mem_size) in adsp_da_to_va()
494 return adsp->mem_region + offset; in adsp_da_to_va()
499 struct qcom_adsp *adsp = rproc->priv; in adsp_parse_firmware()
504 dev_err(&rproc->dev, "Error in registering dump segments\n"); in adsp_parse_firmware()
508 if (adsp->has_iommu) { in adsp_parse_firmware()
511 dev_err(&rproc->dev, "Error in loading resource table\n"); in adsp_parse_firmware()
520 struct qcom_adsp *adsp = rproc->priv; in adsp_panic()
522 return qcom_q6v5_panic(&adsp->q6v5); in adsp_panic()
539 adsp->xo = devm_clk_get(adsp->dev, "xo"); in adsp_init_clock()
540 if (IS_ERR(adsp->xo)) { in adsp_init_clock()
541 ret = PTR_ERR(adsp->xo); in adsp_init_clock()
542 if (ret != -EPROBE_DEFER) in adsp_init_clock()
543 dev_err(adsp->dev, "failed to get xo clock"); in adsp_init_clock()
550 adsp->num_clks = num_clks; in adsp_init_clock()
551 adsp->clks = devm_kcalloc(adsp->dev, adsp->num_clks, in adsp_init_clock()
552 sizeof(*adsp->clks), GFP_KERNEL); in adsp_init_clock()
553 if (!adsp->clks) in adsp_init_clock()
554 return -ENOMEM; in adsp_init_clock()
556 for (i = 0; i < adsp->num_clks; i++) in adsp_init_clock()
557 adsp->clks[i].id = clk_ids[i]; in adsp_init_clock()
559 return devm_clk_bulk_get(adsp->dev, adsp->num_clks, adsp->clks); in adsp_init_clock()
564 adsp->pdc_sync_reset = devm_reset_control_get_optional_exclusive(adsp->dev, in adsp_init_reset()
566 if (IS_ERR(adsp->pdc_sync_reset)) { in adsp_init_reset()
567 dev_err(adsp->dev, "failed to acquire pdc_sync reset\n"); in adsp_init_reset()
568 return PTR_ERR(adsp->pdc_sync_reset); in adsp_init_reset()
571 adsp->restart = devm_reset_control_get_optional_exclusive(adsp->dev, "restart"); in adsp_init_reset()
574 if (!adsp->restart) in adsp_init_reset()
575 adsp->restart = devm_reset_control_get_exclusive(adsp->dev, "cc_lpass"); in adsp_init_reset()
577 if (IS_ERR(adsp->restart)) { in adsp_init_reset()
578 dev_err(adsp->dev, "failed to acquire restart\n"); in adsp_init_reset()
579 return PTR_ERR(adsp->restart); in adsp_init_reset()
592 adsp->qdsp6ss_base = devm_platform_ioremap_resource(pdev, 0); in adsp_init_mmio()
593 if (IS_ERR(adsp->qdsp6ss_base)) { in adsp_init_mmio()
594 dev_err(adsp->dev, "failed to map QDSP6SS registers\n"); in adsp_init_mmio()
595 return PTR_ERR(adsp->qdsp6ss_base); in adsp_init_mmio()
600 adsp->lpass_efuse = NULL; in adsp_init_mmio()
601 dev_dbg(adsp->dev, "failed to get efuse memory region\n"); in adsp_init_mmio()
603 adsp->lpass_efuse = devm_ioremap_resource(&pdev->dev, efuse_region); in adsp_init_mmio()
604 if (IS_ERR(adsp->lpass_efuse)) { in adsp_init_mmio()
605 dev_err(adsp->dev, "failed to map efuse registers\n"); in adsp_init_mmio()
606 return PTR_ERR(adsp->lpass_efuse); in adsp_init_mmio()
609 syscon = of_parse_phandle(pdev->dev.of_node, "qcom,halt-regs", 0); in adsp_init_mmio()
611 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in adsp_init_mmio()
612 return -EINVAL; in adsp_init_mmio()
615 adsp->halt_map = syscon_node_to_regmap(syscon); in adsp_init_mmio()
617 if (IS_ERR(adsp->halt_map)) in adsp_init_mmio()
618 return PTR_ERR(adsp->halt_map); in adsp_init_mmio()
620 ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,halt-regs", in adsp_init_mmio()
621 1, &adsp->halt_lpass); in adsp_init_mmio()
623 dev_err(&pdev->dev, "no offset in syscon\n"); in adsp_init_mmio()
635 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); in adsp_alloc_memory_region()
641 dev_err(adsp->dev, "unable to resolve memory-region\n"); in adsp_alloc_memory_region()
642 return -EINVAL; in adsp_alloc_memory_region()
645 adsp->mem_phys = adsp->mem_reloc = rmem->base; in adsp_alloc_memory_region()
646 adsp->mem_size = rmem->size; in adsp_alloc_memory_region()
647 adsp->mem_region = devm_ioremap_wc(adsp->dev, in adsp_alloc_memory_region()
648 adsp->mem_phys, adsp->mem_size); in adsp_alloc_memory_region()
649 if (!adsp->mem_region) { in adsp_alloc_memory_region()
650 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", in adsp_alloc_memory_region()
651 &rmem->base, adsp->mem_size); in adsp_alloc_memory_region()
652 return -EBUSY; in adsp_alloc_memory_region()
666 desc = of_device_get_match_data(&pdev->dev); in adsp_probe()
668 return -EINVAL; in adsp_probe()
670 firmware_name = desc->firmware_name; in adsp_probe()
671 ret = of_property_read_string(pdev->dev.of_node, "firmware-name", in adsp_probe()
673 if (ret < 0 && ret != -EINVAL) { in adsp_probe()
674 dev_err(&pdev->dev, "unable to read firmware-name\n"); in adsp_probe()
678 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, &adsp_ops, in adsp_probe()
681 dev_err(&pdev->dev, "unable to allocate remoteproc\n"); in adsp_probe()
682 return -ENOMEM; in adsp_probe()
685 rproc->auto_boot = desc->auto_boot; in adsp_probe()
686 rproc->has_iommu = desc->has_iommu; in adsp_probe()
689 adsp = rproc->priv; in adsp_probe()
690 adsp->dev = &pdev->dev; in adsp_probe()
691 adsp->rproc = rproc; in adsp_probe()
692 adsp->info_name = desc->sysmon_name; in adsp_probe()
693 adsp->has_iommu = desc->has_iommu; in adsp_probe()
697 if (desc->is_wpss) in adsp_probe()
698 adsp->shutdown = qcom_wpss_shutdown; in adsp_probe()
700 adsp->shutdown = qcom_adsp_shutdown; in adsp_probe()
706 ret = adsp_init_clock(adsp, desc->clk_ids); in adsp_probe()
710 ret = qcom_rproc_pds_attach(adsp, desc->pd_names, desc->num_pds); in adsp_probe()
712 dev_err(&pdev->dev, "Failed to attach proxy power domains\n"); in adsp_probe()
724 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, in adsp_probe()
725 desc->load_state, qcom_adsp_pil_handover); in adsp_probe()
729 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name); in adsp_probe()
730 qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev); in adsp_probe()
731 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); in adsp_probe()
732 adsp->sysmon = qcom_add_sysmon_subdev(rproc, in adsp_probe()
733 desc->sysmon_name, in adsp_probe()
734 desc->ssctl_id); in adsp_probe()
735 if (IS_ERR(adsp->sysmon)) { in adsp_probe()
736 ret = PTR_ERR(adsp->sysmon); in adsp_probe()
756 rproc_del(adsp->rproc); in adsp_remove()
758 qcom_q6v5_deinit(&adsp->q6v5); in adsp_remove()
759 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); in adsp_remove()
760 qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev); in adsp_remove()
761 qcom_remove_sysmon_subdev(adsp->sysmon); in adsp_remove()
762 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); in adsp_remove()
833 { .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init },
834 { .compatible = "qcom,sc7280-adsp-pil", .data = &adsp_sc7280_resource_init },
835 { .compatible = "qcom,sc7280-wpss-pil", .data = &wpss_resource_init },
836 { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init },