Lines Matching full:vreg
144 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_set_voltage_sel() local
151 return ezx_pcap_set_bits(pcap, vreg->reg, in pcap_regulator_set_voltage_sel()
152 (rdev->desc->n_voltages - 1) << vreg->index, in pcap_regulator_set_voltage_sel()
153 selector << vreg->index); in pcap_regulator_set_voltage_sel()
158 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_get_voltage_sel() local
165 ezx_pcap_read(pcap, vreg->reg, &tmp); in pcap_regulator_get_voltage_sel()
166 tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1)); in pcap_regulator_get_voltage_sel()
172 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_enable() local
175 if (vreg->en == NA) in pcap_regulator_enable()
178 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); in pcap_regulator_enable()
183 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_disable() local
186 if (vreg->en == NA) in pcap_regulator_disable()
189 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0); in pcap_regulator_disable()
194 const struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_is_enabled() local
198 if (vreg->en == NA) in pcap_regulator_is_enabled()
201 ezx_pcap_read(pcap, vreg->reg, &tmp); in pcap_regulator_is_enabled()
202 return (tmp >> vreg->en) & 1; in pcap_regulator_is_enabled()
214 #define VREG(_vreg) \ macro
226 VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
227 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),