Lines Matching +full:5 +full:vs1
255 static const unsigned int vibr_selectors[] = { 0, 1, 2, 4, 5, 9, 11, 13 };
274 static const unsigned int vcamd_selectors[] = { 3, 4, 5, 6, 7, 9, 12 };
292 static const unsigned int vmch_vemc_selectors[] = { 2, 3, 5 };
330 static const unsigned int mt6366_vmddr_selectors[] = { 0, 1, 2, 3, 4, 5, 6, 7, 9, 12 };
345 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
521 MT6358_BUCK("buck_vs1", VS1, "vsys-vs1", 1000000, 2587500, 12500,
524 MT6358_REG_FIXED("ldo_vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000),
525 MT6358_REG_FIXED("ldo_vcamio", VCAMIO, "vs1-ldo1", MT6358_LDO_VCAMIO_CON0, 0, 1800000),
526 MT6358_REG_FIXED("ldo_vcn18", VCN18, "vs1-ldo1", MT6358_LDO_VCN18_CON0, 0, 1800000),
534 MT6358_REG_FIXED("ldo_vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000),
546 MT6358_LDO("ldo_vefuse", VEFUSE, "vs1-ldo1", vefuse,
593 MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500,
596 MT6366_REG_FIXED("vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000),
604 MT6366_REG_FIXED("vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000),
614 MT6366_LDO("vefuse", VEFUSE, vefuse, "vs1-ldo1",
626 MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, "vs1-ldo1",
628 MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, "vs1-ldo1",