Lines Matching +full:10 +full:- +full:bits

1 /* SPDX-License-Identifier: GPL-2.0 */
28  *	Rev	Fieldname	Bits
46  *	Rev	Fieldname	Bits
69  *	Rev	Fieldname	Bits
94  *	Rev	Fieldname	Bits
119  *	Rev	Fieldname	Bits
137  *	Rev	Fieldname	Bits
158  *	Rev	Fieldname	Bits
180  *	Rev	Fieldname	Bits
199  *	Rev	Fieldname	Bits
221  *	Rev	Fieldname	Bits
237  *		HashIntlvCtl1G		[10]
243  *		HashIntlvCtl1G		[10]
251 #define DF4_HASH_CTL_1G			BIT(10)
261  *	Rev	Fieldname	Bits
276 /* Follow reference code by including reserved bits for simplicity. */
285  *	Rev	Fieldname	Bits
304  *	Rev	Fieldname	Bits
307  *	DF2	IntLvAddrSel	[10:8]
317 #define DF2_INTLV_ADDR_SEL	GENMASK(10, 8)
327  *	Rev	Fieldname	Bits
352  *	Rev	Fieldname	Bits
355  *	DF2	IntLvNumDies	[11:10]
367 #define DF2_INTLV_NUM_DIES	GENMASK(11, 10)
378  *	Rev	Fieldname	Bits
402  *	Rev	Fieldname	Bits
423  *	Rev	Fieldname		Bits
427  *	D18F2x90 [Non-power-of-2 channel Configuration Register for COH_ST DRAM Address Maps]
442  *	Rev	Fieldname	Bits
460  *	Rev	Fieldname	Bits
478  *	Rev	Fieldname	Bits
501  *	Rev	Fieldname	Bits
523  *	Rev	Fieldname	Bits
543  *	Rev	Fieldname	Bits
564  *	Rev	Fieldname	Bits
589  *		Rev	Fieldname	Bits