1564 				  u32 inte_mask)  in tsi721_imsg_interrupt_enable()  argument
1568 	if (!inte_mask)  in tsi721_imsg_interrupt_enable()
1572 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_enable()
1576 	iowrite32(rval | inte_mask, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1594 				   u32 inte_mask)  in tsi721_imsg_interrupt_disable()  argument
1598 	if (!inte_mask)  in tsi721_imsg_interrupt_disable()
1602 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_disable()
1606 	rval &= ~inte_mask;  in tsi721_imsg_interrupt_disable()
1625 				  u32 inte_mask)  in tsi721_omsg_interrupt_enable()  argument
1629 	if (!inte_mask)  in tsi721_omsg_interrupt_enable()
1633 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_enable()
1637 	iowrite32(rval | inte_mask, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1655 				   u32 inte_mask)  in tsi721_omsg_interrupt_disable()  argument
1659 	if (!inte_mask)  in tsi721_omsg_interrupt_disable()
1663 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_disable()
1667 	rval &= ~inte_mask;  in tsi721_omsg_interrupt_disable()