Lines Matching refs:TSI721_DEV_CHAN_INTE

515 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
517 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
531 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
533 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
603 	iowrite32(intr,	priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_interrupts_init()
1586 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1588 		  priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1617 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1619 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1647 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1649 		  priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1678 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1680 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1882 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1884 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
2174 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2176 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2619 	iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_disable_ints()