100 static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)  in pwm_imx27_clk_prepare_enable()  argument
104 	ret = clk_prepare_enable(imx->clk_ipg);  in pwm_imx27_clk_prepare_enable()
108 	ret = clk_prepare_enable(imx->clk_per);  in pwm_imx27_clk_prepare_enable()
110 		clk_disable_unprepare(imx->clk_ipg);  in pwm_imx27_clk_prepare_enable()
117 static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)  in pwm_imx27_clk_disable_unprepare()  argument
119 	clk_disable_unprepare(imx->clk_per);  in pwm_imx27_clk_disable_unprepare()
120 	clk_disable_unprepare(imx->clk_ipg);  in pwm_imx27_clk_disable_unprepare()
126 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_get_state()  local
131 	ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_get_state()
135 	val = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_get_state()
154 	pwm_clk = clk_get_rate(imx->clk_per);  in pwm_imx27_get_state()
155 	val = readl(imx->mmio_base + MX3_PWMPR);  in pwm_imx27_get_state()
167 		val = readl(imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_get_state()
169 		val = imx->duty_cycle;  in pwm_imx27_get_state()
174 	pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_get_state()
181 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_sw_reset()  local
186 	writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);  in pwm_imx27_sw_reset()
189 		cr = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_sw_reset()
200 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_wait_fifo_slot()  local
206 	sr = readl(imx->mmio_base + MX3_PWMSR);  in pwm_imx27_wait_fifo_slot()
213 		sr = readl(imx->mmio_base + MX3_PWMSR);  in pwm_imx27_wait_fifo_slot()
223 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_apply()  local
229 	clkrate = clk_get_rate(imx->clk_per);  in pwm_imx27_apply()
259 		ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_apply()
266 	writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_apply()
267 	writel(period_cycles, imx->mmio_base + MX3_PWMPR);  in pwm_imx27_apply()
273 	imx->duty_cycle = duty_cycles;  in pwm_imx27_apply()
287 	writel(cr, imx->mmio_base + MX3_PWMCR);  in pwm_imx27_apply()
290 		pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_apply()
309 	struct pwm_imx27_chip *imx;  in pwm_imx27_probe()  local
313 	chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*imx));  in pwm_imx27_probe()
316 	imx = to_pwm_imx27_chip(chip);  in pwm_imx27_probe()
318 	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");  in pwm_imx27_probe()
319 	if (IS_ERR(imx->clk_ipg))  in pwm_imx27_probe()
320 		return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_ipg),  in pwm_imx27_probe()
323 	imx->clk_per = devm_clk_get(&pdev->dev, "per");  in pwm_imx27_probe()
324 	if (IS_ERR(imx->clk_per))  in pwm_imx27_probe()
325 		return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),  in pwm_imx27_probe()
330 	imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);  in pwm_imx27_probe()
331 	if (IS_ERR(imx->mmio_base))  in pwm_imx27_probe()
332 		return PTR_ERR(imx->mmio_base);  in pwm_imx27_probe()
334 	ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_probe()
339 	pwmcr = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_probe()
341 		pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_probe()