1 // SPDX-License-Identifier: GPL-2.0
42 	value = readl(pc->base + PWM_CONTROL);  in bcm2835_pwm_request()
43 	value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));  in bcm2835_pwm_request()
44 	value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm));  in bcm2835_pwm_request()
45 	writel(value, pc->base + PWM_CONTROL);  in bcm2835_pwm_request()
55 	value = readl(pc->base + PWM_CONTROL);  in bcm2835_pwm_free()
56 	value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));  in bcm2835_pwm_free()
57 	writel(value, pc->base + PWM_CONTROL);  in bcm2835_pwm_free()
82 	 * <=> period <= ceil((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate) - 1  in bcm2835_pwm_apply()
84 	max_period = DIV_ROUND_UP_ULL((u64)U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC / 2, pc->rate) - 1;  in bcm2835_pwm_apply()
86 	if (state->period > max_period)  in bcm2835_pwm_apply()
87 		return -EINVAL;  in bcm2835_pwm_apply()
90 	period_cycles = DIV_ROUND_CLOSEST_ULL(state->period * pc->rate, NSEC_PER_SEC);  in bcm2835_pwm_apply()
94 		return -EINVAL;  in bcm2835_pwm_apply()
96 	writel(period_cycles, pc->base + PERIOD(pwm->hwpwm));  in bcm2835_pwm_apply()
99 	val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * pc->rate, NSEC_PER_SEC);  in bcm2835_pwm_apply()
100 	writel(val, pc->base + DUTY(pwm->hwpwm));  in bcm2835_pwm_apply()
103 	val = readl(pc->base + PWM_CONTROL);  in bcm2835_pwm_apply()
105 	if (state->polarity == PWM_POLARITY_NORMAL)  in bcm2835_pwm_apply()
106 		val &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm));  in bcm2835_pwm_apply()
108 		val |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm);  in bcm2835_pwm_apply()
111 	if (state->enabled)  in bcm2835_pwm_apply()
112 		val |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm);  in bcm2835_pwm_apply()
114 		val &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm));  in bcm2835_pwm_apply()
116 	writel(val, pc->base + PWM_CONTROL);  in bcm2835_pwm_apply()
129 	struct device *dev = &pdev->dev;  in bcm2835_pwm_probe()
139 	pc->base = devm_platform_ioremap_resource(pdev, 0);  in bcm2835_pwm_probe()
140 	if (IS_ERR(pc->base))  in bcm2835_pwm_probe()
141 		return PTR_ERR(pc->base);  in bcm2835_pwm_probe()
143 	pc->clk = devm_clk_get_enabled(dev, NULL);  in bcm2835_pwm_probe()
144 	if (IS_ERR(pc->clk))  in bcm2835_pwm_probe()
145 		return dev_err_probe(dev, PTR_ERR(pc->clk),  in bcm2835_pwm_probe()
148 	ret = devm_clk_rate_exclusive_get(dev, pc->clk);  in bcm2835_pwm_probe()
153 	pc->rate = clk_get_rate(pc->clk);  in bcm2835_pwm_probe()
154 	if (!pc->rate)  in bcm2835_pwm_probe()
155 		return dev_err_probe(dev, -EINVAL,  in bcm2835_pwm_probe()
158 	chip->ops = &bcm2835_pwm_ops;  in bcm2835_pwm_probe()
159 	chip->atomic = true;  in bcm2835_pwm_probe()
174 	clk_disable_unprepare(pc->clk);  in bcm2835_pwm_suspend()
183 	return clk_prepare_enable(pc->clk);  in bcm2835_pwm_resume()
190 	{ .compatible = "brcm,bcm2835-pwm", },
197 		.name = "bcm2835-pwm",
199 		.pm = pm_ptr(&bcm2835_pwm_pm_ops),
206 MODULE_DESCRIPTION("Broadcom BCM2835 PWM driver");